like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
Embedded Systems Training & Live Projects @Technogroovy Systems India Pvt Ltd Technogroovy India
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
Embedded Systems Training & Live Projects @Technogroovy Systems India Pvt Ltd Technogroovy India
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
The Microprocessor System. A semester course review. Summarize important points for whole subject. Using the 8051 architecture as the practical and projects development.
Kernel Recipes 2014 - x86 instruction encoding and the nasty hacks we do in t...Anne Nicolas
I have always wanted to understand x86 instruction encoding in detail but never gotten around to it. Of course not, who has time nowadays?! So, in order to force me to do it, I decided to write an x86 instruction decoder.
This talk attempts to show what I have learned in the process and how instruction encoding is done on x86.
As a practical aspect, the decoder I’ve scratched together tries to verbosely show some of the crazy low-level hacks^Wtechniques we do in the Linux kernel like alternatives patching, jump labels, exception tables, etc – they have a lot to do with deep knowledge of x86 instructions and how code is generally laid out in the binary kernel image. Maybe this talk can help shed some light on the whole lowlevel fun that’s happening under the hood in the kernel and so many are missing out on. And maybe it’ll make it more interesting and palatable to people and they wont scare so fast anymore when we go deep into the bowels of the kernel and the machine.
Borislav Petkov, SUSE
eBPF has 64-bit general purpose registers, therefore 32-bit architectures normally need to use register pair to model them and need to generate extra instructions to manipulate the high 32-bit in the pair. Some of these overheads incurred could be eliminated if JIT compiler knows only the low 32-bit of a register is interested. This could be known through data flow (DF) analysis techniques. Either the classic iterative DF analysis or "path-sensitive" version based on verifier's code path walker.
In this talk, implementations for both versions of DF analyzer will be presented. We will see how a def-use chain based classic eBPF DF analyser looks first, and will see the possibility to integrate it with previous proposed eBPF control flow graph framework to make a stand-alone eBPF global DF analyser which could potentially serve as a library. Then, another "path-sensitive" DF analyser based on the existing verifier code path walker will be presented. We will discuss how function calls, path prune, path switch affect the implementation. Finally, we will summarize pros and cons for each, and will see how could each of them be adapted to 64-bit and 32-bit architecture back-ends.
Also, eBPF has 32-bit sub-register and ALU32 instructions associated, enable them (-mattr=+alu32) in LLVM code-gen could let the generated eBPF sequences carry more 32-bit information which could potentially easy flow analyser. This will be briefly discussed in the talk as well.
The Microprocessor System. A semester course review. Summarize important points for whole subject. Using the 8051 architecture as the practical and projects development.
Kernel Recipes 2014 - x86 instruction encoding and the nasty hacks we do in t...Anne Nicolas
I have always wanted to understand x86 instruction encoding in detail but never gotten around to it. Of course not, who has time nowadays?! So, in order to force me to do it, I decided to write an x86 instruction decoder.
This talk attempts to show what I have learned in the process and how instruction encoding is done on x86.
As a practical aspect, the decoder I’ve scratched together tries to verbosely show some of the crazy low-level hacks^Wtechniques we do in the Linux kernel like alternatives patching, jump labels, exception tables, etc – they have a lot to do with deep knowledge of x86 instructions and how code is generally laid out in the binary kernel image. Maybe this talk can help shed some light on the whole lowlevel fun that’s happening under the hood in the kernel and so many are missing out on. And maybe it’ll make it more interesting and palatable to people and they wont scare so fast anymore when we go deep into the bowels of the kernel and the machine.
Borislav Petkov, SUSE
eBPF has 64-bit general purpose registers, therefore 32-bit architectures normally need to use register pair to model them and need to generate extra instructions to manipulate the high 32-bit in the pair. Some of these overheads incurred could be eliminated if JIT compiler knows only the low 32-bit of a register is interested. This could be known through data flow (DF) analysis techniques. Either the classic iterative DF analysis or "path-sensitive" version based on verifier's code path walker.
In this talk, implementations for both versions of DF analyzer will be presented. We will see how a def-use chain based classic eBPF DF analyser looks first, and will see the possibility to integrate it with previous proposed eBPF control flow graph framework to make a stand-alone eBPF global DF analyser which could potentially serve as a library. Then, another "path-sensitive" DF analyser based on the existing verifier code path walker will be presented. We will discuss how function calls, path prune, path switch affect the implementation. Finally, we will summarize pros and cons for each, and will see how could each of them be adapted to 64-bit and 32-bit architecture back-ends.
Also, eBPF has 32-bit sub-register and ALU32 instructions associated, enable them (-mattr=+alu32) in LLVM code-gen could let the generated eBPF sequences carry more 32-bit information which could potentially easy flow analyser. This will be briefly discussed in the talk as well.
Addressing mode and instruction set using 8051logesh waran
1. Immediate addressing mode:
In this type, the operand is specified in the instruction along with the opcode. In simple way, it means data is provided in instruction itself.
Ex: MOV A,#05H -> Where MOV stands for move, # represents immediate data. 05h is the data. It means the immediate date 05h provided in instruction is moved into A register.
2.Register addressing mode:
Here the operand in contained in the specific register of microcontroller. The user must provide the name of register from where the operand/data need to be fetched. The permitted registers are A, R7-R0 of each register bank. Ex: MOV A,R0-> content of R0 register is copied into Accumulator.
3. Direct addressing mode:
In this mode the direct address of memory location is provided in instruction to fetch the operand. Only internal RAM and SFR's address can be used in this type of instruction.
Ex: MOV A, 30H => Content of RAM address 30H is copied into Accumulator.
4. Register Indirect addressing mode:
Here the address of memory location is indirectly provided by a register. The '@' sign indicates that the register holds the address of memory location i.e. fetch the content of memory location whose address is provided in register.
Ex: MOV A,@R0 => Copy the content of memory location whose address is given in R0 register.
5. Indexed Addressing mode:
This addressing mode is basically used for accessing data from look up table. Here the address of memory is indexed i.e. added to form the actual address of memory.
Ex: MOVC A,@A+DPTR => here 'C' means Code. Here the content of A register is added with content of DPTR and the resultant is the address of memory location from where the data is copied to A register.
An embedded system is closely integrated with the main system
It may not interact directly with the environment
For example – A microcomputer in a car ignition control
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
Buy Embedded Systems Projects,B tech Final Year Projects OnlineTechnogroovy
Get In Touch:
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
http://www.technogroovy.com/index.php/student-zone/final-year-project
Email Id: technogroovy@gmail.com
Connect with us On Facebook:
https://www.facebook.com/Technogroovyindia
Mechanical projects List 2014 By TechnogroovyTechnogroovy
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
Embedded Systems Projects List,Ece/Electronics Projects ListTechnogroovy
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
Embedded Systems,Embedded Systems Project,Winter training,Technogroovy
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
Computer Science Training,IT Training,CS Training,Computer Training Institute,Technogroovy
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
B tech Projects,Final Year Projects,Engineering ProjectsTechnogroovy
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
Embedded Systems Project Based Training|Engineering Projects,Summer TrainingTechnogroovy
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
Industrial Training|Summer Training|Embedded Systems|Final Year Project|B tec...Technogroovy
like our page for more updates:
https://www.facebook.com/Technogroovyindia
With Best Regard's
Technogroovy Systems India Pvt. Ltd.
www.technogroovy.com
Call- +91-9582888121
Whatsapp- +91-8800718323
Normal Labour/ Stages of Labour/ Mechanism of LabourWasim Ak
Normal labor is also termed spontaneous labor, defined as the natural physiological process through which the fetus, placenta, and membranes are expelled from the uterus through the birth canal at term (37 to 42 weeks
Introduction to AI for Nonprofits with Tapp NetworkTechSoup
Dive into the world of AI! Experts Jon Hill and Tareq Monaur will guide you through AI's role in enhancing nonprofit websites and basic marketing strategies, making it easy to understand and apply.
How to Build a Module in Odoo 17 Using the Scaffold MethodCeline George
Odoo provides an option for creating a module by using a single line command. By using this command the user can make a whole structure of a module. It is very easy for a beginner to make a module. There is no need to make each file manually. This slide will show how to create a module using the scaffold method.
Strategies for Effective Upskilling is a presentation by Chinwendu Peace in a Your Skill Boost Masterclass organisation by the Excellence Foundation for South Sudan on 08th and 09th June 2024 from 1 PM to 3 PM on each day.
Delivering Micro-Credentials in Technical and Vocational Education and TrainingAG2 Design
Explore how micro-credentials are transforming Technical and Vocational Education and Training (TVET) with this comprehensive slide deck. Discover what micro-credentials are, their importance in TVET, the advantages they offer, and the insights from industry experts. Additionally, learn about the top software applications available for creating and managing micro-credentials. This presentation also includes valuable resources and a discussion on the future of these specialised certifications.
For more detailed information on delivering micro-credentials in TVET, visit this https://tvettrainer.com/delivering-micro-credentials-in-tvet/
Macroeconomics- Movie Location
This will be used as part of your Personal Professional Portfolio once graded.
Objective:
Prepare a presentation or a paper using research, basic comparative analysis, data organization and application of economic information. You will make an informed assessment of an economic climate outside of the United States to accomplish an entertainment industry objective.
A review of the growth of the Israel Genealogy Research Association Database Collection for the last 12 months. Our collection is now passed the 3 million mark and still growing. See which archives have contributed the most. See the different types of records we have, and which years have had records added. You can also see what we have for the future.
How to Add Chatter in the odoo 17 ERP ModuleCeline George
In Odoo, the chatter is like a chat tool that helps you work together on records. You can leave notes and track things, making it easier to talk with your team and partners. Inside chatter, all communication history, activity, and changes will be displayed.
it describes the bony anatomy including the femoral head , acetabulum, labrum . also discusses the capsule , ligaments . muscle that act on the hip joint and the range of motion are outlined. factors affecting hip joint stability and weight transmission through the joint are summarized.
This presentation includes basic of PCOS their pathology and treatment and also Ayurveda correlation of PCOS and Ayurvedic line of treatment mentioned in classics.
A workshop hosted by the South African Journal of Science aimed at postgraduate students and early career researchers with little or no experience in writing and publishing journal articles.
9. Register Addressing Mode
MOV Rn, A
;n=0,..,7
ADD
A, Rn
MOV DPL, R6
MOV DPTR, A
MOV Rm, Rn
www.technogroovy.com, Cell- +91-
10. Direct Addressing Mode
Although the entire of 128 bytes of RAM can be
accessed using direct addressing mode, it is most
often used to access RAM loc. 30 – 7FH.
MOV R0, 40H
MOV 56H, A
MOV A, 4
MOV 6, 2
; ≡ MOV A, R4
; copy R2 to R6
; MOV R6,R2 is invalid !
www.technogroovy.com, Cell- +91-
11. Register Indirect Addressing Mode
• In this mode, register is used as a pointer to the
data.
MOV
A,@Ri
; move content of RAM loc.
where address is held by Ri into A ( i=0 or 1 )
MOV
@R1,B
In other word, the content of register R0 or R1 is
sources or target in MOV, ADD and SUBB
insructions.
www.technogroovy.com, Cell- +91-
13. Relative, Absolute, & Long Addressing
Used only with jump and call instructions:
SJMP
ACALL,AJMP
LCALL,LJMP
www.technogroovy.com, Cell- +91-
14. Indexed Addressing Mode
• This mode is widely used in accessing data
elements of look-up table entries located in the
program (code) space ROM at the 8051
MOVC
A,@A+DPTR
(A,@A+PC)
A= content of address A +DPTR from ROM
Note:
Because the data elements are stored in the
program (code ) space ROM of the 8051, it uses
the instruction MOVC instead of MOV. The
“C” means code.
www.technogroovy.com, Cell- +91-
15. Some Simple Instructions
MOV dest,source
; dest = source
MOV A,#72H
MOV R4,#62H
MOV B,0F9H
;A=72H
;R4=62H
;B=the content of F9’th byte of RAM
MOV DPTR,#7634H
MOV DPL,#34H
MOV DPH,#76H
MOV P1,A
;mov A to port 1
Note 1:
MOV A,#72H ≠ MOV A,72H
After instruction “MOV A,72H ” the content of 72’th byte of RAM will
replace in Accumulator.
Note 2:
MOV A,R3
≡
MOV A,3
www.technogroovy.com, Cell- +91-
17. MUL & DIV
• MUL
MOV
MOV
MUL
AB ;B|A = A*B
A,#25H
B,#65H
AB
;25H*65H=0E99
;B=0EH, A=99H
• DIV
MOV
MOV
DIV
AB ;A = A/B, B = A mod B
A,#25
B,#10
AB
;A=2, B=5
www.technogroovy.com, Cell- +91-
18. SETB bit
CLR bit
; bit=1
; bit=0
SETB
SETB
SETB
SETB
SETB
; CY=1
;bit 0 from port 0 =1
;bit 7 from port 3 =1
;bit 2 from ACCUMULATOR =1
;set high D5 of RAM loc. 20h
C
P0.0
P3.7
ACC.2
05
Note:
CLR instruction is as same as SETB
i.e.:
CLR
C
;CY=0
But following instruction is only for CLR:
CLR
A
;A=0
www.technogroovy.com, Cell- +91-
22. Stack in the 8051
• The register used to
access the stack is called
SP (stack pointer)
register.
• The stack pointer in the
8051 is only 8 bits wide,
which means that it can
take value 00 to FFH.
When 8051 powered up,
the SP register contains
value 07.
7FH
Scratch pad RAM
30H
2FH
Bit-Addressable RAM
20H
1FH
18H
17H
10H
0FH
08H
07H
00H
www.technogroovy.com, Cell- +91-
Register Bank 3
Register Bank 2
Stack) Register Bank 1)
Register Bank 0
24. LOOP and JUMP Instructions
Conditional Jumps :
JZ
Jump if A=0
JNZ
Jump if A/=0
DJNZ
Decrement and jump if A/=0
CJNE A,byte
Jump if A/=byte
CJNE reg,#data
Jump if byte/=#data
JC
Jump if CY=1
JNC
Jump if CY=0
JB
Jump if bit=1
JNB
Jump if bit=0
JBC
Jump if bit=1 and clear bit
www.technogroovy.com, Cell- +91-
25. DJNZ:
Write a program to clear ACC, then
add 3 to the accumulator ten time
Solution:
AGAIN:
MOV
MOV
ADD
DJNZ
MOV
A,#0
R2,#10
A,#03
R2,AGAIN ;repeat until R2=0 (10 times)
R5,A
www.technogroovy.com, Cell- +91-
26. LJMP(long jump)
LJMP is an unconditional jump. It is a 3-byte instruction.
It allows a jump to any memory location from 0000 to
FFFFH.
AJMP(absolute jump)
In this 2-byte instruction, It allows a jump to any memory
location within the 2k block of program memory.
SJMP(short jump)
In this 2-byte instruction. The relative address range of 00FFH is divided into forward and backward jumps, that is ,
within -128 to +127 bytes of memory relative to the address
of the current PC.
www.technogroovy.com, Cell- +91-
27. CALL Instructions
Another control transfer instruction is the CALL
instruction, which is used to call a subroutine.
• LCALL(long call)
This 3-byte instruction can be used to call
subroutines located anywhere within the 64K
byte address space of the 8051.
• ACALL (absolute call)
ACALL is 2-byte instruction. the target
address of the subroutine must be within 2K
byte range.
www.technogroovy.com, Cell- +91-
28. Example:
Write a program to copy a block of 10 bytes from RAM
location starting at 37h to RAM location starting at 59h.
Solution:
MOV R0,#37h
MOV R1,#59h
MOV R2,#10
L1: MOV A,@R0
MOV @R1,A
INC R0
INC R1
DJNZ R2,L1
; source pointer
; dest pointer
; counter
www.technogroovy.com, Cell- +91-
29. Decimal Addition
156 + 248
.
100's
10's
1's
.
1
5
6
+
2
4
8
=
4
0
4
16 Bit Addition
1A44 + 22DB = 3D1F
.
256's
16’s
1's
.
1
A
4
4
+
2
2
D
B
=
3
D
1
F
www.technogroovy.com, Cell- +91-
30. Performing the Addition with 8051
.
256's
1's
.
R6
R7
+
R4
R5
R2
R3
=
65536's
R1
1.Add the low bytes R7 and R5, leave the answer in R3.
2.Add the high bytes R6 and R4, adding any carry from step 1, and leave the answer in R2.
3.Put any carry from step 2 in the final byte, R1.
www.technogroovy.com, Cell- +91-
31. Steps 1, 2, 3
MOV A,R7 ;Move the low-byte into the accumulator
ADD A,R5 ;Add the second low-byte to the accumulator
MOV R3,A ;Move the answer to the low-byte of the result
MOV A,R6 ;Move the high-byte into the accumulator
ADDC A,R4 ;Add the second high-byte to the accumulator, plus carry.
MOV R2,A ;Move the answer to the high-byte of the result
MOV A,#00h ;By default, the highest byte will be zero.
ADDC A,#00h ;Add zero, plus carry from step 2.
MOV R1,A ;Move the answer to the highest byte of the result
www.technogroovy.com, Cell- +91-
32. The Whole Program
;Load the first value into R6 and R7
MOV R6,#1Ah
MOV R7,#44h
;Load the first value into R4 and R5
MOV R4,#22h
MOV R5,#0DBh
;Call the 16-bit addition routine LCALL ADD16_16
ADD16_16:
;Step 1 of the process
MOV A,R7 ;Move the low-byte into the accumulator
ADD A,R5 ;Add the second low-byte to the accumulator
MOV R3,A ;Move the answer to the low-byte of the result
;Step 2 of the process
MOV A,R6 ;Move the high-byte into the accumulator
ADDC A,R4 ;Add the second high-byte to the accumulator, plus carry.
MOV R2,A ;Move the answer to the high-byte of the result
;Step 3 of the process
MOV A,#00h ;By default, the highest byte will be zero.
ADDC A,#00h ;Add zero, plus carry from step 2.
MOV MOV R1,A ;Move the answer to the highest byte of the result
;Return - answer now resides in R1, R2, and R3. RET
www.technogroovy.com, Cell- +91-
33. Timer & Port Operations
• Example:
Write a program using Timer0 to create a 10khz square
wave on P1.0
LOOP:
MOV TMOD,#02H
MOV TH0,#-50
SETB TR0
JNB TF0, LOOP
CLR TF0
CPL P1.0
SJMP LOOP
END
;8-bit auto-reload mode
;-50 reload value in TH0
;start timer0
;wait for overflow
;clear timer0 overflow flag
;toggle port bit
;repeat
www.technogroovy.com, Cell- +91-
34. Interrupts
1. Enabling and Disabling Interrupts
2. Interrupt Priority
3. Writing the ISR (Interrupt Service
Routine)
www.technogroovy.com, Cell- +91-
37. Writing the ISR
Example:
Writing the ISR for Timer0 interrupt
T0ISR:
MAIN:
ORG 0000H ;reset
LJMP MAIN
ORG 000BH ;Timer0 entry point
.
;Timer0 ISR begins
.
RETI
;return to main program
.
;main program
.
.
END
www.technogroovy.com, Cell- +91-
38. Structure of Assembly language
and Running an 8051 program
EDITOR
PROGRAM
Myfile.asm
ASSEMBLER
PROGRAM
Myfile.lst
Other obj file
Myfile.obj
LINKER
PROGRAM
OH
PROGRAM
Myfile.hex
www.technogroovy.com, Cell- +91-
39. Examples of Our Program Instructions
• MOV C,P1.4
JC LINE1
• SETB P1.0
CLR P1.2
www.technogroovy.com, Cell- +91-
40. 8051 Instruction Set
ACALL: Absolute Call
JC: Jump if Carry Set
PUSH: Push Value Onto Stack
ADD, ADDC: Add Acc. (With Carry)
JMP: Jump to Address
RET: Return From Subroutine
AJMP: Absolute Jump
JNB: Jump if Bit Not Set
RETI: Return From Interrupt
ANL: Bitwise AND
JNC: Jump if Carry Not Set
RL: Rotate Accumulator Left
CJNE: Compare & Jump if Not Equal
JNZ: Jump if Acc. Not Zero
RLC: Rotate Acc. Left Through Carry
CLR: Clear Register
JZ: Jump if Accumulator Zero
RR: Rotate Accumulator Right
CPL: Complement Register
LCALL: Long Call
RRC: Rotate Acc. Right Through Carry
DA: Decimal Adjust
LJMP: Long Jump
SETB: Set Bit
DEC: Decrement Register
MOV: Move Memory
SJMP: Short Jump
DIV: Divide Accumulator by B
MOVC: Move Code Memory
SUBB: Sub. From Acc. With Borrow
DJNZ: Dec. Reg. & Jump if Not Zero
MOVX: Move Extended Memory
SWAP: Swap Accumulator Nibbles
INC: Increment Register
MUL: Multiply Accumulator by B
XCH: Exchange Bytes
JB: Jump if Bit Set
NOP: No Operation
XCHD: Exchange Digits
JBC: Jump if Bit Set and Clear Bit
ORL: Bitwise OR
XRL: Bitwise Exclusive OR
POP: Pop Value From Stack
Undefined: Undefined Instruction
www.technogroovy.com, Cell- +91-