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ELECTRICAL PROJECTS USING MATLAB/SIMULINK
Gmail: asokatechnologies@gmail.com, Website: http://www.asokatechnologies.in
0-9347143789/9949240245
For Simulation Results of the project Contact Us
Gmail: asokatechnologies@gmail.com, Website: http://www.asokatechnologies.in
0-9347143789/9949240245
A Generalized Multilevel Inverter Topology with Reduction
of Total Standing Voltage
ABSTRACT:
This paper presents a new multilevel inverter topology with reduced active switches and total
standing voltage. The proposed topology can generate a high number of voltage levels in the
symmetric configuration. This topology intuitively generates positive and negative cycles
without an additional H-bridge unit, which considerably reduces the total standing voltage of the
inverter. A cascaded structure is developed from the proposed topology to create higher voltage
levels. To show the novelty of the proposed topology, a thorough comparison between the
available and the proposed topologies in terms of the number of switches, standing voltages, and
dc-sources is presented. Furthermore, the power loss analysis is carried out for various load
values. The feasibility of the proposed nine-level inverter is verified with simulation and
experimental results.
KEYWORDS:
1. Multilevel inverter
2. Inverter
3. Locking voltage
4. Cascaded structure
5. Reduced power components
SOFTWARE: MATLAB/SIMULINK
CONCLUSION:
The proposed topology used lower number of power electronics components and reduced dc-
sources. Further, the maximum voltage stress on the switch is reduced to 4Vdc for any number of
voltage levels in symmetric configuration which is more suitable for medium voltage
ELECTRICAL PROJECTS USING MATLAB/SIMULINK
Gmail: asokatechnologies@gmail.com, Website: http://www.asokatechnologies.in
0-9347143789/9949240245
For Simulation Results of the project Contact Us
Gmail: asokatechnologies@gmail.com, Website: http://www.asokatechnologies.in
0-9347143789/9949240245
applications. The simulated and experimental results are presented for various load values. The
sudden load changes and modulation index variations are applied to the proposed topology and it
corresponding results are given. Further, the power loss and efficiency of propose topology
presented for various load power. It is confirming that the proposed topology is more suitable
various load changing applications like AC drives, grid connected PV system etc.
REFERENCES:
[1] S. A. Teston, M. Mezaroba, and C. Rech, “Anpc inverter with integrated secondary
bidirectional dc port for ess connection,” IEEE Transactions on Industry Applications, vol. 55,
no. 6, pp. 7358–7367, 2019.
[2] Jing Huang and K. A. Corzine, “Extended operation of flying capacitor multilevel inverters,”
IEEE Transactions on Power Electronics, vol. 21, no. 1, pp. 140–147, 2006.
[3] S. P. Gautam, “Novel h-bridge-based topology of multilevel inverter with reduced number of
devices,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 7, no. 4, pp.
2323–2332, 2019.
[4] S. A. A. Ibrahim, A. Palanimuthu, and M. A. J. Sathik, “Symmetric switched diode
multilevel inverter structure with minimised switch count,” The Journal of Engineering, vol.
2017, no. 8, pp. 469–478, 2017.
[5] S. S. Lee, M. Sidorov, N. R. N. Idris, and Y. E. Heng, “A symmetrical cascaded compact-
module multilevel inverter (ccm-mli) with pulsewidth modulation,” IEEE Transactions on
Industrial Electronics, vol. 65, no. 6, pp. 4631–4639, 2018.

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A generalized multilevel inverter topology with reduction of total standing voltage

  • 1. ELECTRICAL PROJECTS USING MATLAB/SIMULINK Gmail: asokatechnologies@gmail.com, Website: http://www.asokatechnologies.in 0-9347143789/9949240245 For Simulation Results of the project Contact Us Gmail: asokatechnologies@gmail.com, Website: http://www.asokatechnologies.in 0-9347143789/9949240245 A Generalized Multilevel Inverter Topology with Reduction of Total Standing Voltage ABSTRACT: This paper presents a new multilevel inverter topology with reduced active switches and total standing voltage. The proposed topology can generate a high number of voltage levels in the symmetric configuration. This topology intuitively generates positive and negative cycles without an additional H-bridge unit, which considerably reduces the total standing voltage of the inverter. A cascaded structure is developed from the proposed topology to create higher voltage levels. To show the novelty of the proposed topology, a thorough comparison between the available and the proposed topologies in terms of the number of switches, standing voltages, and dc-sources is presented. Furthermore, the power loss analysis is carried out for various load values. The feasibility of the proposed nine-level inverter is verified with simulation and experimental results. KEYWORDS: 1. Multilevel inverter 2. Inverter 3. Locking voltage 4. Cascaded structure 5. Reduced power components SOFTWARE: MATLAB/SIMULINK CONCLUSION: The proposed topology used lower number of power electronics components and reduced dc- sources. Further, the maximum voltage stress on the switch is reduced to 4Vdc for any number of voltage levels in symmetric configuration which is more suitable for medium voltage
  • 2. ELECTRICAL PROJECTS USING MATLAB/SIMULINK Gmail: asokatechnologies@gmail.com, Website: http://www.asokatechnologies.in 0-9347143789/9949240245 For Simulation Results of the project Contact Us Gmail: asokatechnologies@gmail.com, Website: http://www.asokatechnologies.in 0-9347143789/9949240245 applications. The simulated and experimental results are presented for various load values. The sudden load changes and modulation index variations are applied to the proposed topology and it corresponding results are given. Further, the power loss and efficiency of propose topology presented for various load power. It is confirming that the proposed topology is more suitable various load changing applications like AC drives, grid connected PV system etc. REFERENCES: [1] S. A. Teston, M. Mezaroba, and C. Rech, “Anpc inverter with integrated secondary bidirectional dc port for ess connection,” IEEE Transactions on Industry Applications, vol. 55, no. 6, pp. 7358–7367, 2019. [2] Jing Huang and K. A. Corzine, “Extended operation of flying capacitor multilevel inverters,” IEEE Transactions on Power Electronics, vol. 21, no. 1, pp. 140–147, 2006. [3] S. P. Gautam, “Novel h-bridge-based topology of multilevel inverter with reduced number of devices,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 7, no. 4, pp. 2323–2332, 2019. [4] S. A. A. Ibrahim, A. Palanimuthu, and M. A. J. Sathik, “Symmetric switched diode multilevel inverter structure with minimised switch count,” The Journal of Engineering, vol. 2017, no. 8, pp. 469–478, 2017. [5] S. S. Lee, M. Sidorov, N. R. N. Idris, and Y. E. Heng, “A symmetrical cascaded compact- module multilevel inverter (ccm-mli) with pulsewidth modulation,” IEEE Transactions on Industrial Electronics, vol. 65, no. 6, pp. 4631–4639, 2018.