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80386 microprocessor system instruction
The document discusses the system instructions of the 80386 microprocessor. It describes instructions related to pointer parameters, address descriptor tables, co-processors and multiprocessing, multi-tasking, input/output, and interrupt control. Specific instructions covered include ARPL, LAR, LSL, VERR, VERRW, LLDT, SLDT, LGDT, SGDT, CLTS, ESC, WAIT, LOCK, LTR, STR, IN, OUT, INS, OUTS, CLI, STI, LIDT, and SIDT.
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80386 microprocessor system instruction
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- 2. System Instruction of80386 1. Pointer Parameter 2. Address Descriptor Table 3. Co-Processor and Multiprocessing 4. Multi tasking 5. Input/output 6. Interrupt Control 2
- 3. Pointer Parameter ARPL LAR LSL VSRR.VSRW 3
- 4. ARPL (Adjust RequestedPrivilege Level) Adjust RPL field of the selector Compare RPL field of two segment selector Zero Flag Gets affected RPL field is stored in bit 0 and 1 of each operand Cannot be executed in REAL mode 4
- 5. LAR-Load Access Right Load Access Right Byte Load the Access right byte from the segment descriptor Zero flag get affected Loading occurs only if CPL,RPL less than DPL 5
- 6. LSL: Load SegmentLimit Load the segment Limit LSL register, selector If loading is successful Zero flag get affected Cannot be executed in real mode 6
- 7. VERR/VERW verify segmentfor Read/Write Verify segment for reading or writing Code/data segment tested Zero flag get affected Cannot be executed in real mode 7
- 8. 2. Address DescriptorTable LLDT SLDT LGDT SGDT 8
- 9. LLDT : LoadLocal descriptor table Load the source into segment selector field of Local Descriptor Table The source is 16-bit register or memory location NO SC,ES,SS,FS,CS and GS affected No flags affected This instruction Not executed in real mode 9
- 10. SLDT-Store Local DescriptorTable Register Store Local Descriptor Table Register This instruction sore the segment selector from LDTR into the specified memory Location or Register Zero flag get affected Cannot be executed in real mode 10
- 11. LGDT-Load Global DescriptorTable Register This instruction loads the values from the source to the GDTR The source is 6 byte memory location LGDT is the only instruction that directly load linear address No flags affected This instruction executed in real mode 11
- 12. SGDT-Store Global DescriptorTable Register This instruction stores the values from the source to the GDTR The source is 6 byte memory location LGDT is the only instruction that directly load linear address No flags affected This instruction executed in real mode 12
- 13. 3. Co-Processor andMultiProcessing CLTS ESC WAIT LOCK 13
- 14. CLTS: Clear TaskSwitch Flag This Instruction used to clear the task Switch flag in CR0 It is Privilege instruction Executed in real mode to allow initialization of protected mode No flags affected 14
- 15. ESC: Escape toExternal Processor It is used to pass the instruction to external co-processor No flags affected 15
- 16. LOCK: Lock Bus Lock Bus during next instruction No flags Affected 16
- 17. 4. Multi tasking LTR STR 17
- 18. LTR: Load TaskRegister Load task register from source Source can be 16 bit register or Memory location LTR CX 18
- 19. STR: Store TaskRegister Store task register at destination Destination can be 16 bit register or Memory location STR CX Not executed in real mode 19
- 20. 5. Input/output IN OUT INS OUTS 20
- 21. IN :Copy datafrom port IN accumulator, Port address No flags affected 21
- 22. 6. Interrupt Control 1.CLI 2. STI 3. LIDT 4. SIDT 22