80386 Microprocessor System Instructions

1. 80386 Microprocessor
System Instructions
PROF. U.L.TALWARE

2. System Instruction of 80386
1. Pointer Parameter
2. Address Descriptor Table
3. Co-Processor and Multiprocessing
4. Multi tasking
5. Input/output
6. Interrupt Control
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3. Pointer Parameter
 ARPL
 LAR
 LSL
 VSRR.VSRW
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4. ARPL (Adjust Requested Privilege
Level)
 Adjust RPL field of the selector
 Compare RPL field of two segment selector
 Zero Flag Gets affected
 RPL field is stored in bit 0 and 1 of each operand
 Cannot be executed in REAL mode
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5. LAR-Load Access Right
 Load Access Right Byte
 Load the Access right byte from the segment descriptor
 Zero flag get affected
 Loading occurs only if CPL,RPL less than DPL
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6. LSL: Load Segment Limit
 Load the segment Limit
 LSL register, selector
 If loading is successful Zero flag get affected
 Cannot be executed in real mode
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7. VERR/VERW verify segment for
Read/Write
 Verify segment for reading or writing
 Code/data segment tested
 Zero flag get affected
 Cannot be executed in real mode
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8. 2. Address Descriptor Table
 LLDT
 SLDT
 LGDT
 SGDT
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9. LLDT : Load Local descriptor table
 Load the source into segment selector field of
Local Descriptor Table
 The source is 16-bit register or memory location
 NO SC,ES,SS,FS,CS and GS affected
 No flags affected
 This instruction Not executed in real mode
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10. SLDT-Store Local Descriptor Table
Register
 Store Local Descriptor Table Register
 This instruction sore the segment selector from
LDTR into the specified memory Location or
Register
 Zero flag get affected
 Cannot be executed in real mode
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11. LGDT-Load Global Descriptor Table
Register
 This instruction loads the values from the source to the
GDTR
 The source is 6 byte memory location
 LGDT is the only instruction that directly load linear
address
 No flags affected
 This instruction executed in real mode
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12. SGDT-Store Global Descriptor Table
Register
 This instruction stores the values from the source to the
GDTR
 The source is 6 byte memory location
 LGDT is the only instruction that directly load linear
address
 No flags affected
 This instruction executed in real mode
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13. 3. Co-Processor and MultiProcessing
 CLTS
 ESC
 WAIT
 LOCK
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14. CLTS: Clear Task Switch Flag
 This Instruction used to clear the task Switch flag in CR0
 It is Privilege instruction
 Executed in real mode to allow initialization of protected mode
 No flags affected
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15. ESC: Escape to External Processor
 It is used to pass the instruction to external co-processor
 No flags affected
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16. LOCK: Lock Bus
 Lock Bus during next instruction
 No flags Affected
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17. 4. Multi tasking
 LTR
 STR
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18. LTR: Load Task Register
 Load task register from source
 Source can be 16 bit register or Memory location
 LTR CX
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19. STR: Store Task Register
 Store task register at destination
 Destination can be 16 bit register or Memory location
 STR CX
 Not executed in real mode
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20. 5. Input/output
 IN
 OUT
 INS
 OUTS
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21. IN :Copy data from port
 IN accumulator, Port address
 No flags affected
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22. 6. Interrupt Control
1. CLI
2. STI
3. LIDT
4. SIDT
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