The document discusses advancements in 3D integration technologies using through-silicon vias (TSV). It notes that existing metrology tools are insufficient for characterizing TSVs and that optical scatterometry and interferometric techniques show promise but require further development. The document also discusses how hybrid photonic integration could enable terabit communication but will require optical testing and characterization.

2.  Advancements in Lithography
 Evolution of Packaging
 Advanced Packaging
 TSV trends
 Monolithic 3DI Manufacturing
 3D integration with TSV – challenges
 Existing metrology tools – discussion on a few
 Holographic technique - proposal
 Opportunities for 3D integration with optical
interconnects
 Metrology for optical interconnects

3. Photolithography: Small mask feature (d)-> Large Lens
 Multiple lithography steps
 Pitch halving-quartering etc.
-> costly
 2D moving ahead to
1x nm scales.
 Waiting for High
Power EUV
 Vertical dimension making up
Lack of 2D scaling
Source: Sam Shivashankar, YouTube- nanolearning
Rayleigh Criteria-> 𝑘1 can’t go below 0.3 !
-> use small 𝜆, 𝐿𝑎𝑟𝑔𝑒𝑟 𝑁𝐴 -> hitting limits

4. Moving forward
Source: Mentor
Hybrid Memory Cube - Micron

5. Pierre Lartigues Field , 3D Plus USA
Flash Memory Summit 2012 Santa Clara, CA -

6. Current common packaging
Developing, TSV approach:
More interconnects and shorter
Interconnects -> Higher bit rate
Disadvantages of thinner longer wire interconnect:
1. Insufficient bandwidth, slow rise/fall pulse
2. Skin effect, Dielectric loss
3. Cross-talk
4. Low Bit-rate (B) between memory and CPU → Memory wall
Bit-rate 𝐵 𝛼 𝐴/𝑙2
David Miller, Opt. Inter., 1997, Proc IEEE June 2000
Currently CPUs are faster but memory to CPU Bit-transfer rate is
slow. We want higher performance…

7. Source: Yole

8. In monolithic approach active layers and devices on them are built
sequentially in bottom up approach on top of a wafer.
Pros: The vertical interconnects are formed between layers rather than
chips, using vias in the 𝑛𝑚 rather than 𝜇𝑚 range.
Cons: High quality active layer isolation need to be formed between each
active layers.
2. Crystallinity of upper layers is often imperfect.
3. This approach works only if polycrystalline silicon could be used for
making devices.
Reference: 3D Integration for VLSI Systems
Chuan Seng Tan, Kuan-Neng Chen, Steven J. Koester
 Better way : Stack chips with devices

9. 1. Temporary bonding needed before forming via, for thinning by CMP and debonding and
bonding again is a very complex and delicate process.
2. Thermal management issue:
• Stacking of memory chips alone does not produce heat issues, but integration with logic
Chip will have issues as neighboring memory chip will get high heat from adjacent
Logic chip.
• Copper via might help themselves will conduct out some heat but may not be enough.
• Low cost thermally aware via design is necessary
3. Copper reacts with Si, so passivation layer must be formed in the via walls before
filling in via with Cu, which is challenging
4. Stress is another issue:
Thermal expansively: Cu - 16.7ppm/C
W – 6-8 ppm/C
Si – 2.6 ppm/C
-> Stress development on wafer when TSVs expands.

10. • Thinned wafer/die handling and bow
management
• Si wafer cracking
• Supply of micro-bump between stacks.
• Defect visibility, measurement sensitivity and
identification
• Complexity of the system, hidden structures
• Design Test etc.
 Reliable non-destructive
metrology is needed

11.  Excellent tool for distinguishing and
quantifying crystallinity of silicon
surface
 Crystalline silicon
has very sharp peaks, such as the
one centered at ~ 520 cm-1
 Also, Micro-Raman spectroscopy:
useful to detect local stress on surface

12. Thesis: Keshab Raj Paudel, University of Missouri
𝑋𝑃𝑆, 𝑈𝑃𝑆: 𝐸 𝐵 = ℎ𝜈 − 𝐸 𝐾 − 𝑊
𝐴𝐸𝑆: 𝐾. 𝐸. = (𝐸 𝐾−𝐸𝐿1) − 𝐸23
Wide scan of 10nm Au nanoparticle on
Silicon surface
Angle resolved method:
-> Sensitive to nm scale layers
 Chemical analysis of surface
 Quantitative analysis

13. Dissertation: Keshab Raj Paudel, University of Missouri
 Very sensitive and fast compared to
dispersive IR absorption technique.
 Great for surface chemical analysis.
 Observation of Si-O bands are very intense.
C-H, C-C etc. modes characterize/identify
materials on Silicon wafer
Natural Diamond

14. Source: OLYMPUS
3D Metrology using IR Microscopy
A non-destructive imaging technique
• In-line monitoring of the 3D bonding process:
• Overlay alignment offset monitoring
• Tracking process variations
• Post bond defect inspection and review
 Confocal NIR microscopy using
interferometry looks further
Promising and is among already available
technologies and offers has new
possibilities
Limit: Can see only up to 𝟖𝟎𝟎 𝝁𝒎 inside

15. David Bernard, John Tingay et. al. "THE X-RAY METROLOGY OF TSVS AND
WAFER BUMPS” - Nordson DAGE, Feb 3, 2015
Oblique view x-ray image of 10 x 100 μm TSVs.
The lighter areas within the TSVs are voids.
X-ray image of 50 μm
diameter wafer bumps.
Top-down image.
Computer Tomography

16. Can limit X-ray beam from
0.1𝜇𝑚 𝑡𝑜 100𝜇𝑚 for higher resolution X − ray imaging
Working: Total External Reflection,
Critical incident angle,
𝜃𝑐 𝑟𝑎𝑑𝑖𝑎𝑛 = 002 ∗ 𝜌 (
𝑔
𝑐𝑚3)/𝐸(𝑘𝑒𝑉)
Ref.: X-Ray Spectrometry: Recent Technological Advances
edited by Kouichi Tsuji, Jasna Injuk, René Van Grieken
 Higher resolution than standard techniques

17.  Ultrasonic transducer to scan the wafer for defects that
modify the reflection of sound waves.
 Excels at finding voids and cracks,
Cons: Wafer needs to be immersed in a sound-conducting
liquid, usually distilled water.
 This requires a cleaning step after the sonic scan is
generated, while limiting application to wafers which will
not be contaminated by immersion.
 Relatively coarse with lateral resolution.
SEMICONDUCTOR International , August 2009
Acoustic image of a crack at
the bond interface in an Au-Si
bonded wafer pair.

18. Phase difference:
Γ =
2𝜋 𝑛1 𝑥1 − 𝑛2 𝑥2
𝜆
Light source
To spectrometer
 Non-destructive method
 Based on spectral reflectometry
 Several theoretical models (common: Rigorous Coupled Wave Theory)
 Highly promising
Source: IBM, ECTC 2014

19. Top CD and Depth
High Precision Allows Effective Control of Etch Rate and Uniformity
Source: IBM, ECTC 2014

20. Marvin B. Klein, W.E. Moerner et al., Optics Communications 162, 1999. 79–84
O. Ostroverkhova, W.E. Moerner et al., Chemical Reviews, Vol. 104, No. 7, 3267-3314, 2004
Schematic diagram of a laser ultrasonic receiver based on two-wave mixing
PR material: PVK:7-DCST:BBP:C60
 Major Advantage: Insensitive to fluctuations in the frequency of the laser
 Minimum detectable displacement: 𝜹𝒍𝒊𝒎
𝒊𝒅𝒆𝒂𝒍
= 𝟐. 𝟕 × 𝟏𝟎−𝟖
𝒏𝒎
 Varieties of PR materials developed thus far.
 Inexpensive experimental set up for R&D
 Dynamic hologram
 Strong ties with related people

21. Light: Science & Applications (2012) 1, e36; doi:10.1038/lsa.2012.36
www.nature.com/lsa

22. Driving factors:
 High density, multi-wavelength low-power photonics connectors ->
Enabler for Tbps applications
 High density photonics in 3DI-> Extreme 3D
Source: Emerging Technologies and Market Trends of Silicon
Photonics – S.Bernabé ECTC 2014

23. Knots and bolts for optical interconnects
1. Lasers
2. Waveguides – Si, cladded with SiO2
3. Ring resonators
4. Diode detectors (MSM, PIN III-V detectors)
5. Optical amplifiers ( e.g.. Erbium booster)
Challenges: Metrology again
1. Laser mode validation using external mode analysis tools such as scanning FB
Interferometer (which are commercially available, I have experience on such tools)
2. Pulse analysis using high speed spectrum analyzers ( e.t. Tektronix spectrum analyzer)
Check for stretch effect and intensity loss. Bit Error Rate (BER).
3. Test against micro bends and loss. – Challenging when waveguides are in the bulk of 3D
Geometry (good thing is that Si is transparent to IR), easier only in 2D geometry

24. Scanning Fabry-Perot Interferometer
Measures Laser linewidth as well.
Advanced Optics Lab, University of Missouri , Columbia
Tool not shown
resonance condition 𝜆 =
2𝑑
𝑚

25.  Speed becomes infinite in ENZ media.
Or
 Waves inside ENZ materials have very long
wavelength and essentially
have a uniform phase throughout the
propagation distance.
 Connect the two waveguides by an ENZ material, the coupling is better if the channel
is narrower !
 Metal clad waveguides near their cutoff frequency can mimic the ENZ material in the sense
that the effective mode index can approach zero.
Science, Vol. 340 no. 6130 pp. 286-287, 2013
𝚫 × 𝑬 = 𝒊𝝎𝝁𝑯
𝚫 × 𝑯 = 𝟎
𝚫 𝟐
𝑬 =
𝟏
𝒄 𝟐 (𝝏 𝟐
𝑬/𝝏𝒕 𝟐
)

26.  3DI manufacturing: rapidly developing and
promising with TSV
 Existing metrology tools: not sufficient for TSV
technology
 Optical scatterometry: several variants/models,
need further development
 Interferometric technique with PR materials:
Promising opportunity for metrology development
 Hybrid photonic integration: Progressing and it is
the future of high speed integration -> careful
optical studies/tests needed