The document discusses the signal descriptions and pins of the 8085 microprocessor. It describes the address bus, multiplexed address/data bus, control and status signals, power supply and clock frequency, externally initiated signals including interrupts, serial I/O ports, memory interfacing, memory structure, concepts in memory interfacing including selecting a chip and identifying a register, timing of memory read and write cycles, and address decoding. The 8085 has 16 address lines, 8 data lines that also serve as lower address lines, and various control signals like ALE, RD, WR that control read and write operations to memory or I/O devices.

1. Bharat sankhlecha
MICROPROCESSOR AND ITS
APPLICATION
Bharat Sankhlecha
bharat.sanklecha@lpu.co.in
Sr. Lecturer
Block 26 Room No. 205 Ch No. 13
M: 9501424515

2. SIGNAL DESCRIPTIONS AND PINS OF
8085 MICROPROCESSOR
• Address Bus
 The 8085 has 16 signal lines (pins) that are used as the
address bus.
• Multiplexed Address/ Data Bus
 The signal lines AD7-AD0 are bidirectional they serve a dual
purpose . They are used as the low order address bus as well
as data bus.
• Control and Status Signal
 ALE -Address latch enable: This is a positive going pulse
generated every time the 8085 begin an operation; it
indicates that the bits on AD7-AD0 are address bits.
 RD-Read: This is a read control signal(active low). This signal
indicates that the selected I/O or memory device is to be read
and data are available on the data bus.
 WR-Write: This is a write control signal (active low). This
signal indicates that the data on the data bus are to be written
into selected memory or I/O location.
 IO/M: This is a status signal used to differentiate between I/O
and memory operations. When it is high, it indicates an I/O
operation; when it is low, it indicates a memory operation.
This signal is combined with RD(Read) an WR(Write) to
generate I/O and memory control signals
 S1 and S0: These status signals, similar to IO/M, can identify
various operations, but they are rarely used in small
systems.
• Power Supply and Clock Frequency
 Vcc: +5V power supply
 Vss : Ground Reference
 X1,X2 : A crystal is connected at these two pins. The
frequency is internally divided by two therefore, to operate a
system at 3Mhz, the crystal should have a frequency of 6Mhz.
 CLK (OUT)- Clock Ouptut: This signal can be used as the
system clock for other devices.

3. CONT….
 Externally Initiated Signals, Including Interrupts
 INTR(Input) Interrupt Request: This is used
as a general purpose interrupt .
 INTA(Output) Interrupt Acknowledge : This
is used to acknowledge an interrupt.
 RST 7.5 , RST 6.5, RST 5.5(Inputs) Restart
Interrupts : These are vectored Interrupts
that transfer the program control to specific
memory locations. They have higher priorities
than the INTR interrupt.
 TRAP (Input )This is a nonmaskable interrupt
and has the highest priority.
 HOLD (Input) This signal indicates that a
peripheral such as a DMA (Direct memory
access) controller is requesting the use of the
address and data buses.
 HLDA (Output) Hold Acknowledge: This
signal acknowledge the HOLD request.
 Ready (Input) This signal is used to delay the
microprocessor Read or write cycles until a
slow responding peripheral is ready to send or
accept data. When this signal goes low, the
microprocessor waits for an integral number
of clock cycles until it goes high.
 Reset IN : When the signal on this pin goes
low, the program counter is set to zero, the
buses are tri-stated and, the MPU is reset.
 Reset OUT : This signal indicates that the
MPU is being reset. The signal can be used to
reset other devices.

4. CONT…..
 Serial I/O Ports
 The 8085 has two signals to
implement the serial
transmission: SID (Serial
Input Data) and SOD (Serial
Output Data).

5. MEMORY INTERFACING OF 8085
 Read/Write memory is a group of registers to
store binary information.

6. MEMORY STRUCTURE
Input
Data
Input Buffer WR
CS
A10
Internal R/W
Decoder Memory
2048 x 8
A0
Output
Buffer RD
output
Data
Typical Memory Chips : R/W Static Memory

7. BASIC CONCEPTS IN MEMORY
INTERFACING
 The primary function of Memory interfacing is
that the microprocessor should be able to read
from and write into a given register of a memory
chip.
 Step: 1 able to select the chip.
step:2 identify the register.
step:3 enable the appropriate buffer.

8.  Step to interface memory
1. Connect the required address line of the address
bus to the address of the memory chip.
2. Decode the remaining address lines of the address
bus to generate the chip select signal.
3. Generate control signals MEMR and MEMW by
combining RD and WR signals with IO/M and use
them to enable appropriate buffers.

9. TIMING OF MEMORY READ CYCLE

10. TIMING OF THE MEMORY WRITE CYCLE

11. ADDRESS DECODING AND MEMORY
ADDRESSES
 The process of address decoding should result in
identifying a register for a given address.

12.  We can obtain the address range of this memory
chip by analyzing the possible logic levels on the
16 address lines.
 The logic levels on the address lines A15-A12
must be 0000 to assert chip enable, and the
address lines A11-A0 can assume any
combinations from all 0s to all 1s. Therefore, the
memory address of this chip ranges from 0000H
to 0FFFH.