The document discusses harmonic elimination in solar powered multilevel inverters. It describes different inverter topologies and compares their weight, cost, power loss and ability to eliminate harmonics. Cascaded H-bridge inverters have advantages of lighter weight and lower cost. Selective harmonic elimination technique uses firing angle optimization to eliminate specific harmonics like 5th, 7th and 11th. Block diagram shows the harmonic elimination system connected to grid via an 11-level cascaded H-bridge inverter. Mathematical equations are provided for calculating the firing angles to eliminate desired harmonics from the output voltage waveform.
Selective harmonic elimination in a solar powered multilevel inverter
1. Harmonic Elimination in a Solar
Powered Multilevel Inverter
Dr. Shimi S.L
Assistant Professor, EE
NITTTR, Chandigarh
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
1
3. η(maximum efficiency)=
P(maximum power output)/(E(S,γ)(incident radiation flux)*A(c)(Area of collector))
12/4/2017 Dr. Shimi S.L, Assistant Professor, NITTTR, Chandigarh 3
4. Dr. Shimi S.L, Assistant Professor, NITTTR, Chandigarh12/4/2017 4
5. MAXIMUM POWER POINT TRACKING
(MPPT)
There are two basic approaches in
maximizing the power extraction:
(a) Using automatic sun tracker
(b) Searching for the MPP conditions
Perturb and Observe method
Incremental Conductance method
Artificial intelligence (AI) methods
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
5
7. • The height of a projectile that is fired
straight up is given by the motion equations
12/4/2017 Dr. Shimi S.L, Assistant Professor, NITTTR, Chandigarh 7
16. Equivalent Circuit (a) Switch ON (b) Switch OFF
𝐿 𝐶 = 𝐿 =
𝑅(1 –𝐷)
2𝑓
𝐶 𝐶 = 𝐶 =
1 – 𝐷
16𝐿𝑓2
For a switching frequency of 80 KHz and inductance current ripple (∆𝐼) of 10%
the 𝐿 𝑐 and 𝐶𝑐 are approximated as 1mH and 100µF respectively
∆𝐼 =
𝑉𝑠 𝐷(1 –𝐷)
𝑓𝐿
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
16
17. Parameters of Buck Converter
Sr. No. Parameter Value
1 Inductor (L) 1mH
2 Inductor series resistance (RL) 80 mΩ
3 Output capacitor (Co) 100 µF
4 Output capacitor ESR (Rco) 30 mΩ
5 Input capacitor (Ci) 100 µF
6 Input capacitor ESR (Rci) 30 mΩ
7 Switching frequency (fs), 80 KHz
8 Input voltage 20 V
9 Duty-ratio (D) Variable
10 Load resistance 9 Ohm
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
17
18. MATLAB/SIMULINK Model of Buck Converter
Components of PWM Block Subsystem
12/4/2017 Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
18
19. PWM with 0.5 Value of Duty-cycle
Input and Output Voltages Waveforms of Buck Converter
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
19
26. Specification of DS1104 R&D Controller Board
Parameter Characteristics
Processor MPC8240 processor with PPC603e core and on-chip
peripherals
• 64-bit floating-point processor
• 250 MHz CPU
• 2 x 16 KB cache; on-chip
• On-chip PCI bridge (33 MHz)
Memory Global memory: 32 MB SDRAM
• Flash memory: 8 MB
ADC
1 x 16-bit ADC with mux
4 x 12-bit ADC
5 ADC channels (1 x 16-bit + 4 x 12-bit) can be
sampled simultaneous
• 16-bit resolution
• ±10 V input voltage range
• 2μs conversion time, 12-bit resolution
• ±10 V input voltage range
• 800 ns conversion time
Slave DSP subsystem • Texas Instruments TMS320F240 DSP
• 16-bit fixed-point processor
• 20 MHz clock frequency
• 64 K x 16 external program memory
• 28 K x 16 external data memory
• 4 K x 16 dual-port memory for communication
• 16 K x 16 flash memory
• 1 x 3-phase PWM output, 4 x 1-phase PWM output
• ±13 mA maximum output current
Host interface • 32-bit PCI host interface
• 5VPCI slot
• 33MHz±5 %
Power supply • +5 V ±5 %, 2.5 A
• +12 V ±5 %, 0.3 A
Power consumption 18.5 W
12/4/2017 Dr. Shimi S.L, Assistant Professor, NITTTR, Chandigarh 26
34. MATLABTM / SIMULINKTM Model of
Maximum Power Output (Pmax)
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
34
35. Sub-System for Fill Factor
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
35
36. Sub-system for Short Circuit Current
Sub-system for Open Circuit Voltage
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
36
37. Response of Pmax, Voc , Isc , FF & Irradiance
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
37
38. Fig. Experimental Result of PO with Delta D=0.01
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
38
39. MPPT ALGORITHM COMPARISION
Maximum Power Point
Techniques Method
ᶯ
( %)
Peak
Overshoot
( %)
Settling
time
( sec)
Dynamic
Response
Delay
( sec)
Steady
State Error
( %)
Sensors
Voltage -V
Current -I
Perturb & Observe (ΔD=0.1)
77.60 - 79.39 No 0.48 0.06 15.14 V, I
Perturb & Observe (ΔD=0.01) 81.00 - 81.60 No 0.41 0.039 12.77 V, I
Perturb & Observe (ΔD=0.001) 81.23 - 84.37 No 0.40 0.04 12.03 V, I
Incremental Conductance 86.32 - 87.25 3.35 1.78 0.001 7.35 V, I
Neural Network 87.35 - 90.10 2.185 0.6439 0.038 3.88 V, I
Adaptive Neuro Fuzzy Inference
System (ANFIS)
87.15 - 93.31 6.56 5.35 0 3.55 V, I
ANFIS &
CVT
≥12V NA 7.28 0.18 0.1 9 V
12V 87.15 - 93.31 6.56 5.35 0 3.55 V, I
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR, Chandigarh
39
40. Selective Harmonic Elimination in
a Solar Powered Multilevel
Inverter
Dr. Shimi S.L
Assistant Professor, EE
NITTTR, Chandigarh
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
40
41. Weight, Cost, Power Loss and Harmonics
Comparison for Different Inverter TopologiesTypeof
inverter
No.of
switches
No.of
capacitors
No.of
diodes
Weight
Cost
PowerLoss
(W)
Harmonics
2-level
12 0 0
Light
Weight
Cheap Very low THD > 40%
5-level diode
Clamped
24 12 36
Medium Weight Costly Low 5th harmonics Eliminated
THD >15%
5-level capacitor
clamped
24 30 0
Heavy Very Costly Low 5th harmonics Eliminated
THD >15%
5-level cascaded
24 0 0
Light
Weight
Cheap Low 5th harmonics Eliminated
THD >15%
9-level diode clamped
48 24 42
Medium Weight Costly medium 5th , 7th & 11th harmonics Eliminated
THD >7%
9-level capacitor
clamped
48 60 0
Heavy Very Costly medium 5th , 7th & 11th harmonics Eliminated
THD >7%
9-level cascaded
48 0 0
Light
Weight
Cheap medium 5th , 7th & 11th harmonics Eliminated
THD >7%
11-level diode
clamped 60 30 90
Medium Weight Costly High 5th , 7th , 11th &13th harmonics
Eliminated
THD <5%
11-level capacitor
clamped 60 75 0
Heavy Very Costly High 5th , 7th , 11th &13th harmonics
Eliminated
THD <5%
11-level cascaded
60 0 0
Light
Weight
Cheap high 5th , 7th , 11th &13th harmonics
Eliminated
THD <5%
41
42. Cascaded H-bridge Inverter
Va
(b)
Va[(m-1)/2]
(a)
(a) Single Phase Cascaded H-bridge Inverter Topology with m Levels
(b) Output Phase Voltage with Non Equal dc Source
n
Vdc1
S1
S2
S3 S4
Va
Vdcm
S1
S2
S3 S4
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
42
43. Block Diagram of the Harmonic Elimination
System
GRID
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
43
45. Selective Harmonic Elimination
Technique
(10)
(11)
(12)
(13)
(14)
(16)
(17)
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
45
f 1 = cos α1 + cos α2 + cos α3 + cos α4 + cos α5 = mi
f 2 = cos 5α1 + cos 5α2 + cos 5α3 + cos 5α4 + cos 5α5 = 0
f 3 = cos 7α1 + cos 7α2 + cos 7α3 + cos 7α4 + cos 7α5 = 0
f 4 = cos 11α1 + cos 11α2 + cos 11α3 + cos 11α4 + cos 11α5 = 0
f 5 = cos 13α1 + cos 13α2 + cos 13α3 + cos 13α4 + cos 13α5 = 0
46. f 1 = [Vdc1cos α1 + Vdc2cos α2 + Vdc3cos α3 + Vdc4cos α4 + Vdc5cos α5 ]=mi
f 2 = [Vdc1cos 5α1 + Vdc2cos 5α2 + Vdc3cos 5α3 + Vdc4cos 5α4 +
Vdc5cos 5α5 ] = 0
f 3 = [Vdc1cos 7α1 + Vdc2cos 7α2 + Vdc3cos 7α3 + Vdc4cos 7α4 +
Vdc5cos 7α5 ] = 0
f 4 = [Vdc1cos 11α1 + Vdc2cos 11α2 + Vdc3cos 11α3 + Vdc4cos 11α4 +
Vdc5cos 11α5 ]=0
f 5 = [Vdc1cos 13α1 + Vdc2cos 13α2 + Vdc3cos 13α3 + Vdc4cos 13α4 +
Vdc5cos 13α5 ] = 0
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
46
The cost function for SHE problem is given by,
𝑓 𝑋𝑖 = 100 ∗
( 𝑓 2 + 𝑓 3 + 𝑓 4 + 𝑓 5 )
𝑓 1
47. Newton Raphson - SHE
• The algorithm for the Newton-Raphson method is as follows:
Step 1 Assume any random initial guess for switching angles (say 𝛼0 )
The switching angle matrix is :
𝛼 𝑗 = [𝛼1
𝑗 + 𝛼2
𝑗 + 𝛼3
𝑗 + 𝛼4
𝑗 + 𝛼5
𝑗 ] 𝑇
Step 2 Set modulation index to zero.
Step 3 Evaluate the non-linear system matrix 𝐹 𝑗 , the Jacobian matrix
𝜕𝑓
𝜕𝛼
𝑗
and
the harmonics amplitude matrix 𝑇 represented below:
The non-linear system matrix,
𝐹 𝑗 = cos 𝛼1
𝑗 + cos 𝛼2
𝑗 + cos 𝛼3
𝑗 + cos 𝛼4
𝑗 + cos 𝛼5
𝑗
cos 5𝛼1
𝑗
+ cos 5𝛼2
𝑗
+ cos 5𝛼3
𝑗
+ cos 5𝛼4
𝑗
+ cos 5𝛼5
𝑗
cos 7𝛼1
𝑗
+ cos 7𝛼2
𝑗
+ cos 7𝛼3
𝑗
+ cos 7𝛼4
𝑗
+ cos 7𝛼5
𝑗
cos 9𝛼1
𝑗
+ cos 9𝛼2
𝑗
+ cos 9𝛼3
𝑗
+ cos 9𝛼4
𝑗
+ cos 9𝛼5
𝑗
cos 11𝛼1
𝑗
+ cos 11𝛼2
𝑗
+ cos 11𝛼3
𝑗
+ cos 11𝛼4
𝑗
+ cos 11𝛼5
𝑗
(18)
(19)
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
47
48. the Jacobian matrix,
𝜕𝑓
𝜕𝛼
𝑗
=
− sin 𝛼1
𝑗 − sin 𝛼2
𝑗 − sin 𝛼3
𝑗 − sin 𝛼4
𝑗 − sin 𝛼5
𝑗
− 5sin 5𝛼1
𝑗
− 5 sin 5𝛼2
𝑗
− 5 sin 5𝛼3
𝑗
− 5sin 5𝛼4
𝑗
− 5 sin 5𝛼5
𝑗
− 7sin 7𝛼1
𝑗
− 7sin 7𝛼2
𝑗
− 7 sin 7𝛼3
𝑗
− 7sin 7𝛼4
𝑗
− 7 sin 7𝛼5
𝑗
− 9sin 9𝛼1
𝑗
− 9sin 9𝛼2
𝑗
− 9sin 9𝛼3
𝑗
− 9sin 9𝛼4
𝑗
− 9sin 9𝛼5
𝑗
− 11sin 11𝛼1
𝑗
− 11sin 11𝛼2
𝑗
− 11 sin 11𝛼3
𝑗
− 11sin 11𝛼4
𝑗
− 11 sin 11𝛼5
𝑗
and the corresponding harmonic amplitude matrix,
𝑇 = [𝑚𝑖
3𝜋
4
0 0 0 0] 𝑇
The solutions must satisfy the following condition:
0 ≤ 𝛼1 ≤ 𝛼2 ≤ 𝛼3≤ 𝛼4 ≤ 𝛼5≤
𝜋
2
Step 4 Compute correction Δα during the iteration using relation,
∆𝛼 =
𝜕𝑓
𝜕𝛼
𝑗
𝛼𝑗 (𝑇-𝐹 𝑗
)
Step 5 Update the new switching angles as,
𝛼 𝑘 + 1 = 𝛼 𝑘 + ∆𝛼(𝑘)
Step 6 To obtain a feasible solution of switching angles by executing the following
transformation:
𝛼 𝑘 + 1 = cos−1
(abs(cos(𝛼 𝑘 + 1 )))
(20)
(21)
(22)
(23)
(24)
(25)
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
48
49. Step 7 Repeat steps (3) to (6) for sufficient number of iterations to attain error
goal.
Step 8 Increment modulation index by a fixed step.
Step 9 Repeat steps (2) to (8) for whole range of modulation index .
This algorithm can be implemented using MATLABTM programming. After
successfully executing and running the program the optimal firing angles
α1, α2, α3 , α4 and α5 can be obtained.
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
49
50. {
initialize population;
evaluate population;
while Termination Criteria Not Satisfied
{
select parents for reproduction;
perform crossover and mutation;
evaluate population;
}
}
Genetic Algorithm (GA)
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
50
51. The GA Cycle of
Reproduction
reproduction
population evaluation
modification
discard
deleted
members
parents
children
modified
children
evaluated children
52. Consider the problem of maximizing the
function,
f(x) = x2
Where x is permitted to vary between 0 to 31.
(i) 0(00000) and 31(11111) code x into finite
length string
(ii) Select initial population at random (size 4)
(iii) Calculate fitness value for all strings
(iv) probability of selection by:
𝑃𝑟𝑜𝑏𝑖=
𝑓(𝑥) 𝑖
σ 𝑖=1
𝑛
𝑓(𝑥) 𝑖
,
60. 12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
60
Step 1 Initialize the system parameters for MATLABTM / GA toolbox such as
CrossoverFcn as @crossoverscattered, CrossoverFraction as 0.8, SelectionFcn as
@selectionstochunif , 'CreationFcn' as @gacreationlinearfeasible and 'MutationFcn'
as @mutationadaptfeasible. Assign the values of Generations as 100, Population
Size as 40 and PopInitRange as [0;1].
Step 2 Now evaluate the particles using the Fitness Function
𝑓 𝑋𝑖 = 100 ∗
( 𝑓 2 + 𝑓 3 + 𝑓 4 + 𝑓 5 )
𝑓 1
for harmonic elimination.
Here the switching angles 𝛼1, 𝛼2, 𝛼3, 𝛼4and 𝛼5 are chosen in such a way that the
selective 5th, 7th, 11th and 13th harmonics can be eliminated.
Step 3 Check the constraints 0 ≤ 𝛼1 ≤ 𝛼2 ≤ 𝛼3 ≤ 𝛼4 ≤ 𝛼5 ≤ 𝜋/2.
Step 4 Select the parent chromosomes.
Step 5 Create the new offspring using crossover and mutation.
Step 6 Check if termination criteria ( the maximum number of iterations) is reached. If
not goto Step 2.
Step 7 If optimized switching angles are obtained, terminate the problem.
62. Step 1: Initialize the system parameters such as Position Vector Xi, Velocity Vector Vi,
Personal Best Particle Vector Pi, Global Best Vector Pg and Particle Inertia Weight
C0 . Assign the values of Generations as 100, Population Size as 40, Cognitive
Parameter C1 as 0.5 and Social Parameter C2 as 1.25.
Step 2: Check for the conditions 0<(C1+C2)<4 and (C1+C2)/2<C0<1, If the two
conditions are satisfied then the system will be guaranteed to converge to a stable
equilibrium point. If false goto Step 1.
Step 3 Update the Velocity , Vi(t+1).
Step 4 Update the Position, Xi(t+1).
Step 5 Now evaluate the particles using the Fitness Function,
f(Xi) = 100*(|f(2)|+|(f(3)|+|f(4)|+|f(5)|) / (|f(1)|) for harmonic elimination. Here the
switching angles are chosen in such a way that the selective 5th , 7th , 11th and
13th harmonics can be elimination.
f(1)=(cos( )+cos( )+cos( )+cos( )+cos( ))- ma;
f(2)=(cos(5* )+cos(5* )+cos(5* )+cos(5* )+cos(5* ));
f(3)=(cos(7* )+cos(7* )+cos(7* )+cos(7* )+cos(7* ));
f(4)=(cos(11* )+cos(11* )+cos(11* )+cos(11* )+cos(11* ));
f(5)=(cos(13* )+cos(13* )+cos(13* )+cos(13* )+cos(13* ));
Step 6 Check the constraints.
Step 7 Check for the condition f(xi) < f(Pi) , if not satisfied then i=i+1goto Step 3 .
Step 8 Update the local best position of the particle if it is better than the previous local
best position . Thus the local best position is replaced as Pi=Xi.
Step 9 Update the global best position as Pg=min(P neighbor).
Step 10 Optimized switching angles are obtained .Terminate the problem.12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
62
63. NR Algorithms
GA Algorithms
PSO Algorithms
Optimized Switching Angles using NR, GA and PSO Algorithms for 11 Level Inverter
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
63
64. THD Versus Modulation Index of 7, 9 and 11 Level Cascaded H-bridge
Inverters for NR, GA and PSO Algorithms
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
64
65. 11 Level Cascaded H-bridge Inverter Applied with NR-SHE Algorithm for 0.8 Value of MI
Line Voltage Waveform
Phase Voltage Waveform
Current Waveform
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
65
66. Harmonic Spectrum at 0.8 MI for NR-SHE Algorithm for a 11 level Cascaded H-bridge Inverter
Phase Voltage Spectrum
Line Voltage Spectrum
Current Spectrum
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
66
67. TechniqueUsed
11 Level Cascaded H-bridge Inverter
Magnitude of Harmonic Contents (%) up to 19th Order
Line Voltage
(THD 5.55%)
105.8 peak (74.83 rms)
Phase Voltage
(THD 7.93%)
61.14 peak (43.23 rms)
Current (THD 5%)
0.6063 peak (0.4287 rms)
Harmo
nic
Order
Even
Harmo
nic
Harmo
nic
Order
Odd
Harmo
nic
Harmo
nic
Order
Even
Harmo
nic
Harmo
nic
Order
Odd
Harmo
nic
Harmo
nic
Order
Even
Harmo
nic
Harmo
nic
Order
Odd
Harmo
nic
NR
0th 0.00 1th 100 0th 0.00 1th 100 0th 0.01 1th 100
2nd 0.00 3rd 0.02 2nd 0.00 3rd 0.60 2nd 0.00 3rd 0.02
4th 0.00 5th 0.09 4th 0.00 5th 0.04 4th 0.00 5th 0.07
6th 0.00 7th 0.08 6th 0.00 7th 0.06 6th 0.00 7th 0.09
8th 0.00 9th 0.06 8th 0.00 9th 3.26 8th 0.00 9th 0.06
10th 0.00 11th 0.10 10th 0.00 11th 0.10 10th 0.00 11th 0.11
12th 0.00 13th 0.02 12th 0.00 13th 0.02 12th 0.00 13th 0.03
14th 0.00 15th 0.09 14th 0.00 15th 1.04 14th 0.00 15th 0.08
16th 0.00 17th 2.65 16th 0.00 17th 2.58 16th 0.00 17th 2.62
Magnitude of Harmonic Contents (%) up to 19th Order for 11 Level
Cascaded H-bridge Inverter Applied with NR-SHE Technique
12/4/2017 Dr. Shimi S.L, Assistant Professor, NITTTR, Chandigarh 67
68. 1. Intelligent Power Module (Power Circuit)
2. Firing Pulse for H-bridge Inverter
(a) Optocoupler (b) Gate Driver
(c ) AND Gate (d) Schmitt Trigger
(e) FPGA Based Spartan 3A DSP Board
3. Protection Circuit
4. Regulated Power Supply
5. Signal Conditioning Circuit
6. Constant and Isolated dc Supply for MLI
7. 3 Φ Induction Motor Load
8. Power Quality Analyzer
9. PC with MATLAB/SIMULINK and Xilinx
Software Packages
Block Diagram of the Hardware
Implementation of 3 Φ MLI
12/4/2017 Dr. Shimi S.L, Assistant Professor, NITTTR, Chandigarh 68
69. Complete Laboratory setup of 3 Φ 11
Level Cascaded H-bridge Inverter
3Φ Induction Motor
Power Quality Analyzer
CHMLISpartan®-3A
DSP FPGA
CHMLI
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
69
70. Experimental Results for 11 Level
Inverter (a) Output Line Voltage (b)
Phase Voltage and (c) Current at
M=0.8 (NR-SHE)
(a)
(b)
(c)12/4/2017 Dr. Shimi S.L, Assistant Professor, NITTTR, Chandigarh 70
71. (a)
(b)
Experimental Results for 11 Level
Inverter (a) Line Voltage FFT
Analysis (b) Phase Voltage FFT
Analysis and (c) Current FFT
Analysis at M=0.8 (NR-SHE)
(b)
(c)
12/4/2017 Dr. Shimi S.L, Assistant Professor, NITTTR, Chandigarh
71
72. Optimum Switching Angles and Minimum THD using NR-SHE, GA-SHE
and PSO-SHE
Technique Method Mi Alpha 1 Alpha 2 Alpha 3 Alpha 4 Alpha 5
Line
Voltage
THD
(%)
Phase
Voltage
THD
(%)
Current
THD
(%)
NR
Simulation
0.8 0.1147 0.3306 0.4744 0.7878 1.0864 5.55 7.93 5
Hardware 0.8 0.1147 0.3306 0.4744 0.7878 1.0864 4.8 6.7 3.3
PSO
Simulation
0.9 0.0709 0.1466 0.3481 0.4505 0.7265 4.79 16.02 4.00
Hardware 0.9 0.0709 0.1466 0.3481 0.4505 0.7265 3.7 15 3
GA
Simulation
0.91 0.0676 0.1637 0.3509 0.4871 0.7473 4.3 14.77 3.73
Hardware 0.91 0.0676 0.1637 0.3509 0.4871 0.7473 3.4 13.4 2.7
12/4/2017 Dr. Shimi S.L, Assistant Professor, NITTTR, Chandigarh 72
74. Comparison of Harmonics Content (%) up to 15th Order of Line Voltage
for 11 Level Cascaded H-bridge Inverter Applied with Different Techniques
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
74
75. Comparison of Magnitude of Line Voltage THD and Harmonics Content for
CHMLI Applied with NR-SHE, PSO-SHE and GA-SHE Algorithms
THD
12/4/2017
Dr. Shimi S.L, Assistant Professor, NITTTR,
Chandigarh
75