IEEE INTERNATIONAL CONFERENCE - Paper Title "Real-Time Implementation of Phasor Measurement Unit Using NI CompactRIO". Code Available on: https://github.com/anmold-07/Synchrophasor-Estimation

1. ICAETGT-2017
Paper ID: ICAETGT-034
IEEE INTERNATIONAL CONFERENCE
Advances In Electrical Technology For Green Energy
Real-Time Implementation of Phasor Measurement Unit
Using NI CompactRIO
Presented by,
Mr. Anmol Dwivedi, Department of EEE, NIT Tiruchirappalli
Co-Authors: K.T. Sai Akhil, N. Sai Suprabhath, B. Mallikarjuna, Dr. M. Jaya Bharata Reddy, Dr. D.K. Mohanta

2. • Introduction
• Functional Block Diagram of a PMU
• Synchrophasor Estimation algorithms using DFT
• Estimation of Local Frequency and Rate of Change of Frequency (ROCOF)
• Hardware Setup & Results
• Conclusion
• References
PRESENTATION OUTLINE

3. INTRODUCTION
Conventional power system monitoring consist of RTU-SCADA system.
RELATIVELY SLOW
• Periodically scans information from numerous devices which last from 2 to 10 seconds.
• Data retrieved no longer represent the system state accurately under dynamic conditions.
ASYNCHRONOUS
• Does not provide accurate angle difference information from two nodes on the network.
Asynchronous and slow nature of the SCADA system does not provide power system information at subsecond time
frames to the state estimator.
CONVENTIONAL APPROACH

4. RELATIVELY FAST
• Phasor measurement units (PMUs) sample voltage and current at high sampling frequencies.
SYNCHRONOUS
• Synchrophasors provide phasor measurements of voltages and currents on a common time reference
and accurately time-stamp each sample.
This technology provide high-speed and coherent real-time information of the power system that is not available
from Supervisory Control and Data Acquisition (SCADA) systems
SYNCHROPHASOR TECHNOLOGY
INTRODUCTION

5. FUNCTIONAL BLOCK DIAGRAM OF A PMU
• Anti-aliasing filter attenuates the unwanted high-frequency components below a certain value in power
systems signals.
• The Analogue to Digital conversion is carried out in conjunction with the time synchronization module (GPS
receiver).
• The Phasor Microprocessor performs the needful computations using DFT algorithms and PLL control circuit
to time stamp these estimates.

6. Discrete Fourier Transform (DFT)
Recursive AlgorithmNon-Recursive Algorithm
0
( ) (2 )m
y t Y cos f t  
• These are the Classical algorithms used for the estimation of current and voltage phasors
For an electrical signal given by , can also be represented by if sampled
a sampling frequency of , where
0f

m
Y

- Frequency of signal
- Amplitude of signal
- Phase angle
- Sampling angle
N - Number of samples per cycle
The Discrete Fourier Transform (DFT) for the signal yn is represented by :
1
1
0
2
[ ( ) ( )]
N
N
n
n
Y y cos n jsin n
N
 



 
( )n m
y Y cos n  
0
Nf
1
1
0
{ }2 N
N
n
n
i n
Y y
N
e 




 

7. Non-Recursive Algorithm
Sampling frequency of 600 Hz
11
0
11 { }
2
2
1
n
n
i n
Y y e 


 
11
1
12
0
{ }
12
2
n
n
i n
Y y e 



 
1st Estimate -
2nd Estimate -
11
13
2
0
{ }
12
2
n
n
i n
Y y e 



 3rd Estimate -
• Non-Recursive algorithm will give a constant
phasor magnitude and an increase in angle
for every new window where,
2
30
12

  

( ) 100cos(100 ) 70.707
6
x t t

   ∠30˚

8. Window 1
Window 2
0 1 2 3 4 5 6 7 8 9 10 11, , , , , , , , , , ,y y y y y y y y y y y y
1 2 3 4 5 6 7 8 9 10 11 12, , , , , , , , , , ,y y y y y y y y y y y y
1 2 3 4 5 6 7 8 9 10 11, , , , , , , , , ,y y y y y y y y y y y
It is clear that sample number 1 to 11
are common to both windows
If we can arrange to keep the
multipliers common to both
the windows we can save
considerable computations

9. Recursive Algorithm
y0
y1
y2
y3 y4
y5
y6
y7
y8 y9
y10
y11
y12

10. Real
Imaginary
Unit circle
𝑒−𝑗0𝜃
𝑒−𝑗1𝜃
𝑒−𝑗2𝜃𝑒−𝑗3𝜃
𝑒−𝑗4𝜃
𝑒−𝑗5𝜃
𝑒−𝑗6𝜃
𝑒−𝑗7𝜃 𝑒−𝑗11𝜃
𝑒−𝑗10𝜃
𝑒−𝑗9𝜃
𝑒−𝑗0𝜃
𝑒−𝑗1𝜃
𝑒−𝑗2𝜃 𝑒−𝑗3𝜃 𝑒−𝑗4𝜃 𝑒−𝑗5𝜃
𝑒−𝑗6𝜃
𝑒−𝑗7𝜃 𝑒−𝑗8𝜃 𝑒−𝑗9𝜃
𝑒−𝑗10𝜃
𝑒−𝑗11𝜃
𝑒−𝑗12𝜃 𝑒−𝑗13𝜃
11
0
11 { }
2
2
1
n
n
i n
Y y e 


 
12 11
1
(0)
02
2
(
2
)
1
j
Y Y y y e 
  
Recursive Algorithm
13 12
1 1
(1)
3
2
(
2
)
1
j
Y Y y y e 
  
Window-1
Window-2
Window-3
1st Estimate
2nd Estimate -
3rd Estimate -
• Recursive algorithm will give a
constant phasor magnitude and
constant angle θ for every new window.
𝑒−𝑗0𝜃
𝑒−𝑗1𝜃

11. Estimation of Local Frequency and Rate of Change of
Frequency (ROCOF)
1
2
(1 / )
n n
o
d
f
dt Nf
 


  
0 0
1
2
d
f f f f
dt


    
df
ROCOF
dt

Estimation of change in frequency:
Estimation of frequency:
Estimation of Rate of Change of frequency:
1,n n  Where are consecutive phase angles estimates obtained from recursive algorithm

12. Hardware Setup
Setup used for synchrophasor estimation comprises of :
• 3-𝜙, 400km Extra High Voltage (EHV) transmission line laboratory prototype model
• 3-𝜙 power supply of 50Hz, 30V (line voltage) maintained at source bus
• 3-𝜙 resistive load maintained at load bus
• NI compactRIO-9063 (Phasor Measurement Unit)
2 Bus System

13. • NI c-RIO 9063 is a user-programmable FPGA to
implement high-speed control and custom timing
and triggering directly in hardware
• It is a 667 MHz Dual-Core CPU, 256 MB DRAM,
512 MB Storage, 4-Slot Compact-RIO Controller
• The cRIO-9063 is an embedded controller ideal for
advanced control and monitoring applications
NI compact-RIO 9063
Specifications:
LabVIEW FPGA

14. • NI- 9225 is a 3-Channel C Series Voltage Input Module
which can measure upto 300 Vrms at a maximum sampling
frequency of 50 kS/s/ch
• Analogue Input module
• The wide measurement range is well suited for high-
voltage measurement applications
NI 9225 Voltage Module
Specifications:

15. • NI- 9227 is a 4-channel Current Input Module which
can measure upto 5 Amperes at a maximum sampling
frequency 50 kS/s/ch
• It was designed to provide high-accuracy
measurements to meet the demands of data
acquisition and control applications
• It includes built-in anti-aliasing filters
NI 9227 Current Module
Specifications:

16. • NI-9467 provides accurate time synchronization for
Compact-RIO systems with the help of FPGA
Timekeeper
• Module can be used for accurate data timestamping,
system clock setting, gating data acquisition based on
the arrival of the PPS, and synchronizing global
waveform acquisition data using the FPGA.
NI 9467 GPS Module
Specifications:

17. Hardware Setup (Block Diagram)

18. Hardware Results

19. Hardware Results

20. Conclusion
• This paper presents real time implementations of PMUs using NI-
c-RIO in the LabVIEW software platform.
• The result shows the phasor information of the load and source
bus which are estimated using the recursive and Non-Recursive
DFT algorithm in real-time.
• The hardware results portray the effective real-time monitoring
of power system network using PMUs and a local PDC.

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References

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