Addressing Modes of 8051
Symbol or nomenclature used for data or memory
Instruction sets of 8051
Assembler and Assembler Directives
Delay Calculation
Examples on Delay Calculation
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Microcontroller 8051 instruction set and assemble directives
1. Instruction sets and Programming of 8051
Microcontroller
Dr. Nilesh Bhaskarrao Bahadure
nbahadure@gmail.com
https://www.sites.google.com/site/nileshbbahadure/home
July 25, 2021
Dr. Nilesh Bhaskarrao Bahadure () Unit - II (Part I) July 25, 2021 1 / 34
2. Overview I
1 Addressing Modes of 8051
Symbol or nomenclature used for data or memory
2 Instruction sets of 8051
Data Transfer Group
Summary of Data Transfer Group
Summary of Arithmetic Group
Summary of Logical Group
Summary of Boolean Instruction Group
Summary of Branching Instruction Group
3 Assembler and Assembler Directives
4 Delay Calculation
5 Examples on Delay Calculation
Example 1
Example 2
Example 3
Example 4
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4. Addressing Modes of 8051
1 Immediate addressing mode (IAM)
2 Register addressing mode (RAM)
3 Direct addressing mode (DAM)
4 Indirect or register indirect addressing mode (RIAM)
5 Indexed or base register plus index register addressing modes
Main Slide
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5. Addressing Modes of 8051
Symbol Meaning
# (Pound Sign)
For immediate value or data
@Ri
i = 0 or 1 memory location using RIAM
Rn
n = 0 to 7, registers R0 to R7 from register bank
Direct
ON chip internal RAM and SFR
Bit
bit addressable address of RAM memory
Rel
relative memory location (8 bit address used with
branching instructions)
Addr/addr16
16 - bit address
Addr11/sadd
11 - bit address / absolute address
Table : symbol or nomnclature
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6. Instruction sets of 8051
1 Data Transfer Group
2 Arithmetic Group
3 Logical Group
4 Boolean instruction group
5 Branching instruction group
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7. Data Transfer Group
1. MOV A, #DATA
This instruction copy 8 - bit data given along with the instruction to the
accumulator
2. MOV A, Rn
Transfers or copy the contents of register Rn to the accumulator
3. MOV A, DIRECT
Copy direct byte to the accumulator
4. MOV A, @Ri
Copy indirect byte to the accumulator
5. MOV Rn, A
Copy accumulator to the register Rn
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8. Data Transfer Group...
6. MOV Rn, #DATA
Copy 8 - bit immediate data to the register
7. MOV Rn, DIRECT
Copy direct byte to the register
8. MOV DIRECT, A
Copy accumulator to direct byte
9. MOV DIRECT, Rn
Copy registers Rn to the direct byte
10. MOV DIRECT,#DATA
Copy 8 - bit immediate data to the direct byte
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9. Data Transfer Group...
11. MOV DIRECT, DIRECT
Copy direct byte to direct byte
12. MOV DIRECT, @Ri
Copy indirect byte to direct byte
13. MOV @Ri, A
Copy accumulator to the indirect byte
14. MOV @Ri, #DATA
Copy 8 - bit immediate data to the indirect byte
15. MOV @Ri, DIRECT
Copy direct byte to indirect byte
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10. Data Transfer Group...
16. MOV DPTR, #16 BIT DATA
Copy 16 - bit immediate data to the 16 - bit register DPTR
17. MOVX, A @Ri
Copy contents of external RAM memory to the accumulator
18. MOVX @Ri, A
Copy accumulator to the external RAM memory location
19. MOVX A, @DPTR
Copy contents of external RAM memory location (16 bit address) to the
accumulator
20. MOVX @DPTR, A
Copy accumulator to the external RAM memory location (16 -bit address)
pointed by DPTR
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11. Data Transfer Group...
21. MOVC A, @A + DPTR
Copy contents of external ROM memory location pointed by A + DPTR
to Accumulator
22. MOVC A, @A + PC
Copy contents of Internal ROM memory location pointed by A + PC to
Accumulator
23. PUSH DIRECT
In this instruction, SP is first Incremented by 1 and then contents of
Internal RAM Memory Location or SFRs is copied in the Stack Memory
pointed by Stack Pointer Register. Pushing the data on the Stack
supports only 1 Addressing Mode .i.e. Direct Addressing Mode
Main Slide
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12. Data Transfer Group...
24. POP DIRECT
This instruction copies the contents of Internal RAM Memory Location
pointed by Stack Pointer to the given direct byte and then the value in
Stack Pointer is decremented by one.
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13. Data Transfer Group...
25. XCH A, Rn
Exchange the contents of Register Rn (where n varies from 0 to 7) with
Accumulator.
26. XCH A, DIRECT
Exchange the contents of Register Accumulator with direct byte (Internal
RAM + SFRs).
27. XCH A, @Ri
Exchange the contents of Accumulator with the contents of Internal RAM
pointed by R0 or R1.
28. XCHD A, @Ri
Exchange the Lower digit/Lower nibble of Accumulator with lower
digit/nibble of memory pointed by R0 or R1.
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14. Summary of Data Transfer Group
Sr. No. Instruction No. of Bytes No. of Cycles
01 MOV A, Rn 01 01
02 MOV A, #DATA 02 01
03 MOV A, DIRECT 02 01
04 MOV A, @Ri 01 01
05 MOV Rn, A 01 01
06 MOV Rn, #DATA 02 01
07 MOV Rn, DIRECT 02 02
08 MOV DIRECT, A 02 01
09 MOV DIRECT, Rn 02 02
10 MOV DIRECT, #DATA 03 02
11 MOV DIRECT, DIRECT 03 02
12 MOV DIRECT, @Ri 02 02
13 MOV @Ri, A 01 01
14 MOV @Ri, #DATA 02 01
Table : Summary of Data Transfer Group
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15. Summary of Data Transfer Group
Sr. No. Instruction No. of Bytes No. of Cycles
15 MOV @Ri, DIRECT 02 02
16 MOV DPTR, #16 -BIT DATA 03 02
17 MOVX A, @Ri 01 02
18 MOVX @Ri, A 01 02
19 MOVX A, @DPTR 01 02
20 MOVX @DPTR, A 01 02
21 MOVC A, @A+DPTR 01 02
22 MOVC A, @A + PC 01 02
23 PUSH DIRECT 02 02
24 POP DIRECT 02 02
25 XCH A, Rn 01 01
26 XCH A, DIRECT 02 01
27 XCH A, @Ri 01 01
28 XCHD A, @Ri 01 01
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16. Summary of Arithmetic Group
Sr. No. Instruction No. of Bytes No. of Cycles
01 ADD A, Rn 01 01
02 ADD A, #DATA 02 01
03 ADD A, DIRECT 02 01
04 ADD A, @Ri 01 01
05 ADDC A, Rn 01 01
06 ADDC A, #DATA 02 01
07 ADDC A, DIRECT 02 01
08 ADDC A, @Ri 01 01
09 DA A 01 01
10 SUBB A, Rn 01 01
11 SUBB A, #DATA 02 01
12 SUBB A, DIRECT 02 01
Table : Summary of ArithmeticGroup
Main Slide
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17. Summary of Arithmetic Group
Sr. No. Instruction No. of Bytes No. of Cycles
13 SUBB A, @Ri 01 01
14 INC A 01 01
15 INC Rn 02 01
16 INC DIRECT 02 01
17 INC @Ri 03 01
18 DEC A 01 01
19 DEC Rn 01 01
20 DEC DIRECT 01 01
21 DEC @Ri 01 01
22 INC DPTR 01 02
23 MUL AB 01 04
24 DIV AB 01 04
Table : Summary of Arithmetic Group...
Main Slide
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18. Summary of Logical Group
Sr. No. Instruction No. of Bytes No. of Cycles
01 ANL A, Rn 01 01
02 ANL A, #DATA 02 01
03 ANL A, DIRECT 02 01
04 ANL A, @Ri 01 01
05 ANL DIRECT, A 02 01
06 ANL DIRECT, #DATA 03 02
07 ORL A, Rn 01 01
08 ORL A, #DATA 02 01
09 ORL A, DIRECT 02 01
10 ORL A, @Ri 01 01
11 ORL DIRECT, A 02 01
12 ORL DIRECT, #DATA 03 02
13 XRL A, Rn 01 01
Table : Summary of Logical Group
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19. Summary of Logical Group
Sr. No. Instruction No. of Bytes No. of Cycles
14 XRL A, #DATA 02 01
15 XRL A, DIRECT 02 01
16 XRL A, @Ri 01 01
17 XRL DIRECT, A 02 01
18 XRL DIRECT, #DATA 03 02
19 CLR A 01 01
20 CPL A 01 01
21 RL A 01 01
22 RLC A 01 01
23 RR A 01 01
24 RRC A 01 01
25 SWAP A 01 01
Table : Summary of Logical Group...
Main Slide
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20. Summary of Boolean Instruction Group
Sr. No. Instruction No. of Bytes No. of Cycles
01 CLR C 01 01
02 CLR BIT 02 01
03 SETB C 01 01
04 SETB BIT 02 01
05 CPL C 01 01
06 CPL BIT 02 01
07 MOV C, BIT 02 01
08 MOV BIT, C 02 02
09 ANL C, BIT 02 02
10 ANL C, /BIT 02 02
Table : Summary of Boolean Group
Main Slide
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21. Summary of Boolean Instruction Group
Sr. No. Instruction No. of Bytes No. of Cycles
11 ORL C, BIT 02 02
12 ORL C, /BIT 02 02
13 JC REL 02 02
14 JNC REL 02 02
15 JB BIT, REL 03 02
16 JNB BIT, REL 03 02
17 JBC BIT, REL 03 02
Table : Summary of Boolean Group
Main Slide
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22. Summary of Branching Instruction Group
Sr. No. Instruction No. of Bytes No. of Cycles
01 ACALL ADDR11 02 02
02 LCALL ADDR16 03 02
03 RET 01 02
04 RETI 01 02
05 AJMP ADDR11 02 02
06 LJMP ADDR16 03 02
07 SJMP REL 02 02
08 JMP @A+DPTR 01 02
09 JZ REL 02 02
10 JNZ REL 02 02
Table : Summary of BranchingGroup
Main Slide
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23. Summary of Branching Instruction Group
Sr. No. Instruction No. of Bytes No. of Cycles
11 CJNE A, DIRECT, REL 03 02
12 CJNE A, #DATA, REL 03 02
13 CJNE Rn, #DATA, REL 03 02
14 CJNE @Ri, #DATA, REL 03 02
15 DJNZ Rn, REL 02 02
16 DJNZ DIRECT, REL 03 02
17 NOP 01 01
Table : Summary of Branching Group
Main Slide
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24. Assembler and Assembler Directives
What is Assembler:
It is a software program used to convert Assembly Language Program into
Machine Language equivalent or binary code. Here, the source code is
converted into Object Code with the help of the Assembler. We used to
call Assembler as Asmblr.
Assembler Directive:
It is the instruction used to inform the Assembler about conversion of As-
sembly Program into Machine Language Program. It is also called pseudo
or dummy instruction because these instructions are not executed by Mi-
crocontroller. Rather, they are executed by the Assembler. In other words,
we say that Assembler Directives is used for Assembling and they are not
consuming any Memory Location because they are not executed by Micro-
controller.
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25. Assembler and Assembler Directives
1 ORG
2 DB
3 EQU
4 END
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26. Delay Calculation in 8051
Machine cycles for 8051 Microcontroller The central processing unit
(CPU) takes certain amount of time or number of clock cycles to execute
an instruction. In 8051 microcontroller, these clock cycles are referred to
as machine cycles. In 8051 microcontroller, the length of the machine cycle
depends on the frequency of the crystal oscillator connected to the 8051
microcontroller. In the 8051 microcontroller, one machine cycle lasts 12
oscillator periods, therefore to calculate machine cycle for the 8051 we have
to take ( 1
12)th of the crystal frequency. In other words internal operating
frequency of the 8051 microcontroller is ( 1
12)th of the external frequency
connected to the 8051 microcontroller system.
Main Slide
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27. Delay Calculation in 8051
Example
Find period of the machine cycle for the frequency
(a) 11.0592 MHz
(b) 16 MHz
Solution
(a) Internal frequency = (11.0592MHz
12 ) = 921.6KHz
Therefore,
Machine cycle = 1
f = 1
(921.6KHz) = 1.085ยตseconds
(b) Internal frequency = (16MHz)
12 = 1.333MHz
Therefore,
Machine cycle = 1
f = 1
(1.333MHz) = 0.75ยตseconds
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28. Delay Calculation in 8051
Example
For an 8051 system of 11.0592 MHz, find how long it takes to executes
each of the following instructions
(a) MOV R4, #56H
(b) DJNZ R2, AGAIN
(c) DJNZ 30H, REPEAT
(d) LJMP 2000H
(e) DIV AB
Solution
Crystal frequency = external frequency = 11.0592MHz
Internal frequency = (11.0592MHz)
12 = 921.6KHz
Therefore,
Machine cycle = 1
f = 1
(921.6KHz) = 1.085ยตseconds
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29. Delay Calculation in 8051
Instruction Machine cycles Time to execute
MOV R4, #56h 1 1*1.085 ยตSec = 1.085ยตSec
DJNZ R2, AGAIN 2 2*1.085 ยตSec = 2.17ยตSec
DJNZ 30H, REPEAT 2 2*1.085 ยตSec = 2.17ยตSec
LJMP 2000H 2 2*1.085 ยตSec = 2.17ยตSec
DIV AB 4 4*1.085 ยตSec = 4.34ยตSec
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30. Delay Calculation in 8051
Example
Find the size of the delay in the following program, assume crystal
frequency is 11.0592 MHz
DELAY: MOV R2, #200
HERE: DJNZ R2, HERE
RET
Solution
Crystal frequency = external frequency = 11.0592MHz
Internal frequency = (11.0592MHz)
12 = 921.6KHz
Therefore,
Machine cycle = 1
f = 1
(921.6KHz) = 1.085ยตseconds
Main Slide
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31. Delay Calculation in 8051
Instruction Machine cycles
MOV R2, #200 1
DJNZ R2, HERE 2
RET 2
Time delay = [1 โ 1.085ยตsec + 2 โ 200 โ 1.085ยตsec + 2 โ 1.085ยตsec]
Here the inner loop HERE: DJNZ R2, HERE is executed 200 times, and
hence the inner time is calculated as 2 * 200.
= [1 + 400 + 2] โ 1.085ยตSec
= 403 โ 1.085ยตsec = 436.255ยตsec
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32. Delay Calculation in 8051
Example
Find the maximum possible delay for the previous program
Solution
556ยตsec
Main Slide
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33. Delay Calculation in 8051
Example
For an 8051 system of 11.0592 MHz, find time delay for the following
program
MOV R2, #255
REPEAT: NOP
NOP
NOP
NOP
NOP
DJNZ R2, REPEAT
RET
Solution
1939.98ยตsec
Main Slide
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34. Thank you
Please send your feedback at nbahadure@gmail.com
For more details and updates kindly visit
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