2. INTRODUCTION TO 16 BIT M
ARCHITECTURE
¢ Intel 8086 – 16 bit microprocessor (arithmetic logic
unit, internal registers, most of instructions are
designed to work with 16 bit binary words).
¢ Data bus : 16 bit (read data from or write data to
memory and ports either 16 bits or 8 bits at a time.
¢ Address bus : 20 bit (can address any one of 2
1048576 = 1MB memory locations).
— Address range : 00000H to FFFFFH
MICROPROCESSOR
microprocessor (arithmetic logic
unit, internal registers, most of instructions are
designed to work with 16 bit binary words).
(read data from or write data to
memory and ports either 16 bits or 8 bits at a time.
(can address any one of 210 =
memory locations).
Address range : 00000H to FFFFFH
2
8086Architecture
3. ¢ 16 bit words will be stored in two consecutive
memory locations.
¢ If first byte of the data is stored at an
address, 8086 can read the entire word in one
operation.
— For example if the 16 bit data is stored at even address
00520H is 2607,
MOV BX, [00520]
8086 reads the first byte and stores the data in BL and
reads the second byte and stores the data in BH.
BL ß (00520)
BH ß (00521)
16 bit words will be stored in two consecutive
If first byte of the data is stored at an even
, 8086 can read the entire word in one
For example if the 16 bit data is stored at even address
8086 reads the first byte and stores the data in BL and
reads the second byte and stores the data in BH.
3
8086Architecture
4. ¢ If the first byte of data is stored at an
needs two operation to read the 16 bit data.
— For example if the 16 bit data is stored at even address
00521H is F520,
MOV BX, [00521]
In first operation, 8086 reads the 16 bit data from the
00520 location and stores the data of 00521 location
in register BL and discards the data of 00520 location.
In second operation, 8086 reads the 16 bit data from
the 00522 location and stores the data of 00522
location in register BH and discards the data of 00523
location.
If the first byte of data is stored at an odd address, 8086
needs two operation to read the 16 bit data.
For example if the 16 bit data is stored at even address
8086 reads the 16 bit data from the
00520 location and stores the data of 00521 location
in register BL and discards the data of 00520 location.
8086 reads the 16 bit data from
the 00522 location and stores the data of 00522
location in register BH and discards the data of 00523
4
8086Architecture
6. ¢ 8086 microprocessor is divided internally into two separate
units:
¢ Bus Interface Unit (BIU)
¢ Execution Unit (EU)
¢ The two units functions independently.
¢ The is responsible for decoding and executing instructions.
¢ It contains arithmetic logic unit (ALU), status and control
flags, general-purpose register, and temporary
registers.
¢ Maintain the microprocessor status and control flags,
manipulates the general registers and instruction operands.
8086 microprocessor is divided internally into two separate
The two units functions independently.
The is responsible for decoding and executing instructions.
arithmetic logic unit (ALU), status and control
register, and temporary-operand
Maintain the microprocessor status and control flags,
manipulates the general registers and instruction operands. 6
8086Architecture
7. ¢ The BIU is responsible for performing all external bus
operations, such as instruction fetching, reading and
writing of data operands for memory, address generating,
and inputting or outputting data for input/output
peripherals.
¢ These operations are take place over the system bus. This
bus includes 16-bit bidirectional data bus, a 20
bus, and the signals needed to control transfer over the
bus.
¢ The BIU uses a mechanism known as
This queue permits the 8086 to pre
instruction code.
The BIU is responsible for performing all external bus
operations, such as instruction fetching, reading and
writing of data operands for memory, address generating,
and inputting or outputting data for input/output
These operations are take place over the system bus. This
bit bidirectional data bus, a 20-bit address
bus, and the signals needed to control transfer over the
The BIU uses a mechanism known as instruction queue.
the 8086 to pre-fetch up to 6 bytes of
7
8086Architecture
8. THE EXECUTION UNIT
¢ The EU decodes and executes the instructions.
¢ A decoder in the EU control system translates
instructions.
¢ The EU has 16 bit ALU for performing arithmetic and
logic operations.
¢ The EU has nine 16 bit registers
BP, SI, DI and Flag registers).
— AX, BX, CX, DX (general purpose registers)
eight 8 bit registers (AH, AL, BH, BL, CH, CL, DH, DL).
The EU decodes and executes the instructions.
in the EU control system translates
The EU has 16 bit ALU for performing arithmetic and
16 bit registers (AX, BX, CX, DX, SP,
(general purpose registers) can be used as
eight 8 bit registers (AH, AL, BH, BL, CH, CL, DH, DL).
8
8086Architecture
9. GENERAL PURPOSE REGISTERS
¢ general purpose registers (AH, AL, BH, BL, CH, CL,
DH, DL).
¢ These registers can be used as 8
individually or can be used as 16
BX, CX, and DX.
¢ The AL register is also called the accumulator
some features that the other general purpose registers
do not have.
REGISTERS
general purpose registers (AH, AL, BH, BL, CH, CL,
These registers can be used as 8-bit registers
individually or can be used as 16-bit in pair to have AX,
the accumulator. It has
some features that the other general purpose registers
9
8086Architecture
11. ¢AX
— AX à 16 bit accumulator
accumulator
— Used for operations involving input/output and
most arithmetic.
— For example: multiply, divide, and translate
instructions assume the use of AX.
— Also, some instructions generate more efficient
machine code if they reference AX rather than
another register.
16 bit accumulator; AL à 8 bit
Used for operations involving input/output and
For example: multiply, divide, and translate
instructions assume the use of AX.
Also, some instructions generate more efficient
machine code if they reference AX rather than
11
8086Architecture
12. ¢BX
— BX is known as the Base register
— This is only general purpose register whose
contents can be used for addressing 8086
memory.
— All memory reference utilizing this register
content for addressing uses the DS as the default
segment register.
— BX can also be combined with DI or SI as a base
register for special addressing.
— BX register is similar to the 8085 HL register.
(BHàH; BLàL)
the Base register.
This is only general purpose register whose
contents can be used for addressing 8086
All memory reference utilizing this register
content for addressing uses the DS as the default
BX can also be combined with DI or SI as a base
register for special addressing.
BX register is similar to the 8085 HL register. 12
8086Architecture
13. ¢CX
— CX is known as the counter register
— It may contain a value to control the number of
times a loop is repeated or a value to shift bits
left or right.
¢DX
— DX is known as a data register
— Used to hold 16 bit result (data).
— Some I/O operations require its use, and multiply
and divide operations that involve large values
assume the use of DX and AX together as a pair.
the counter register.
It may contain a value to control the number of
times a loop is repeated or a value to shift bits
a data register.
Used to hold 16 bit result (data).
Some I/O operations require its use, and multiply
and divide operations that involve large values
assume the use of DX and AX together as a pair. 13
8086Architecture
14. POINTER & INDEX REGISTERS
¢ The 8086 has four other general
registers, two pointer registers
two index registers DI and
to store what are called offset addresses
¢ An offset address represents the displacement
of a storage location in memory from the
segment base address in a segment register.
¢ Unlike the general-purpose data registers, the
pointer and index registers are only accessed as
words (16 bits).
EGISTERS
other general-purpose
registers, two pointer registers SP and BP, and
and SI. These are used
offset addresses.
represents the displacement
of a storage location in memory from the
segment base address in a segment register.
purpose data registers, the
pointer and index registers are only accessed as
14
8086Architecture
15. POINTER REGISTERS
¢ The two pointer registers (16 bits),
and base pointer (BP) are used to access data in the
stack segment.
¢ The 16 bit SP register provides an offset value, which,
when associated with the SS register (SP:SS), refers to
the current word being processed in the stack.
¢
¢ The SP contents are automatically updated during the
execution of a POP and PUSH
The two pointer registers (16 bits), stack pointer (SP)
are used to access data in the
The 16 bit SP register provides an offset value, which,
when associated with the SS register (SP:SS), refers to
the current word being processed in the stack.
The SP contents are automatically updated during the
instruction.
15
8086Architecture
16. ¢ The 16 bit BP facilitates referencing parameters, which
are data and addresses that a program passes via the
stack.
¢ The processor combines the address in SS with the
offset in BP.
¢ BP can also be combined with DI and with SI as a base
register for special addressing.
The 16 bit BP facilitates referencing parameters, which
are data and addresses that a program passes via the
The processor combines the address in SS with the
BP can also be combined with DI and with SI as a base
register for special addressing.
16
8086Architecture
17. INDEX REGISTERS
¢ The two 16 bit index registers, Source Index (SI and
Destination Index (DI) are used in indexed addressing.
¢ SI register: is required for some string (character)
handling operations. In this context, SI is associated
with the DS register.
¢ DI register: is also required for some string operations.
In this context, DI is associated with the ES register.
two 16 bit index registers, Source Index (SI and
are used in indexed addressing.
SI register: is required for some string (character)
handling operations. In this context, SI is associated
DI register: is also required for some string operations.
In this context, DI is associated with the ES register.
17
8086Architecture
18. FLAG REGISTERS
¢ A flag is a flip-flop that indicates some condition
produced by the execution of an instruction or controls
certain operations of the EU.
¢ A 16 bit flag register in the EU contains nine active
flags. Six of them are used to indicate some condition
produced by an instruction and remaining flags are
used to control certain operations of the processor.
flop that indicates some condition
produced by the execution of an instruction or controls
A 16 bit flag register in the EU contains nine active
flags. Six of them are used to indicate some condition
produced by an instruction and remaining flags are
used to control certain operations of the processor.
18
8086Architecture
19. ¢ The six conditional flags are
Parity flag (PF), Auxiliary carry flag (AF), Zero
flag (ZF), Sign flag (SF) and Overflow flag (OF).
¢ The carry flag (CF): CF is set if there is a
carry-out or a borrow-in for the most significant
bit of the result during the execution of an
instruction. Otherwise it is reset.
¢ The parity flag (PF): PF is set if the result
produced by the instruction has even parity
that is, if it contains an even number of bits at
the 1 logic level. If parity is odd, PF is reset.
The six conditional flags are Carry flag (CF),
Parity flag (PF), Auxiliary carry flag (AF), Zero
flag (ZF), Sign flag (SF) and Overflow flag (OF).
CF is set if there is a
in for the most significant
bit of the result during the execution of an
instruction. Otherwise it is reset.
PF is set if the result
produced by the instruction has even parity-
that is, if it contains an even number of bits at
the 1 logic level. If parity is odd, PF is reset. 19
8086Architecture
20. ¢ The auxiliary flag (AF): AF
the low nibble into the high nibble
nibble into the low nibble of the
Otherwise, AF is reset.
¢ The zero flag (ZF): ZF is set
instruction is zero. Otherwise, ZF
¢ The sign flag (SF): The MSB
Thus, SF is set if the result is a
positive.
¢ The overflow flag (OF): When
signed result is out of range. If the
remains reset.
is set if there is a carry-out from
nibble or a borrow-in from the high
the lower byte in a 16-bit word.
set if the result produced by an
ZF is reset.
MSB of the result is copied into SF.
a negative number of reset if it is
When OF is set, it indicates that the
the result is not out of range, OF
20
8086Architecture
21. ¢ The three control flags are Trap flag (TF), Interrupt flag (IF)
Direction flag (DF).
¢ The trap flag(TF): if TF is set, the 8086 goes into the single
mode of operation. When in the single
instruction and then jumps to a special service routine that may
determine the effect of executing the instruction. This type of
operation is very useful for debugging programs.
¢ The interrupt flag(IF): For the 8086 to recognize
interrupt requestsat its interrupt (INT) input, the IF flag must be set.
When IF is reset, requests at INT are ignored and the
interrupt interface is disabled.
¢ The direction flag(DF): The logic level of DF determines the
direction in which string operations will occur. When set, the string
instructions automatically decrement the address; therefore the string
data transfers proceed from high address to low address.
Trap flag (TF), Interrupt flag (IF) and
if TF is set, the 8086 goes into the single-step
mode of operation. When in the single-step mode, it executes an
instruction and then jumps to a special service routine that may
determine the effect of executing the instruction. This type of
operation is very useful for debugging programs.
For the 8086 to recognize maskable
at its interrupt (INT) input, the IF flag must be set.
When IF is reset, requests at INT are ignored and themaskable
The logic level of DF determines the
direction in which string operations will occur. When set, the string
instructions automatically decrement the address; therefore the string
data transfers proceed from high address to low address.
21
8086Architecture
22. BUS INTERFACE UNIT (BIU)
¢ BIU delivers instruction and data to EU.
¢ It manage the bus control unit, segment registers and
instruction queue. BIU controls the buses that transfer
data to the EU, to memory, and to I/O devices, whereas
the segment registers control memory addressing.
¢ Another function of BIU is to provide access to
instructions. Because the instructions for a program
that is executing are in memory, the BIU must access
instructions form memory and place them in
instruction queue.
¢ The Instruction Queue is a FIFO group of register in
which upto 6 bytes of instruction code are pre
instructions.
(BIU)
BIU delivers instruction and data to EU.
It manage the bus control unit, segment registers and
instruction queue. BIU controls the buses that transfer
data to the EU, to memory, and to I/O devices, whereas
the segment registers control memory addressing.
Another function of BIU is to provide access to
instructions. Because the instructions for a program
that is executing are in memory, the BIU must access
instructions form memory and place them in an
The Instruction Queue is a FIFO group of register in
of instruction code are pre-fetched 22
8086Architecture
23. ¢ The EU and BIU work in parallel,
one step ahead.
¢ When the EU is ready for its next
reads the instruction byte(s) for
queue in the BIU.
¢ The top instruction is the currently
while the EU is occupied executing
BIU fetches another instruction
fetching overlaps with execution
processing.
¢ Fetching the next instruction
instruction executes is called pipelining
parallel, with the BIU keeping
next instruction, it simply
for the instruction from the
currently executable one and,
executing an instruction, the
instruction from memory. This
execution and speeds up
instruction while the current
pipelining. 23
8086Architecture
24. SEGMENTS AND ADDRESSING
¢ Segments are special areas defined
the code, the data and the stack
¢ A segment begins on a paragraph
location evenly divisible by 16,
¢ The 8086 BIU sends out 20 bit
of 220 bytes (1MB) in memory.
8086 works with only four 65,536
this 1M range.
¢ Four segment registers in the
16 bits of the starting addresses
the 8086 is working with at a particular
ADDRESSING
defined in a program for containing
stack.
paragraph boundary, that is, at a
or hex 10.
bit addresses, so it can address any
However, at any given time the
536 byte (64Kbyte) segments with
BIU are used to hold the upper
addresses of four memory segments that
particular time.
24
8086Architecture
25. ¢ Three segments are:
— Code segment (CS) :
instructions that are to execute
executable instruction is at
CS register addresses the code
— Data segment (DS) : contains
data, constants, and work
addresses the data segment
— Stack segment (SS) :
addresses that the program
temporarily or for use by subroutine
contains the machine
execute. Typically, the first
the start of this segment.
code segment.
contains a program’s defined
work areas. DS register
.
contains any data and
program needs to save
subroutine.
25
8086Architecture
26. 4 segments can be
separated or overlap
(in small program which
do not need 64K)
64K
64K
64K
64K
The registers and
segments are not
necessarily in the
order shown.
26
8086Architecture
27. SEGMENT BOUNDARIES
¢ A segment register is 16 bits
contains the starting address of a segment.
¢ A segment begins on a paragraph boundary,
which is an address evenly divisible by decimal
16, or hex 10.
¢ The BIU inserts zeros (0) for the lowest 4 bits
(nibble) of the 20 bit starting address for a
segment.
¢ If the code segment register contains 348AH,
for example, then the code segment will start at
address 348A0H.
16 bits in size and
starting address of a segment.
A segment begins on a paragraph boundary,
which is an address evenly divisible by decimal
The BIU inserts zeros (0) for the lowest 4 bits
(nibble) of the 20 bit starting address for a
If the code segment register contains 348AH,
for example, then the code segment will start at
27
8086Architecture
28. SEGMENT OFFSETS
¢ Within a program, all memory locations within a
segment are relative to the segment’s starting address.
¢ The distance in bytes from the segment address to
another location within the segment is expressed as
offset (or displacement).
¢ 2-byte (16 bit) offset can range from 0000H through
FFFFH.
¢ To reference any memory location in a segment, the
processor combines the segment address in a segment
register with the offset value of that location, that is, its
distance in bytes from the start of the segment.
Within a program, all memory locations within a
segment are relative to the segment’s starting address.
The distance in bytes from the segment address to
another location within the segment is expressed as an
byte (16 bit) offset can range from 0000H through
To reference any memory location in a segment, the
processor combines the segment address in a segment
register with the offset value of that location, that is, its
distance in bytes from the start of the segment. 28
8086Architecture
29. ¢ Consider the data segment that begins at location
The DS register contains the segment address of the data
segment, 038E[0], and an instruction references a location
with an offset of 0032H bytes from the start of the data
segment.
¢ To reference the required location, the processor combines
the address of the data segment with the offset:
DS segment address
Offset
Actual address
Consider the data segment that begins at location038E0H.
The DS register contains the segment address of the data
], and an instruction references a location
H bytes from the start of the data
To reference the required location, the processor combines
the address of the data segment with the offset:
038E0H
+0032H
03912H à physical address
29
8086Architecture
33. SEGMENT REGISTER
¢A segment register provides for addressing
an area of memory known as the current
segment.
¢ Segment register is used to hold the upper 16 bits
of the starting address for each of the segments.
¢The four segment registers are:
— Code segment (CS) register
— Data segment (DS) register
— Stack segment (SS) register
— Extra segment (ES) register
A segment register provides for addressing
an area of memory known as the current
hold the upper 16 bits
of the starting address for each of the segments.
registers are:
Code segment (CS) register
Data segment (DS) register
Stack segment (SS) register
Extra segment (ES) register
33
8086Architecture
34. ¢ CS register: contains the
program’s code segment. This
plus an offset value in the
(IP) register (CS:IP), indicates
instruction to be fetched for
¢ DS register: contains the
program’s data segment.
address to locate data; this
value in an instruction, causes
specific byte location in the
the starting address of a
This segment address,
the Instruction Pointer
indicates the address of an
for execution.
the starting address of a
Instructions use this
this address, plus an offset
causes a reference to a
the data segment.
34
8086Architecture
35. ¢ SS register: permits the implementation
memory, which a program uses
addresses and data. The system
address of a program’s stack
This segment address, plus
Pointer (SP) register (SS:SP)
in the stack being addressed.
¢ ES register: used by some
memory addressing. In this
associated with the DI register
implementation of a stack in
uses for temporary storage of
system stores the starting
stack segment in SS register.
an offset value in the Stack
SP), indicates the current word
.
string operations to handle
this context, ES register is
register.
35
8086Architecture
36. INTRODUCTION TO PROGRAMMING
8086
¢ There are three language levels
used to write a program for a microcomputer.
¢Machine language
¢Assembly language
¢High level language
PROGRAMMING THE
three language levels that can be
used to write a program for a microcomputer.
36
8086Architecture
37. MACHINE LANGUAGE
¢ Binary form of the program is referred to as machine
language because it is the form required by the
machine.
¢ It is difficult for a programmer to memorize the
thousands of binary instruction codes.
¢ Very easy for an error to occur when working with long
series of 1’s and 0’s.
¢ Using hexadecimal representation for the binary codes
might help some, but there are still thousands of
instruction codes to cope with.
Binary form of the program is referred to as machine
language because it is the form required by the
It is difficult for a programmer to memorize the
thousands of binary instruction codes.
Very easy for an error to occur when working with long
Using hexadecimal representation for the binary codes
might help some, but there are still thousands of
37
8086Architecture
38. B82301 MOV AX, 0123
Machine code
Machine instructions
may be one, two, or
three bytes in length.
First byte is the actual
operation, and any other
bytes that are present
are operands - reference
to an immediate value, a
register, or a memory
location.
MOV AX, 0123
Machine instructions
may be one, two, or
three bytes in length.
First byte is the actual
operation, and any other
bytes that are present
reference
to an immediate value, a
register, or a memory
38
8086Architecture
39. ASSEMBLY LANGUAGE
¢ Much more readable form of machine language, called
assembly language, uses mnemonic codes
machine code instructions, rather than simply using
the instructions’ numeric values.
¢ Translate to machine language so that it can be loaded
into memory and run.
¢ Assembly language uses two, three or four letter
mnemonics to represent each instruction type.
¢ Assembly language statements are usually written in
a standard form that has four fields.
Label Op-code Operand
NEXT: ADD AL, 07H
Much more readable form of machine language, called
mnemonic codes to refer to
machine code instructions, rather than simply using
the instructions’ numeric values.
Translate to machine language so that it can be loaded
Assembly language uses two, three or four letter
mnemonics to represent each instruction type.
Assembly language statements are usually written in
a standard form that has four fields.
comment
;Add 07 and content of AL
40. ¢ A label is a symbol or group
represent an address which
at the time the statement
usually followed by a colon.
¢ The op-code field of the
mnemonic for the instruction
Instruction mnemonics are
(op-code).
¢ The operand field of the statement
memory address, port address,
register on which the instruction
¢ Comment field starts with
information about the instruction
the program.
group of symbols used to
which is not specifically known
statement is written. Labels are
instruction contains the
instruction to be performed.
are also called operation code
statement contains the data,
address, or the name of the
instruction is to be performed.
semicolon and contain the
instruction but are not part of 40
8086Architecture
41. HIGH LEVEL LANGUAGE
¢ High level language use program statements
which are even more English
assembly language.
¢ Compiler translate high-level language statement
to machine code which can be loaded into memory
and executed.
¢ Programs can usually be written faster than in
assembly language because it works with bigger
building blocks.
¢ Execute slowly and require more memory than
the same program written in assembly language.
High level language use program statements
which are even more English-like than those of
level language statement
to machine code which can be loaded into memory
Programs can usually be written faster than in
assembly language because it works with bigger
Execute slowly and require more memory than
the same program written in assembly language.
41
8086Architecture
42. TRANSLATION TO MACHINE
¢ Microprocessor only understand the binary
numbers and hence a translator must be used to
convert assembly/high-level language programs into
binary machine language so that the
microprocessor can execute the program.
¢ An assembler translates the program written in
assembly language into machine language program
(object code).
¢ Assembly language program
¢ Machine language program
MACHINE CODE
Microprocessor only understand the binary
numbers and hence a translator must be used to
level language programs into
binary machine language so that the
microprocessor can execute the program.
translates the program written in
assembly language into machine language program
Assembly language program à source codes
Machine language program à object codes.
42
8086Architecture
43. Assembly
language
(Source code)
*.ASM
Object code
*.OBJ
Assembler
o Translator converts source codes to object codes and then into
executable formats.
o Source code à object code ………….
o Object code à executable format …….
Object code
*.OBJ
Executable file
*.EXE or
*.COM
Linker
43
8086Architecture
converts source codes to object codes and then into
object code …………. Assembler
executable format ……. linker
44. ¢ There are two ways of converting an assembly language
program into machine language:
— Manual assembly
— Using assembly
¢ With manual assembly, the programmer is the assembler;
programmer translates each mnemonic into its numerical
machine language representation by looking up a table of
the microprocessor’s instruction set.
¢ Manual assembly is acceptable for short programs but
becomes very inconvenient for large programs
ways of converting an assembly language
program into machine language:
With manual assembly, the programmer is the assembler;
programmer translates each mnemonic into its numerical
machine language representation by looking up a table of
the microprocessor’s instruction set.
Manual assembly is acceptable for short programs but
becomes very inconvenient for large programs
44
8086Architecture
45. ¢ When an assembler is used, the assembler reads each
assembly instruction of a program as ASCII characters
and translates them into respective binary op
¢ Address computation is the advantage of the assembler.
(assembler computes the actual address for the
programmer and fills it in automatically).
When an assembler is used, the assembler reads each
assembly instruction of a program as ASCII characters
and translates them into respective binary op-codes.
Address computation is the advantage of the assembler.
(assembler computes the actual address for the
programmer and fills it in automatically).
45
8086Architecture
46. TYPES OF ASSEMBLER
¢ One pass assembler
— Assembler goes through
program once and translates
program.
— Can not resolve the forward
— Either all labels used in
defined in the source program
referenced, or forward references
prohibited.
the assembly language
translates the assembly language
forward referencing.
in forward references are
program before they are
references to data items are
46
8086Architecture
47. ¢ Two pass assembler
— More efficient & easy to use.
— Performs two sequential scans over the source code.
— Pass 1:
¢ Scans the code.
¢ Validates the tokens.
¢ Creates a symbol table.
— Pass 2:
¢ Solves forward referencing.
¢ Converts the code to the machine code.
More efficient & easy to use.
Performs two sequential scans over the source code.
Solves forward referencing.
Converts the code to the machine code.
47
8086Architecture
50. ASSEMBLY LANGUAGE FEATURES
¢ Program comment:
— The use of comments throughout a program can
improve its clarity, especially in assembly language,
where the purpose of a set of instructions is often
unclear.
— A comment begins with a semicolon (;), and wherever
it is coded, the assembler assumes that all characters
on the line to its right are comments.
— A comment may contain any printable character,
including blank.
MOV AX, BX ; move the content of BX to AX.
FEATURES
The use of comments throughout a program can
improve its clarity, especially in assembly language,
where the purpose of a set of instructions is often
A comment begins with a semicolon (;), and wherever
it is coded, the assembler assumes that all characters
on the line to its right are comments.
A comment may contain any printable character,
; move the content of BX to AX.
50
8086Architecture
51. ¢ Reserved words
— Certain names in assembly language are reserved for
their own purposes, to be used only under special
conditions.
— Reserved words, by category, include:
¢ Instructions, such as MOV and ADD, which are
operations that the computer can execute;
¢ Directives, such as END or SEGMENT, which is used to
provide information to the assembler.
¢ Operators, such as FAR and SIZE, which is used in
expressions.
¢ Predefined symbols, such as @Data and @Model, which
return information to the program during the assembly.
Certain names in assembly language are reserved for
their own purposes, to be used only under special
Reserved words, by category, include:
, such as MOV and ADD, which are
operations that the computer can execute;
, such as END or SEGMENT, which is used to
provide information to the assembler.
, such as FAR and SIZE, which is used in
, such as @Data and @Model, which
return information to the program during the assembly.
51
8086Architecture
52. ¢ Identifiers:
— An identifier (or symbol) is a name apply to an item in the
program for reference.
— Two types of identifier:
¢ Name: refers to the address of a data item, such as
COUNTER in
COUNTER DB0
¢ Label: refers to the address of an instruction, procedure, or
segment, such as MAIN and B30
MAIN PROC FAR
B30: ADD BL,25
An identifier (or symbol) is a name apply to an item in the
: refers to the address of a data item, such as
: refers to the address of an instruction, procedure, or
30 in the following statements.
52
8086Architecture
53. ¢ Identifier can use the following characters:
¢CATEGORY ALLOWABLE CHARACTER
Alphabetic letters: A – Z and a
Digit: 0 – 9 (not the first character)
Special characters: question mark(?)
underline( _ )
dollar ($)
at (@)
dot ( . ) not first character
¢ The maximum length of an identifier is 31 character up
to MASM 6.0 and 247 since.
Identifier can use the following characters:
ALLOWABLE CHARACTER
Z and a – z
9 (not the first character)
question mark(?)
underline( _ )
dollar ($)
at (@)
dot ( . ) not first character
The maximum length of an identifier is 31 character up 53
8086Architecture
54. ¢Statements
— An assembly program consists of a set of
statements.
— Two types of statements:
¢Instructions: such as MOV and ADD, which the
assembler translates to object code; and
¢Directives: which tell the assembler to perform a
specific action, such as define a data item.
— Format of a statement:
[identifier] operation [operand
An assembly program consists of a set of
Two types of statements:
such as MOV and ADD, which the
assembler translates to object code; and
which tell the assembler to perform a
specific action, such as define a data item.
[operand (s)] [;comment]
54
8086Architecture
55. ¢ An identifier (if any), operation, and operand (if any) are
separated by at least one blank or tab character.
¢ There is maximum of 132 characters on a line up to MASM
and 512 since.
¢ Examples:
IDENTIFIER OPERATION OPERAND COMMENT
Directive: COUNT DB
Instruction: L30: MOV
An identifier (if any), operation, and operand (if any) are
separated by at least one blank or tab character.
characters on a line up to MASM 6.0
IDENTIFIER OPERATION OPERAND COMMENT
1 ;Name, operation, operand
AX,0 ;label, operation, operand
55
8086Architecture
56. ¢ Directives:
— Assembly language support
that enable to control the
program assembles and lists
— Describe the way according
microprocessor is directed to
— Act only during the assembly
generate no machine executable
support a number of statements
the way in which a source
lists.
according to which the
to perform a specific task.
assembly of a program and
executable code.
56
8086Architecture
57. MOST COMMON DIRECTIVES
¢ PAGE and TITLE Listing Directives:
— The PAGE and TITLE directives help to control the
format of a listing of an assembled program.
— They have no effect on subsequent execution of the
program.
— At the start of the program, the
designates the maximum number of lines to list on a
page and the maximum number of characters on a
line.
— Its format is
PAGE [length] [, width]
DIRECTIVES
PAGE and TITLE Listing Directives:
The PAGE and TITLE directives help to control the
format of a listing of an assembled program.
They have no effect on subsequent execution of the
At the start of the program, the PAGE directive
designates the maximum number of lines to list on a
page and the maximum number of characters on a
PAGE [length] [, width]
57
8086Architecture
58. ¢ PAGE 60, 132 à length is 60 lines per page and width
is 132 character per line.
¢ The number of lines per page may range from 10
through 255, and the number of characters per line may
range from 60 through 132.
¢ Omission of a PAGE statement causes the assembler to
default to PAGE 50, 80.
length is 60 lines per page and width
The number of lines per page may range from 10
through 255, and the number of characters per line may
Omission of a PAGE statement causes the assembler to
58
8086Architecture
59. ¢ The TITLE directive to cause a title for a program to
print on line 2 of each page of the program listing.
¢ Format of TITLE directive is
TITLE text [comment]
¢ For text, a common practice is to use the name of the
program as cataloged on disk.
TITLE ASMSORT Assembly program to sort CD titles
Directive text Comment ( ‘;’ is not required)
directive to cause a title for a program to
of each page of the program listing.
TITLE text [comment]
For text, a common practice is to use the name of the
TITLE ASMSORT Assembly program to sort CD titles
59
8086Architecture
Comment ( ‘;’ is not required)
60. ¢ SEGMENT and ENDS Directives:
— An assembly language program in .EXE format consist of one
or more segments.
— The directives for defining a segment,
ENDS, have the following format:
segment_name SEGMENT
MOV AX, BX
ADD AX, BX
……………..
segment_name ENDS
SEGMENT and ENDS Directives:
An assembly language program in .EXE format consist of one
The directives for defining a segment, SEGMENT and
, have the following format:
SEGMENT
MOV AX, BX
ADD AX, BX
……………..
60
8086Architecture
61. — The SEGMENT statement defines the start of a segment.
— The segment_name must be present, must be unique, and
must follow assembly naming conventions.
— The ENDS statement indicates the end of the segment and
contains the same name as the SEGMENT statement.
— The maximum size of a segment is 64K.
ARRAY1 SEGMENT
MOV AX, BX
ADD AX, BX
ARRAY1 ENDS
statement defines the start of a segment.
must be present, must be unique, and
must follow assembly naming conventions.
statement indicates the end of the segment and
contains the same name as the SEGMENT statement.
The maximum size of a segment is 64K.
61
8086Architecture
62. — Segment_name à ARRAY1
— The assembler will assign a numeric value to ARRAY1
corresponding to the base value of the Data segment.
— The programmer can load ARRAY1 into the DS using the
following instruction:
MOV AX, @ARRAY1
MOV DS, AX
— The segment register like DS, CS etc must be loaded via 16
bit register such as AX or by the contents of a memory
location.
— A data array or an instruction sequence between the
SEGMENT and ENDS directives is called a
The assembler will assign a numeric value to ARRAY1
corresponding to the base value of the Data segment.
The programmer can load ARRAY1 into the DS using the
The segment register like DS, CS etc must be loaded via 16
bit register such as AX or by the contents of a memory
A data array or an instruction sequence between the
SEGMENT and ENDS directives is called a logical segment.
62
8086Architecture
63. ¢ ASSUME Directive:
— An 8086 program may have several logical segments that
contain code and several that contain data.
— However, at ay given time the 8086 works directly with only
four physical segments: CS, DS, SS and ES.
— The ASSUME directive tells the assembler which logical
segment to use for each of these physical segments at a given
time.
— The format is:
ASSUME ss:stackname, DS:datasegname, CS:codesegname
An 8086 program may have several logical segments that
contain code and several that contain data.
However, at ay given time the 8086 works directly with only
four physical segments: CS, DS, SS and ES.
The ASSUME directive tells the assembler which logical
segment to use for each of these physical segments at a given
ASSUME ss:stackname, DS:datasegname, CS:codesegname
63
8086Architecture
64. — The above statement tells the assembler that the logical
segment named codesegname contains the instruction
statements for the program and should be treated as a code
segment. It also tells the assembler that it should treat the
logical segment datasegname as the data segment. In order
words, the DS:datasegnament part of the statement tells the
assembler that for any instruction which refers to data in the
data segment, data will be found in the logical segment
datasegname.
— ASSUME may also contain an entry for the ES register, such
as ES:datasegname; if the program does not use ES, its
reference is omitted or code ES:NOTHING.
The above statement tells the assembler that the logical
segment named codesegname contains the instruction
statements for the program and should be treated as a code
segment. It also tells the assembler that it should treat the
logical segment datasegname as the data segment. In order
words, the DS:datasegnament part of the statement tells the
assembler that for any instruction which refers to data in the
data segment, data will be found in the logical segment
ASSUME may also contain an entry for the ES register, such
as ES:datasegname; if the program does not use ES, its
reference is omitted or code ES:NOTHING.
64
8086Architecture
65. ¢ PROC Directive
— The code segment contains the executable code for a program
which consists of one or more procedures, defined initially
with the PROC directive and ended with the ENDP directive.
— The format is
NAME OPERATION
procedure_name PROC
……………………
procedure_name ENDP
The code segment contains the executable code for a program
which consists of one or more procedures, defined initially
with the PROC directive and ended with the ENDP directive.
OPERAND COMMENT
FAR ; Begin proc
……………………
; End proc
65
8086Architecture
66. — The procedure_name must be present, must be unique, and
must follow assembly language naming conventions.
— The operand FAR in this case, is related to program
execution.
— The ENDP directive indicates the end of a procedure and
contains the same name as the PROC statement to enable
the assembler to relate the end to the start.
— Because a procedure must be fully contained within a
segment, ENDP defines the end of the procedure before
ENDS defines the end of the segment.
— The code segment may contain any number of procedures
used as subroutines, each with its own set of matching PROC
and ENDP statements.
— Each additional PROC is usually coded with (or default to)
the NEAR operad.
The procedure_name must be present, must be unique, and
must follow assembly language naming conventions.
The operand FAR in this case, is related to program
The ENDP directive indicates the end of a procedure and
contains the same name as the PROC statement to enable
the assembler to relate the end to the start.
Because a procedure must be fully contained within a
segment, ENDP defines the end of the procedure before
ENDS defines the end of the segment.
The code segment may contain any number of procedures
used as subroutines, each with its own set of matching PROC
Each additional PROC is usually coded with (or default to)
66
8086Architecture
67. ¢ END Directive
— An END directive ends the entire program and appears as
the last statement.
— Its format is:
END [entry-point]
— Entry-point (procedure_name) tells the assembler and linker
where the program will begin execution.
An END directive ends the entire program and appears as
point]
point (procedure_name) tells the assembler and linker
where the program will begin execution.
67
8086Architecture
68. ¢ MODEL Directive
— The MODEL directive selects a standard memory model for
the program.
— It determines the way segments are linked together, as well
as the maximum size of each segment.
— Its format is
.MODEL memory_model
— The memory_model may be Tiny, Medium, Compact, Large,
Huge, or Flat.
The MODEL directive selects a standard memory model for
It determines the way segments are linked together, as well
as the maximum size of each segment.
.MODEL memory_model
The memory_model may be Tiny, Medium, Compact, Large,
68
8086Architecture
69. MODEL Description
Tiny Code & data together may not be greater than 64K
Small Neither code nor data may be greater
Medium Only the code may be greater than 64K
Compact Only the data may be greater than 64K
Large Both code & data may be greater than 64K
Huge All available memory may be used for code & data
69
8086Architecture
Description
& data together may not be greater than 64K
Neither code nor data may be greater than 64K
Only the code may be greater than 64K
Only the data may be greater than 64K
code & data may be greater than 64K
be used for code & data
70. ¢ The formats (including the leading dot) for the directives that
define the stack, data, and code segments are:
.STACK
.DATA
.CODE
¢ Each of these directives causes the assembler to generate the
required SEGMENT statement and its matching ENDS.
¢ The default stack size is 1024 bytes, which ca be override.
¢ The instruction used to initialize the address of the data segment
in DS are:
MOV AX,@data
MOV DS,AX
The formats (including the leading dot) for the directives that
define the stack, data, and code segments are:
[size]
[segment_name]
Each of these directives causes the assembler to generate the
required SEGMENT statement and its matching ENDS.
The default stack size is 1024 bytes, which ca be override.
The instruction used to initialize the address of the data segment
;initialize DS with
;address of data segment
70
8086Architecture
71. DEFINING TYPE OF DATA
¢ The data segment in an .EXE program contains
constants, work areas, and input/output areas.
¢ The assembler provides a set of directives that permits
definitions of items by various types and lengths; for
example, DB defines byte and DW defines word.
¢ A data item may contain an undefined (uninitialized)
value, or it may contain an initialized constant, defined
either as a character string or as a numeric value.
¢ Format for data defining:
[name] Dn
The data segment in an .EXE program contains
constants, work areas, and input/output areas.
The assembler provides a set of directives that permits
definitions of items by various types and lengths; for
example, DB defines byte and DW defines word.
A data item may contain an undefined (uninitialized)
value, or it may contain an initialized constant, defined
either as a character string or as a numeric value.
expression
71
8086Architecture
72. ¢ Name:
— a program that reference a data item does so by means of a
name, as indicated by the square brackets.
¢ Directive (Dn):
— the directives that define data items are DB (byte), DW
(word), DD (doubleword), DF (farword), DQ (quadword), and
DT (tenbytes), each of which explicitly indicates the length of
the defined item.
a program that reference a data item does so by means of a
name, as indicated by the square brackets.
the directives that define data items are DB (byte), DW
(word), DD (doubleword), DF (farword), DQ (quadword), and
DT (tenbytes), each of which explicitly indicates the length of
72
8086Architecture
73. ¢ Expression:
— the expression in an operand may specify an uninitialized
value or a constant value. To indicate an uninitialized item,
define the operand with a question mark, such as
DATAX DB ? ;uninitialized item
— When program begins execution, the initial value of DATAX
is unknown.
— The operand can be used to define a constant, such as
DATAY DB 25
— Use this initialized value 25 throughout the program and can
even change the value.
the expression in an operand may specify an uninitialized
value or a constant value. To indicate an uninitialized item,
define the operand with a question mark, such as
;uninitialized item
When program begins execution, the initial value of DATAX
The operand can be used to define a constant, such as
;initialized item
Use this initialized value 25 throughout the program and can
73
8086Architecture
74. — An expression may contain multiple constants separated by
commas and limited only by the length of the line, as follows:
DATAZ DB 21, 22, 23, 24, 35, 26, ……
— The assembler defines these constants in adjacent bytes,
from left to right.
DATAZ + 0 à 21
DATAZ + 1 à 22
DATAZ + 2 à 23 …..
— The instruction MOV AL, DATAZ+3 loads the value 24 (18H)
into the AL register.
An expression may contain multiple constants separated by
commas and limited only by the length of the line, as follows:
DATAZ DB 21, 22, 23, 24, 35, 26, ……
The assembler defines these constants in adjacent bytes,
The instruction MOV AL, DATAZ+3 loads the value 24 (18H)
74
8086Architecture
75. — The expression also permits duplication of constants in a
statement of the format
[name] Dn repeat-count DUP (expression) ……
— The following examples illustrate duplication
DW 10 DUP(?) ; ten words, uninitialized
DB 5 DUP(12) ;five bytes containing hex ocococococ
DB 3 DUP(5 CUP(4)) ;fifteen 4s
— An expression may define and initialized a character string
or a numeric constant.
The expression also permits duplication of constants in a
count DUP (expression) ……
The following examples illustrate duplication
; ten words, uninitialized
;five bytes containing hex ocococococ
;fifteen 4s
An expression may define and initialized a character string
75
8086Architecture
76. ¢ Character string
— Character string are used for descriptive data such as
people’s names and product descriptions.
— The string is defined within single quotes, such as ‘PC’, or
within double quotes, such as “PC”.
— The assembler stores the contents of the quotes as object
code in normal ASCII format, without the apostrophes.
— DB is the only format that defines a character string
exceeding two characters with the characters stored as left
adjusted ad in normal left-to-right sequences.
DB ‘Computer city’
DB “crazy sam’s CD emporium”
Character string are used for descriptive data such as
people’s names and product descriptions.
The string is defined within single quotes, such as ‘PC’, or
within double quotes, such as “PC”.
The assembler stores the contents of the quotes as object
code in normal ASCII format, without the apostrophes.
DB is the only format that defines a character string
exceeding two characters with the characters stored as left
right sequences.
DB “crazy sam’s CD emporium”
76
8086Architecture
77. DIRECTIVE FOR DEFINING DATA
¢ DB or BYTE: Define Byte
— A DB (or BYTE) numeric expression may define one or more
1 byte constants, each consisting of two hex digits.
— For unsigned data, the range of values is
data, the range of values is -128
— The assembler converts numeric constants to binary object
code (represented in hex).
BYTE1 DB
BYTE2 DB
BYTE3 DB
BYTE4 DB
BYTE5 DB
DIRECTIVE FOR DEFINING DATA
A DB (or BYTE) numeric expression may define one or more
byte constants, each consisting of two hex digits.
For unsigned data, the range of values is 0 to 255; for signed
128 to +127.
The assembler converts numeric constants to binary object
?
48
30H
01111010B
10 DUP(0) 77
8086Architecture
78. ¢ DW or WORD : Define Word
— The DW directive defines items that are one word (two bytes)
in length.
— A DW numeric expression may define one or more one word
constants.
— For unsigned numeric data, the range of values is 0 to 65535;
for signed data, the range of value is
— The assembler converts DW numeric constants to binary
object code (represented in hex), but stores the bytes in
reverse sequence.
— Consequently, a decimal value defined as 12345 converts to
hex 3039, but is stored as 3930.
The DW directive defines items that are one word (two bytes)
A DW numeric expression may define one or more one word
For unsigned numeric data, the range of values is 0 to 65535;
for signed data, the range of value is -32768 to +32767.
The assembler converts DW numeric constants to binary
object code (represented in hex), but stores the bytes in
Consequently, a decimal value defined as 12345 converts to
78
8086Architecture
80. ¢ DD or DWORD: Define Doubleword
— The DD directive defines items that are a doubleword (four
byte) in length.
— A DD numeric expression may define one or more constants,
each with a maximum of four bytes ( 8 hex digit).
— For unsigned numeric data, the range of values is 0 to
4294967295; for signed data, the range is
+2147483647.
— The assembler converts DD numeric constants to binary
object code (represented in hex), but stores the bytes in
reverse sequence.
— Consequently, the assembler converts a decimal value
defined as 12345678 to 00BC614EH and stores it as
4E61BC00H.
DD or DWORD: Define Doubleword
The DD directive defines items that are a doubleword (four
A DD numeric expression may define one or more constants,
each with a maximum of four bytes ( 8 hex digit).
For unsigned numeric data, the range of values is 0 to
4294967295; for signed data, the range is -2147483648 to
The assembler converts DD numeric constants to binary
object code (represented in hex), but stores the bytes in
Consequently, the assembler converts a decimal value
defined as 12345678 to 00BC614EH and stores it as 80
8086Architecture
82. ¢ EQU Directive
— The EQU directive (short form of equivalent) an be used to
assign a name to constant.
— PROD EQU 55H directs the assembler to assign the value
55H every time it finds PROD in the program.
— MOV BX, PROD moves 55H in BX.
The EQU directive (short form of equivalent) an be used to
H directs the assembler to assign the value
H every time it finds PROD in the program.
H in BX.
82
8086Architecture
84. 1 Page 60, 132
2 TITLE A05ASM1
3 ; -----------------------------------------------------------------------------
4 0000 STACK SEGMENT
5 0000 0020[0000] DW
6 0040 STACK ENDS
7 ; ……………………………………………………………………………………………………….
8 0000 DATASEG SEGMENT
9 0000 00D7 FLDD DW
10 0002 007D FLDE DW
11 0004 0000 FLDF DW
12 0006 DATASEG ENDS
13 ; …………………………………………………………………………………………………………
14 0000 CODESEG SEGMENT
15 0000 MAIN PROC
16 ASSUME
17 0000 B8 ---- R MOV
18 0003 8E D8 MOV
19 0005 A1 0000 R MOV
20 0008 03 06 0002 R ADD AX, FLDE
21 000C A3 0004 R MOV FLDF, AX
22 000F B84C00 MOV AX, 4C
23 0012 CD 21 INT
24 0014 MAIN ENDP
25 0014 CODESEG ENDS
26 END MAIN
move and add operations
---------------------------------------------------------------------------------------------------------------------
32 DUP (0)
; ……………………………………………………………………………………………………….
SEGMENT
215
125
?
; …………………………………………………………………………………………………………
SEGMENT
FAR
SS:STACK, DS:DATASEG, CS:CODESEG
AX, DATASEG ;set address of data segment
DS, AX ; in DS
AX, FLDD ;move 0215 to AX
;add 0125 to AX
MOV FLDF, AX ;store sum in FLDF
C00H ;end processing
21H
;end of procedure
;end of segment
84
8086Architecture
85. 1 PAGE 60,132
2 TITLE A05ASM3
3 ; ------------------------------------------------------------------------------------
4 .MODEL
5 .STACK
6 .DATA
7 0000 00D7 FLDD DW
8 0002 007D FLDE DW
9 0004 0000 FLDF DW
10 ; ---------------------------------------------------------------------------------------
11 .CODE
12 0000 MAIN PROC
13 0000 B8 ---- R MOV AX, @data
14 0003 8E D8 MOV DS, AX
15
16 0005 A1 0000 R MOV AX, FLDD
17 0008 03 06 0002 R ADD AX, FLDE
18 000C A3 0004 R MOV FLDF, AX
19
20 000F B8 4C00 MOV AX, 4C00H
21 0012 CD 21 INT 21H
22 0014 MAIN ENDP
23 END MAIN
Move and add operation
------------------------------------------------------------------------------------
SMALL
64 ;define stack
;define data
215
125
?
---------------------------------------------------------------------------------------
;define code segment
FAR
MOV AX, @data ;set address of data segment in DS
MOV DS, AX
MOV AX, FLDD ;move 0215 to AX
ADD AX, FLDE ;add 0125 to AX
MOV FLDF, AX ;store sum in FLDF
MOV AX, 4C00H ;End processing
;End of procedure
END MAIN ;End of program
85
8086Architecture
86. MACRO ASSEMBLER
¢ Translate a program written in macro language into the
machine language.
¢ A macro language is the one in which all the instruction
sequence can be defined using macros.
¢ A macro is an instruction sequence that appears
repeatedly in a program assigned with a specific name.
¢ The macro assembler replaces a macro name with the
appropriate instruction sequence each time it
encounters a macro name.
¢ The main difference between a macro and a procedure is
that in the macro the passage of parameters is possible
and in the procedure it is not.
Translate a program written in macro language into the
A macro language is the one in which all the instruction
sequence can be defined using macros.
A macro is an instruction sequence that appears
repeatedly in a program assigned with a specific name.
The macro assembler replaces a macro name with the
appropriate instruction sequence each time it
The main difference between a macro and a procedure is
that in the macro the passage of parameters is possible 86
8086Architecture
87. ¢ Syntax of macro:
— Declaration of the macro
— Code of the macro
— Macro termination directive
¢ The declaration of the macro is done the following way:
NameMacro MACRO [parameter1, parameter2...]
¢ The directive for the termination of the macro is: ENDM
The declaration of the macro is done the following way:
NameMacro MACRO [parameter1, parameter2...]
The directive for the termination of the macro is: ENDM
87
8086Architecture
88. Addition MACRO
IN AX, PORT
ADD AX, BX
OUT PORT, AX
ENDM
¢ When above instruction sequence is to be executed
repeatedly macro assembler allow the macro name only
to be typed instead of all instructions, provided the
macro is defined.
OUT PORT, AX
When above instruction sequence is to be executed
repeatedly macro assembler allow the macro name only
to be typed instead of all instructions, provided the
88
8086Architecture
89. ¢ There exist difference between a macro program and a
subroutine program.
¢ A specific subroutine occurs once in a program. A
subroutine is executed by calling it from a main
program. The program execution jumps out of the main
program and then executes the subroutine. At the end
of the subroutine, a RET instruction is used to resume
program execution following the CALL SUBROUTINE
instruction in the main program
There exist difference between a macro program and a
A specific subroutine occurs once in a program. A
subroutine is executed by calling it from a main
program. The program execution jumps out of the main
program and then executes the subroutine. At the end
of the subroutine, a RET instruction is used to resume
program execution following the CALL SUBROUTINE
instruction in the main program
89
8086Architecture
90. ¢ A macro does not cause the program execution to
branch out of the main program. Each time a macro
occurs, it is replaced with the appropriate sequence in
the main program. The advantages of using macros are
that the source programs become shorter and program
documentation becomes better.
¢ Conditional macro assembler is very useful in
determining whether or not an instruction sequence
shall be included in the assembly depending on a
condition that is true or false.
¢ Based on each condition, a particular program is
assembled.
A macro does not cause the program execution to
branch out of the main program. Each time a macro
occurs, it is replaced with the appropriate sequence in
the main program. The advantages of using macros are
that the source programs become shorter and program
documentation becomes better.
Conditional macro assembler is very useful in
determining whether or not an instruction sequence
shall be included in the assembly depending on a
Based on each condition, a particular program is
90
8086Architecture
91. DESCRIPTION OF ASSEMBLY PROCESS
IN MACRO ASSEMBLER (MASM)
¢ MASM is two pass assembler.
¢ The complete process of assembling, linking, and
executing an assembly language program using a macro
assembler is similar as mentioned previous.
Assembly
language
(Source code)
*.ASM
Object code
*.OBJ
Assembler
DESCRIPTION OF ASSEMBLY PROCESS
IN MACRO ASSEMBLER (MASM)
The complete process of assembling, linking, and
executing an assembly language program using a macro
assembler is similar as mentioned previous.
Object code
*.OBJ
Executable file
*.EXE or
*.COM
Linker
91
8086Architecture
92. ¢ The assembly step involves translating the source code
into object code and generating an intermediate .OBJ
file, or module. One of the assembler’s tasks is to
calculate the offsets for every data item in the data
segment and for every instruction in the code segment.
¢ The link step involves converting the .OBJ module to an
.EXE machine code module. The linker’s tasks include
completing any address left open by the assembler and
combining separately assembled programs into one
executable module.
¢ The last step is to load the program for execution.
The assembly step involves translating the source code
into object code and generating an intermediate .OBJ
file, or module. One of the assembler’s tasks is to
calculate the offsets for every data item in the data
segment and for every instruction in the code segment.
The link step involves converting the .OBJ module to an
.EXE machine code module. The linker’s tasks include
completing any address left open by the assembler and
combining separately assembled programs into one
The last step is to load the program for execution.
92
8086Architecture
93. ASSEMBLING THE SOURCE PROGRAM
¢ The assembler converts the source statements into
machine code and displays any error messages on the
screen.
¢ Typical errors include a name that violates naming
conventions, an operation that is spelled incorrectly
(such as MOVE instead of MOV), and an operand
containing a name that is not defined.
¢ The assembler attempts to correct some errors but, in
any event, reload the editor, correct the .ASM source
program, and reassemble it.
¢ Optional output files from the assembly step are object
(.OBJ), listing (.LST) and cross reference (.CRF or
.SBR).
ASSEMBLING THE SOURCE PROGRAM
The assembler converts the source statements into
machine code and displays any error messages on the
Typical errors include a name that violates naming
conventions, an operation that is spelled incorrectly
(such as MOVE instead of MOV), and an operand
containing a name that is not defined.
The assembler attempts to correct some errors but, in
any event, reload the editor, correct the .ASM source
Optional output files from the assembly step are object
(.OBJ), listing (.LST) and cross reference (.CRF or
93
8086Architecture
94. LINKING AN OBJECT PROGRAM
¢ When the program is free of error messages, the next step is to link
the object module that was produced by the assembler and that
contains only machine code.
¢ The linker performs the following functions:
— Combines, if requested, more than one separately assembled
module into one executable program, such as two or more assembly
programs or an assembly program with a C program.
— Generates an .EXE module and initialize it with special instruction
to facilitate its subsequent loading for execution.
¢ Once one or more .OBJ modules are linked into an .EXE module,
.EXE module can execute any number of times.
¢ But the source program needs correction: correct source program,
assemble again into an .OBJ module, and link .OBJ module into an
.EXE module.
LINKING AN OBJECT PROGRAM
When the program is free of error messages, the next step is to link
the object module that was produced by the assembler and that
The linker performs the following functions:
Combines, if requested, more than one separately assembled
module into one executable program, such as two or more assembly
programs or an assembly program with a C program.
Generates an .EXE module and initialize it with special instruction
to facilitate its subsequent loading for execution.
Once one or more .OBJ modules are linked into an .EXE module,
.EXE module can execute any number of times.
But the source program needs correction: correct source program,
assemble again into an .OBJ module, and link .OBJ module into an
94
8086Architecture
95. EXECUTING A PROGRAM
¢ Having assembled and linked a program, the program
can now execute.
¢ If the .EXE file is in the default drive, ask the loader to
read it into memory for execution by typing
A05ASM1.EXE or A05ASM
¢ However, since this program produces no visible output,
it is suggested that you run it under DEBUG and use
Trace commands to step through its execution. DEBUG
load the .EXE program module and displays its hyphen
prompt.
EXECUTING A PROGRAM
Having assembled and linked a program, the program
If the .EXE file is in the default drive, ask the loader to
read it into memory for execution by typing
ASM1 (without .EXE extension)
However, since this program produces no visible output,
it is suggested that you run it under DEBUG and use
Trace commands to step through its execution. DEBUG
load the .EXE program module and displays its hyphen
95
8086Architecture
96. 16 BIT MICROPROCESSOR ADDRESSING
MODE
¢ The 8086 provides various addressing modes to access instruction
operands.
¢ Operands may be contained in registers, in memory or in I/O ports.
¢ The three basic modes of addressing are register, immediate, and
memory; memory addressing consists of six types, for eight modes
in all.
— Register addressing
— Immediate addressing
— Direct memory addressing
— Direct-offset addressing
— Indirect memory addressing
— Base displacement addressing
— Base index addressing
— Base-index with displacement addressing
16 BIT MICROPROCESSOR ADDRESSING
provides various addressing modes to access instruction
Operands may be contained in registers, in memory or in I/O ports.
The three basic modes of addressing are register, immediate, and
memory; memory addressing consists of six types, for eight modes
index with displacement addressing
96
8086Architecture
97. REGISTER ADDRESSING
¢ For this mode, a register provides the name of any of
the 8, or16 bit register. Depending on the instruction,
the register may appear in the first operand, the second
operand or both, as the following examples illustrate:
MOV DX, WORD_MEM
MOV WORD_MEM, CX
MOV DX, BX
REGISTER ADDRESSING
For this mode, a register provides the name of any of
the 8, or16 bit register. Depending on the instruction,
the register may appear in the first operand, the second
operand or both, as the following examples illustrate:
MOV DX, WORD_MEM
MOV WORD_MEM, CX
97
8086Architecture
98. IMMEDIATE ADDRESSING
¢ An immediate operand contains a constant value or an
expression.
¢ For many instructions with two operands, the first
operand may be a register or memory location, and the
second may be an immediate constant. The destination
field (first operand) defines the length of the data.
byte_val DB 150
word_val DW 300
MOV word_val, 40H
MOV AX, 0245H
IMMEDIATE ADDRESSING
An immediate operand contains a constant value or an
For many instructions with two operands, the first
operand may be a register or memory location, and the
second may be an immediate constant. The destination
field (first operand) defines the length of the data.
;define byte
;define word
MOV word_val, 40H 98
8086Architecture
99. DIRECT MEMORY ADDRESSING
¢ In this format, one of the operands references a memory
location and the other operand references a register.
ADD BYTE_VAL, DL
MOV BX, WORD_VAL
DIRECT MEMORY ADDRESSING
In this format, one of the operands references a memory
location and the other operand references a register.
99
8086Architecture
100. DIRECT OFFSET ADDRESSING
¢ This addressing mode, a variation of direct addressing, uses
arithmetic operators to modify an address.
¢ The following examples use these definitions of tables:
BYTE_TBL DB 12, 15, 16
WORD_TBL DB 163, 227
DBWD_TBL DB 465, 563
¢ Byte operations: these instructions access bytes from BYTE_TBL:
MOV CL, BYTE_TBL[2]
MOV CL, BYTE_TBL+2
¢ Word operation: these instruction access words from WORD_TBL:
MOV CX, WORD_TBL[4]
MOV CX, WORD_TBL+4
DIRECT OFFSET ADDRESSING
This addressing mode, a variation of direct addressing, uses
arithmetic operators to modify an address.
The following examples use these definitions of tables:
16, 22, ……..
227, 435, ……..
563, 897, ……..
Byte operations: these instructions access bytes from BYTE_TBL:
Word operation: these instruction access words from WORD_TBL:
100
8086Architecture
101. INDIRECT MEMORY ADDRESSING
¢ Indirect addressing takes advantage of the computer’s capability
for segment:offset addressing.
¢ The registers used for this purpose are base registers (BX and BP)
and index registers (DI and SI), coded within square brackets,
which indicate a reference to memory.
¢ An indirect address such as [DI] tells the assembler that the
memory address to use will be in DI when the program
subsequently executes.
¢ BX, DI, and SI are associated with DS as DS:BX, DS:DI, and DS:SI,
for processing data in the data segment.
¢ BP is associated with SS as SS:BP, for handling data in the stack.
¢ When the first operand contains an indirect address, the second
operand reference a register or immediate value; when the second
operand contains an indirect address, the first operand references a
register.
INDIRECT MEMORY ADDRESSING
Indirect addressing takes advantage of the computer’s capability
The registers used for this purpose are base registers (BX and BP)
and index registers (DI and SI), coded within square brackets,
which indicate a reference to memory.
An indirect address such as [DI] tells the assembler that the
memory address to use will be in DI when the program
BX, DI, and SI are associated with DS as DS:BX, DS:DI, and DS:SI,
for processing data in the data segment.
BP is associated with SS as SS:BP, for handling data in the stack.
When the first operand contains an indirect address, the second
operand reference a register or immediate value; when the second
operand contains an indirect address, the first operand references a
101
8086Architecture
102. ¢ A reference in square brackets to BP, BX, DI or SI implies an
indirect operand, and the processor treats the contents of the
register as an offset address when the program is executing.
— DATA_VAL DB
……..
LEA BX, DATA_VAL
MOV [BX], CL
— ADD CL, [BX]
ADD [BP], CL
A reference in square brackets to BP, BX, DI or SI implies an
indirect operand, and the processor treats the contents of the
register as an offset address when the program is executing.
50
LEA BX, DATA_VAL
102
8086Architecture
103. BASE DISPLACEMENT ADDRESSING
¢ This addressing mode also uses base register (BX and
BP) and index registers (DI and SI), but combined with
a displacement (a number or offset value) to form an
effective address.
¢ The following MOV instruction moves zero to a location
two bytes immediately following the start of
DATA_TBL;
DATA_TBL DB 365 DUP(?)
………
ADD CL, [DI+12]
SUB DATA_TBL, DL
MOV DATA_TBL[DI], DL
BASE DISPLACEMENT ADDRESSING
This addressing mode also uses base register (BX and
BP) and index registers (DI and SI), but combined with
a displacement (a number or offset value) to form an
The following MOV instruction moves zero to a location
two bytes immediately following the start of
365 DUP(?)
ADD CL, [DI+12]
SUB DATA_TBL, DL
MOV DATA_TBL[DI], DL
103
8086Architecture
104. BASE INDEX ADDRESSING
¢ This addressing mode combines a base register (BX or
BP) with an index register (DI or SI) to form an effective
address; for example, [BX+DI] means the address in BX
plus the address in DI.
¢ A common use for this mode is in addressing a 2
dimensional array, where, say, BX references the row
and SI the column.
MOV AX, [BX+SI]
ADD [BX+DI], CL
BASE INDEX ADDRESSING
This addressing mode combines a base register (BX or
BP) with an index register (DI or SI) to form an effective
address; for example, [BX+DI] means the address in BX
A common use for this mode is in addressing a 2-
dimensional array, where, say, BX references the row
104
8086Architecture
105. BASE INDEX WITH DISPLACEMENT ADDRESSING
¢ This addressing mode, a variation on base index,
combines a base register, an index register, and a
displacement to form an effective address.
MOV AX, [BX+DI+10]
MOV CL, DATA_TBL[BX+DI]
BASE INDEX WITH DISPLACEMENT ADDRESSING
This addressing mode, a variation on base index,
combines a base register, an index register, and a
displacement to form an effective address.
105
8086Architecture
106. INSTRUCTIONS
— Data Transfer Instructions
— Arithmetic Instructions
— Bit Manipulation Instructions
— String Instructions
— Program Execution Transfer Instructions
— Processor Control Instructions
Program Execution Transfer Instructions
106
8086Architecture
107. DATA TRANSFER INSTRUCTIONS
¢ General purpose byte or word transfer instructions
¢ Simple input and output port transfer instructions
MOV copy byte or word from specified source to specified destination
PUSH Copy specified word to top of stack
POP Copy word from top of stack to specified location
XCHG Exchange bytes or exchange words
XLAT Translate a byte in AL using a table in memory
IN Copy a byte or word from specified port to accumulator
OUT Copy a byte or word from accumulator to specified port
DATA TRANSFER INSTRUCTIONS
General purpose byte or word transfer instructions:
Simple input and output port transfer instructions:
copy byte or word from specified source to specified destination
Copy specified word to top of stack
Copy word from top of stack to specified location
Exchange bytes or exchange words
Translate a byte in AL using a table in memory
Copy a byte or word from specified port to accumulator
Copy a byte or word from accumulator to specified port
107
8086Architecture
108. ¢ Special address transfer instructions:
¢ Flag transfer instructions
LEA Load effective address of operand into specified register
LDS Load DS register and other specified register from memory
LES Load ES register and other specified register from memory
LAHF Load (copy to ) AH with the low byte of the flag register
SAHF Store (copy) AH register to low byte of flag register
PUSHF Copy flag register to top of stack
POPF Copy word at top of stack to flag register
Special address transfer instructions:
Load effective address of operand into specified register
Load DS register and other specified register from memory
Load ES register and other specified register from memory
Load (copy to ) AH with the low byte of the flag register
Store (copy) AH register to low byte of flag register
Copy flag register to top of stack
Copy word at top of stack to flag register 108
8086Architecture
109. ARITHMETIC INSTRUCTIONS
¢ Addition instructions:
¢ Multiplication instructions
ADD Add specified byte to byte or specified word to word
ADC Add byte + byte + carry flag or word + word + carry flag
INC Increment specified byte or specified word by 1
AAA ASCII adjust after addition
DAA Decimal (BCD) adjust after addition
MUL Multiply unsigned byte by byte or unsigned word by word
IMUL Multiply signed byte by byte or signed word by word
AAM ASCII adjust after multiplication
ARITHMETIC INSTRUCTIONS
Add specified byte to byte or specified word to word
Add byte + byte + carry flag or word + word + carry flag
Increment specified byte or specified word by 1
ASCII adjust after addition
Decimal (BCD) adjust after addition
Multiply unsigned byte by byte or unsigned word by word
Multiply signed byte by byte or signed word by word
ASCII adjust after multiplication 109
8086Architecture
110. ¢ Subtraction instructions:
¢ Division instructions:
SUB Subtract byte from byte or word for word
SBB Subtract byte and carry flag from byte or word ad carry
flag from word.
DEC Decrement specified byte or specified word by 1
NEG Negate – invert each bit of a specified byte or word and
add 1. (form 2’s complement)
CMP Compare two specified bytes or two specified words
AAS ASCII adjust after subtraction
DAS Decimal (BCD) adjust after subtraction
DIV Divide unsigned word by byte or unsigned DW by word
IDIV Divide signed word by byte or signed DW by word
AAD ASCII adjust before division
CBW Fill upper byte of word with copies of sign bit of lower byte
CWD Fill upper word of DW with sign bit of lower word
Subtract byte from byte or word for word
Subtract byte and carry flag from byte or word ad carry
Decrement specified byte or specified word by 1
invert each bit of a specified byte or word and
add 1. (form 2’s complement)
Compare two specified bytes or two specified words
ASCII adjust after subtraction
Decimal (BCD) adjust after subtraction
Divide unsigned word by byte or unsigned DW by word
Divide signed word by byte or signed DW by word
ASCII adjust before division
Fill upper byte of word with copies of sign bit of lower byte
Fill upper word of DW with sign bit of lower word
110
8086Architecture
111. BIT MANIPULATION INSTRUCTION
¢ Logical instructions:
NOT Invert each bit of a byte or word
AND AND each bit in a byte or word with the corresponding bit
in another byte or word
OR OR each bit in a byte or word with the corresponding bit
in another byte or word
XOR Exclusive OR each bit in a byte or word with the
corresponding bit in another byte or word
TEST AND operands to update flags, but don’t change operands
BIT MANIPULATION INSTRUCTION
Invert each bit of a byte or word
AND each bit in a byte or word with the corresponding bit
in another byte or word
OR each bit in a byte or word with the corresponding bit
in another byte or word
Exclusive OR each bit in a byte or word with the
corresponding bit in another byte or word
AND operands to update flags, but don’t change operands
111
8086Architecture
112. ¢ Shift instruction
¢ Rotate instructions:
SHL/SAL Shift bits of byte or word left, put zero(s) in LSB(s).
SHR Shift bits of byte or word right, put zero(s) in MSB(s).
SAR Shift bits of word or byte right, copy old MSB into new MSB
ROL Rotate bits of byte or word left, MSB to LSB and to CF
ROR Rotate bits of byte or word right, LSB to MSB and to CF
RCL Rotate bits of byte or word left, MSB to CF and CF to LSB
RCR Rotate bits of byte or word right, LSB to CF and CF to MSB
Shift bits of byte or word left, put zero(s) in LSB(s).
Shift bits of byte or word right, put zero(s) in MSB(s).
Shift bits of word or byte right, copy old MSB into new MSB
Rotate bits of byte or word left, MSB to LSB and to CF
Rotate bits of byte or word right, LSB to MSB and to CF
Rotate bits of byte or word left, MSB to CF and CF to LSB
Rotate bits of byte or word right, LSB to CF and CF to MSB
112
8086Architecture
113. STRING INSTRUCTIONS
REP An instruction prefix Repeat following
instruction until CX=0
REPE/REPZ Repeat while equal/zero
REPNE/REPNZ Repeat while not equal/zero
MOVX/MOVSB/MOVSW Move byte or word from one string to another
COMPS/COMPSB/COMPSW Compare two string bytes or two string words
SCAS/SCASB/SCASW Scan a string. Compare a string byte with a
byte in AL or a string word with a word in AX
LODS/LODSB/LODSW Load string byte into AL or string word into AX
STOS/STOSB/STOSW Store byte from AL or word from AX into string
STRING INSTRUCTIONS
An instruction prefix Repeat following
instruction until CX=0
Repeat while equal/zero
Repeat while not equal/zero
Move byte or word from one string to another
Compare two string bytes or two string words
Scan a string. Compare a string byte with a
byte in AL or a string word with a word in AX
Load string byte into AL or string word into AX
Store byte from AL or word from AX into string
113
8086Architecture
114. PROGRAM EXECUTION TRANSFER
INSTRUCTIONS
¢ Unconditional transfer instructions:
¢ Conditional transfer instructions:
CALL Call a procedure (subprogram), save return address on stack
RET Return from procedure to calling program
JMP Go to specified address to get next instruction
JA/JNBE Jump if above/ jump if not below or equal
JAE/JNB Jump if above or equal/ jump if not below
JB/JNAE Jump if below/ jump if not above or equal
JBE/JNA Jump if below or equal/ jump if not above
JC Jump if carry =1
JE/JZ Jump if equal/ jump if zero
JG/JNLE Jump if greater/ jump if not less than or equal
PROGRAM EXECUTION TRANSFER
Call a procedure (subprogram), save return address on stack
Return from procedure to calling program
Go to specified address to get next instruction
Jump if above/ jump if not below or equal
Jump if above or equal/ jump if not below
Jump if below/ jump if not above or equal
Jump if below or equal/ jump if not above
Jump if equal/ jump if zero
Jump if greater/ jump if not less than or equal
114
8086Architecture
115. JGE/JNL Jump if greater than or equal/ jump if not less than
JL/JNGE Jump if less than/ jump if not greater than or equal
JLE/JNG Jump if less than or equal/ jump if not greater than
JNC Jump if no carry
JNE/JNZ Jump if not equal/ jump if not zero
JNO Jump if no overflow
JNP/JPO Jump if not parity/ jump if parity odd (PF = 0)
JNS Jump if not sign
JO Jump if overflow
JP/JPE Jump if parity/ jump if parity even
JS Jump if sign
Jump if greater than or equal/ jump if not less than
Jump if less than/ jump if not greater than or equal
Jump if less than or equal/ jump if not greater than
Jump if not equal/ jump if not zero
Jump if not parity/ jump if parity odd (PF = 0)
Jump if parity/ jump if parity even
115
8086Architecture
116. ¢ Iteration control instructions:
¢ Interrupt instructions:
LOOP Loop through a sequence of instructions
until CX=0
LOOPE/LOOPZ Loop through a sequence of instruction
while ZF=1 and CX !=0
LOOPNE/LOOPNZ Loop through a sequence of instruction
while ZF=0 and CX!=0.
JCXZ Jump to specified address if CX=0.
INT Interrupt program execution, call service procedure
INTO Interrupt program execution if OF=1
IRET Return from interrupt service procedure to main program
Loop through a sequence of instructions
Loop through a sequence of instruction
while ZF=1 and CX !=0
Loop through a sequence of instruction
while ZF=0 and CX!=0.
Jump to specified address if CX=0.
Interrupt program execution, call service procedure
Interrupt program execution if OF=1
Return from interrupt service procedure to main program
116
8086Architecture
117. PROCESSOR CONTROL INSTRUCTIONS
¢ Flag set/clear instruction:
STC Set carry flag
CLC Clear carry flag
CMC Complement the status of carry flag
STD Set direction flag
CLD Clear direction flag
STI Set interrupt enable flag (enable INTR)
CLI Clear interrupt enable flag (disable INTR)
PROCESSOR CONTROL INSTRUCTIONS
Complement the status of carry flag
Set interrupt enable flag (enable INTR)
Clear interrupt enable flag (disable INTR)
117
8086Architecture
118. ¢ External hardware synchronization instructions:
¢ No operation instructions:
NOP No action except fetch and decode
HLT Halt until interrupt or reset
WAIT Wait until signal on the TEST pin is low
LOCK An instruction prefix. Prevents another processor from
taking the bus while the adjacent instruction executes
External hardware synchronization instructions:
No action except fetch and decode
Halt until interrupt or reset
Wait until signal on the TEST pin is low
An instruction prefix. Prevents another processor from
taking the bus while the adjacent instruction executes
118
8086Architecture
119. THE MOV INSTRUCTION
¢ MOV transfer (copy) data
referenced by the address
of the second operand to
the address of the first
operand. The sending
field is unchanged.
¢ The operands that
reference memory or
registers must agree in
size.
MOV destination, source
Destination
Memory
Accumulator
Register
Register
Memory
Register
Memory
Seg
Seg
Reg_16
Memory_16
THE MOV INSTRUCTION
Destination Source
Memory accumulator
Accumulator Memory
Register Register
Register Memory
Memory Register
Register Immediate
Memory Immediate
Seg-reg Reg_16
Seg-reg Memory_16
Reg_16 Seg_-reg
Memory_16 Seg-reg
119
8086Architecture
120. ¢ MOV SP, BX
— Copy a word from the BX register to the SP register
¢ MOV CL, [BX]
— Copy a byte to CL from the memory location whose effective
address is contained in BX. The effective address will be added to
the data segment base in DS to produce the physical address.
¢ MOV 43H[SI], DH
— Copy a byte from the DH register to a memory location. The BIU
will compute the effective address of the memory location by adding
the indicated displacement of 43H to the contents of the SI register.
The BIU then produces the actual physical address by adding this
effective address to the data segment base represented by the 16 bit
number in the DS register.
Copy a word from the BX register to the SP register
Copy a byte to CL from the memory location whose effective
address is contained in BX. The effective address will be added to
the data segment base in DS to produce the physical address.
Copy a byte from the DH register to a memory location. The BIU
will compute the effective address of the memory location by adding
the indicated displacement of 43H to the contents of the SI register.
The BIU then produces the actual physical address by adding this
effective address to the data segment base represented by the 16 bit
120
8086Architecture
121. ¢ MOV CX, [434AH]
— Copy the contents of two memory locations into the CX register.
The direct address or displacement of the first memory location
from the start of the data segment is 437AH. The BIU will produce
the physical memory address by adding this displacement to the
data segment base represented by the 16 bit number in the DS
register.
¢ MOV CS:[BX], DL
— Copy a byte from the DL register to a memory location. The
effective address for the memory location is contained in the BX
register. Normally an effective address in BX will be added to the
data segment base in DS to produce the physical memory address.
In this instruction, the CS: in front of [BX] indicates that we want
the BIU to add the effective address to the code segment base in CS
to produce the physical address. This CS: is called a
override prefix.
Copy the contents of two memory locations into the CX register.
The direct address or displacement of the first memory location
from the start of the data segment is 437AH. The BIU will produce
the physical memory address by adding this displacement to the
data segment base represented by the 16 bit number in the DS
Copy a byte from the DL register to a memory location. The
effective address for the memory location is contained in the BX
register. Normally an effective address in BX will be added to the
data segment base in DS to produce the physical memory address.
In this instruction, the CS: in front of [BX] indicates that we want
the BIU to add the effective address to the code segment base in CS
to produce the physical address. This CS: is called a segment 121
8086Architecture
122. ¢ MOV AX, 0010H
— Load the immediate word 0010H into the AX register.
¢ MOV [0000], AL
— Copy the contents of the AL register to a memory location.
The direct address or displacement of the memory location
from the start of the data segment is 0000H.
Load the immediate word 0010H into the AX register.
Copy the contents of the AL register to a memory location.
The direct address or displacement of the memory location
from the start of the data segment is 0000H.
122
8086Architecture
123. THE LEA, LDS, LES INSTRUCTION
¢ useful for initializing a register with an offset address.
¢ A common use for LEA is to initialize an offset in BX,
DI, or SI for indexing an address in memory.
DATATBL DB 25 DUP (?)
BYTEFLD DB ?
…………
LEA BX, DATATBL
MOV BYTEFLD, [BX]
THE LEA, LDS, LES INSTRUCTION
useful for initializing a register with an offset address.
A common use for LEA is to initialize an offset in BX,
DI, or SI for indexing an address in memory.
25 DUP (?)
LEA BX, DATATBL
MOV BYTEFLD, [BX]
123
8086Architecture
124. ¢ For the figure below, what is the result of executing the
following instruction?
LEA SI, [DI + BX + 2H]
DS 0100 DS
SI F002 SI
DI 0020 DI
AX 0003 AX
BX 0040 BX
before after
For the figure below, what is the result of executing the
LEA SI, [DI + BX + 2H]
0100
0042
0020
0003
0040
after
124
8086Architecture
125. ¢ For these three instructions (LEA, LDS, LES) the effective
address could be formed of all or any various combinations
of the three elements:
¢ What is the result of executing the following instruction?
LDS SI, [DI + BX + 2H]
For these three instructions (LEA, LDS, LES) the effective
address could be formed of all or any various combinations
What is the result of executing the following instruction?
125
8086Architecture
127. THE ADD INTRUCTION
¢ Add a number from some source to a number from some
destination and put the result in the specified
destination.
¢ The source may be an immediate number, a register, or
a memory location.
¢ The destination may be a register, or a memory
location.
¢ The source and the destination in an instruction cannot
both be memory locations.
¢ The source and the destination must be of the same
type.
¢ Flags affected: AF, CF, OF, PF, SF, ZF.
Add a number from some source to a number from some
destination and put the result in the specified
The source may be an immediate number, a register, or
The destination may be a register, or a memory
The source and the destination in an instruction cannot
The source and the destination must be of the same
Flags affected: AF, CF, OF, PF, SF, ZF.
127
8086Architecture
130. THE SUB INSTRUCTION
¢ Subtract the number in the indicated source from the
number in the indicated destination and put the result
in the indicated destination.
¢ For subtraction, the carry flag (CF) functions as a
borrow flags.
¢ The carry flag will be set after a subtraction if the
number in the specified source is larger than the
number in the specified destination.
¢ Source/destination à same as addition.
¢ Flags affected: AF, CF, OF, PF, SF and ZF
THE SUB INSTRUCTION
Subtract the number in the indicated source from the
number in the indicated destination and put the result
For subtraction, the carry flag (CF) functions as a
The carry flag will be set after a subtraction if the
number in the specified source is larger than the
number in the specified destination.
same as addition.
Flags affected: AF, CF, OF, PF, SF and ZF
130
8086Architecture
131. ¢ EXAMPLES:
— SUB CX, BX
— SBB CH, AL
— SUB AX, 3481H
— SBB BX, [3427H]
— SUB PRICES[BX], 04H ; subtract 04 from byte at effective
address PRICE[BX] if PRICES
declared with DB. Subtract 04 from
word at effective address
PRICES[BX} if PRICES declared
with DW
— SBB CX, TABLE[BX]
— SBB TABLE[BX], CX
; subtract 04 from byte at effective
address PRICE[BX] if PRICES
declared with DB. Subtract 04 from
word at effective address
PRICES[BX} if PRICES declared
with DW
131
8086Architecture
132. THE MUL INSTRUCTION
¢ Multiplies an unsigned byte from some source times an
unsigned byte in the AL register or an unsigned word
from some source times an unsigned word in the AX
register.
¢ The source can be a register or a memory location.
¢ When a byte is multiplied by the content of AL, the
result is put in AX.
¢ A 16 bit destination is required because the result of
multiplying an 8 bit number by an 8 bit number can be
as large as 16 bit.
¢ The most significant byte of the result is put in AH, and
the least significant byte of the result is put in AL.
THE MUL INSTRUCTION
Multiplies an unsigned byte from some source times an
unsigned byte in the AL register or an unsigned word
from some source times an unsigned word in the AX
The source can be a register or a memory location.
When a byte is multiplied by the content of AL, the
A 16 bit destination is required because the result of
multiplying an 8 bit number by an 8 bit number can be
The most significant byte of the result is put in AH, and
the least significant byte of the result is put in AL.
132
8086Architecture
133. ¢ When a word is multiplied by the contents of AX, the
product can be as large as 32 bits.
¢ The most significant word of the result is put in DX
register, and the least significant word of the result is
put in the AX register.
¢ EXAMPLES:
— MUL BH
— MUL CX
— MUL CONVERSION[BX]
When a word is multiplied by the contents of AX, the
product can be as large as 32 bits.
The most significant word of the result is put in DX
register, and the least significant word of the result is
133
8086Architecture
134. THE IMUL INSTRUCTION
¢ Multiplies a signed byte from some source times a
signed byte in AL or a signed word from some source
times a signed word in AX.
¢ The source can be a register or a memory location.
¢ When a byte is multiplied by the content of AL, the
result is put in AX.
¢ A 16 bit destination is required because the result of
multiplying an 8 bit number by an 8 bit number can be
as large as 16 bit.
¢ The most significant byte of the result is put in AH, and
the least significant byte of the result is put in AL.
THE IMUL INSTRUCTION
Multiplies a signed byte from some source times a
signed byte in AL or a signed word from some source
The source can be a register or a memory location.
When a byte is multiplied by the content of AL, the
A 16 bit destination is required because the result of
multiplying an 8 bit number by an 8 bit number can be
The most significant byte of the result is put in AH, and
the least significant byte of the result is put in AL. 134
8086Architecture
135. ¢ When a word is multiplied by the contents of AX, the
product can be as large as 32 bits.
¢ The most significant word of the result is put in DX
register, and the least significant word of the result is
put in the AX register.
¢ If the magnitude of the product does not require all the
bits of the destination, the unused bits will be filled
with copies of the sign bit.
¢ EXAMPLES:
— IMUL BH
— IMUL AX
When a word is multiplied by the contents of AX, the
product can be as large as 32 bits.
The most significant word of the result is put in DX
register, and the least significant word of the result is
If the magnitude of the product does not require all the
bits of the destination, the unused bits will be filled
135
8086Architecture