The document describes the operation of a scan chain used for testing integrated circuits. The scan chain can operate in either shift mode or parallel mode, controlled by the Scan_En pin. In shift mode, each scan cell's input comes from the previous cell's output to shift in a test pattern. In parallel mode, each cell's input comes from the associated combinational logic block. The testing process involves initializing the scan cells, applying a stimulus to primary inputs with Scan_En low, measuring primary outputs, pulsing the clock to capture values, and enabling scan mode to unload the captured values.