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HIMANSHU SOMAIYA
935 Marietta Street, Apt. #429, Atlanta, GA 30318 | hsomaiya3@gatech.edu|+1(404)583-1670
EDUCATION
Georgia Institute of Technology, Atlanta, Georgia August 2015 – December 2016
Master of Science, Electrical and Computer Engineering CGPA-3.66/4
Vellore Institute of Technology, Vellore, India July 2011 - May 2015
Bachelor of Technology, Electronics and Communications CGPA-9.25/10
TECHNICAL SKILLS
Computer Architecture: Caches, predictors, consistency, coherency, Out Of Order Superscalar, prefetches, SMT
Circuit Design: MOSFETs, SRAM, BitCell Analysis, Flip-Flops, Registers, Sense Amplifier, Multiplexer,
Interconnect, Adder, Decoder, Multiplexers, Layout, Synchronous Timing Analysis
CAD Tools: Cadence Virtuoso, HSPICE, Spectre, Calibre (DRC, LVS, PEX), WaveViewer
Software: Xilinx Ise, Keil uVision, Proteus, AWR Design Environment
Programming Languages: C, C++, MATLAB, Verilog HDL, Perl, HTML
Course Work: Physical Design Automation for VLSI Design, CAD VLSI System Design, Parallel & Distributed
Computer Architecture, High Performance Computing, Advanced VLSI Systems, Advanced Computer Architecture,
Digital Systems Test, Computer Vision
PROFESSIONAL EXPERIENCE
Mathematics Grader – Georgia Institute of Technology, Atlanta, Georgia January 2016 – current
Project Trainee - Tata Communications Limited, Mumbai, India June 2013 - July 2013
 Developed a Perl program to download files from the Main Server to the Local Server
 Solved problems related to the files getting deleted from the Main Server every three months
 Explored Company's Network setup and Protocols used in Submarine Cable Networks
PROJECTS
Design of FPGA based Hardware to Accelerate Deep Neural Networks Summer 2016
 Designed a frame work that automatically generates a synthesizable accelerator for a given DNN and FPGA pair
 Developed test-benches for various modules to check its implementation in the architecture design flow
 Used Caffe to compare the performance of Lenet and Siamese benchmarks to our hardware
Parallel Programming using OpenMP and Message Passing Interface (MPI) using C++ Spring 2016
 Solved the N-Queens problem using a Master-Worker paradigm in MPI
 Performed serial and parallel versions to calculate images of the Mandelbrot Set at different zoom levels
 Implemented parallel and distributed Radix Sort using MPI Data types and Communicatives
Design of 45nm Single Port SRAM and Arithmetic Unit using Cadence Fall 2015
 Created a pipelined system of 64 byte 6T-SRAM, Interconnect and 16-bit Carry Look Ahead Adder
 Performed Bit-Cell Analysis, Sense Amplifier offset calculation and timing analysis of a Flip-Flop
 Designed layout of core array, fixed DRC, LVS and extracted using PEX for timing closure
Developed Microprocessor Architectural Simulator using C++ Fall 2015
 Modeled the simulator for classifying different types of Cache Misses
 Designed a Bus Coherence Simulator that implements MI and MESI protocol
 Simulated and classified Coherence Misses using MESI, MOSI, MOESI and MOESIF protocol
Application of Machine Learning in Computer Vision using MATLAB Fall 2015
 Implemented Dalal & Triggs Algorithm for Face Detection using Sliding Window Detector
 Performed local feature matching using Harris Corner Detector and Scale Invariant Feature Transform pipeline
 Performed Scene Recognition with Bags of Words to classify images
Automatic Test Pattern Generation (ATPG) using MATLAB Fall 2015
 Developed a code for Path-Oriented Decision Making (PODEM) for Combinational Circuits
 Developed a code for Deductive Fault Simulator to find test vectors that detect stuck-at-faults
 Implemented a Circuit Simulator Code for Combinational Circuits
Design of a High Secure Data Communication System for Images using MATLAB Spring 2015
 Implemented Steganography to hide secret data by encrypting it to a QR code
 Performed both Non-Adaptive and Adaptive embedding techniques with LSB substitution
 Performed Dual-Integer Wavelet Transform (Haar and 5/3 IWT) for additional security
EXTRA-CURRICULAR ACTIVITIES
 Represented VIT College Basketball Team in various Inter-College and State level festivals
 As a part of VIT Curriculum, was part of the Debate Society, which helped me develop my social skills
 Was a delegate at the India Emerge Youth Summit 2013, a national level youth symposium, which provided
an interactive platform to brainstorm on ideas that could revolutionize and reinvent the future

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Himanshu_Somaiya_Resume

  • 1. HIMANSHU SOMAIYA 935 Marietta Street, Apt. #429, Atlanta, GA 30318 | hsomaiya3@gatech.edu|+1(404)583-1670 EDUCATION Georgia Institute of Technology, Atlanta, Georgia August 2015 – December 2016 Master of Science, Electrical and Computer Engineering CGPA-3.66/4 Vellore Institute of Technology, Vellore, India July 2011 - May 2015 Bachelor of Technology, Electronics and Communications CGPA-9.25/10 TECHNICAL SKILLS Computer Architecture: Caches, predictors, consistency, coherency, Out Of Order Superscalar, prefetches, SMT Circuit Design: MOSFETs, SRAM, BitCell Analysis, Flip-Flops, Registers, Sense Amplifier, Multiplexer, Interconnect, Adder, Decoder, Multiplexers, Layout, Synchronous Timing Analysis CAD Tools: Cadence Virtuoso, HSPICE, Spectre, Calibre (DRC, LVS, PEX), WaveViewer Software: Xilinx Ise, Keil uVision, Proteus, AWR Design Environment Programming Languages: C, C++, MATLAB, Verilog HDL, Perl, HTML Course Work: Physical Design Automation for VLSI Design, CAD VLSI System Design, Parallel & Distributed Computer Architecture, High Performance Computing, Advanced VLSI Systems, Advanced Computer Architecture, Digital Systems Test, Computer Vision PROFESSIONAL EXPERIENCE Mathematics Grader – Georgia Institute of Technology, Atlanta, Georgia January 2016 – current Project Trainee - Tata Communications Limited, Mumbai, India June 2013 - July 2013  Developed a Perl program to download files from the Main Server to the Local Server  Solved problems related to the files getting deleted from the Main Server every three months  Explored Company's Network setup and Protocols used in Submarine Cable Networks PROJECTS Design of FPGA based Hardware to Accelerate Deep Neural Networks Summer 2016  Designed a frame work that automatically generates a synthesizable accelerator for a given DNN and FPGA pair  Developed test-benches for various modules to check its implementation in the architecture design flow  Used Caffe to compare the performance of Lenet and Siamese benchmarks to our hardware Parallel Programming using OpenMP and Message Passing Interface (MPI) using C++ Spring 2016  Solved the N-Queens problem using a Master-Worker paradigm in MPI  Performed serial and parallel versions to calculate images of the Mandelbrot Set at different zoom levels  Implemented parallel and distributed Radix Sort using MPI Data types and Communicatives Design of 45nm Single Port SRAM and Arithmetic Unit using Cadence Fall 2015  Created a pipelined system of 64 byte 6T-SRAM, Interconnect and 16-bit Carry Look Ahead Adder  Performed Bit-Cell Analysis, Sense Amplifier offset calculation and timing analysis of a Flip-Flop  Designed layout of core array, fixed DRC, LVS and extracted using PEX for timing closure Developed Microprocessor Architectural Simulator using C++ Fall 2015  Modeled the simulator for classifying different types of Cache Misses  Designed a Bus Coherence Simulator that implements MI and MESI protocol  Simulated and classified Coherence Misses using MESI, MOSI, MOESI and MOESIF protocol
  • 2. Application of Machine Learning in Computer Vision using MATLAB Fall 2015  Implemented Dalal & Triggs Algorithm for Face Detection using Sliding Window Detector  Performed local feature matching using Harris Corner Detector and Scale Invariant Feature Transform pipeline  Performed Scene Recognition with Bags of Words to classify images Automatic Test Pattern Generation (ATPG) using MATLAB Fall 2015  Developed a code for Path-Oriented Decision Making (PODEM) for Combinational Circuits  Developed a code for Deductive Fault Simulator to find test vectors that detect stuck-at-faults  Implemented a Circuit Simulator Code for Combinational Circuits Design of a High Secure Data Communication System for Images using MATLAB Spring 2015  Implemented Steganography to hide secret data by encrypting it to a QR code  Performed both Non-Adaptive and Adaptive embedding techniques with LSB substitution  Performed Dual-Integer Wavelet Transform (Haar and 5/3 IWT) for additional security EXTRA-CURRICULAR ACTIVITIES  Represented VIT College Basketball Team in various Inter-College and State level festivals  As a part of VIT Curriculum, was part of the Debate Society, which helped me develop my social skills  Was a delegate at the India Emerge Youth Summit 2013, a national level youth symposium, which provided an interactive platform to brainstorm on ideas that could revolutionize and reinvent the future