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Subproject 1
NTHU

Advisor: Professor Ta-Shun Chu

1
Things to Do
• 1. Make the 35GHz Standing-Wave Oscillator
Array as a single Cell.
• 2. Adjust some circuits(?)
– CML → TSPC : To lower the power(?)

• 3. Adjust reference frequency(?)
– 2G, 4G (needed?)
Things to Do
• 4. Co-design the buffer and mixer.
• 5. Redesign 35GHz phase-rotating PLL
– Figure out the reasons for failure.
Subproject 2
NCTU

Advisor: Professor Yu-Jiu Wang

4
目前現有問題
• System方面
1. 散熱要改善
2. Array Pattern 畫不正確 (反射?)
• 單一Channel方面
1. Channel Gain 比預期低
2. Settling Time (散熱? DCOC?)
3. 功耗要下降
相位補償

•
•
•
•

A ∙ cos
A ∙ cos
A ∙ cos
A ∙ cos

𝜔 𝐵𝐵 ∙
𝜔 𝐵𝐵 ∙
𝜔 𝐵𝐵 ∙
𝜔 𝐵𝐵 ∙

𝑡
𝑡 −𝜋 ∙ 𝑠𝑖𝑛𝜑 𝑖 +∆𝜃2
𝑡 −2𝜋 ∙ 𝑠𝑖𝑛𝜑 𝑖 +∆𝜃3
𝑡 −3𝜋 ∙ 𝑠𝑖𝑛𝜑 𝑖 +∆𝜃4
相位補償 - 當反射波存在時
入射角θir

•
•
•
•

A ∙ cos
A ∙ cos
A ∙ cos
A ∙ cos

𝜔 𝐵𝐵 ∙
𝜔 𝐵𝐵 ∙
𝜔 𝐵𝐵 ∙
𝜔 𝐵𝐵 ∙

𝑡
𝑡
𝑡
𝑡

+ B ∙ cos
+ B ∙ cos
+ B ∙ cos
+ 𝐵 ∙ cos

𝜔 𝐵𝐵 ∙
𝜔 𝐵𝐵 ∙
𝜔 𝐵𝐵 ∙
𝜔 𝐵𝐵 ∙

𝑡
𝑡+𝜋(𝑠𝑖𝑛𝜑 𝑖 −𝑠𝑖𝑛𝜑 𝑖𝑟 )
𝑡+2𝜋(𝑠𝑖𝑛𝜑 𝑖 −𝑠𝑖𝑛𝜑 𝑖𝑟 )
𝑡+3𝜋(𝑠𝑖𝑛𝜑 𝑖 −𝑠𝑖𝑛𝜑 𝑖𝑟 )
Future Work
• We will like to figure out what’s causing the array pattern problems.
• It can be multipath due to reflections on our PCB? On the chamber? Etc.
•
• Is there a way, (after we do multiple incident angle, multiple phase-shift, )
that we try to figure out what goes wrong with our basic assumption?
• That is the phase difference between adjacent element are:
• L*Sin(theta)/(Lambda) <- something is wrong for this assumption.
•
• It will be good if we can figure out what goes wrong?
• At the same time to figure out, 1.) how to reduce it in PCB assembly level,
2.) DSP level.

• Yu-Jiu
Subproject 3
NTU

Advisor: Professor Borching Su

9
Reference Antenna

?
=

𝑑1

𝜃1

Case 1: Set antenna 1 as reference

𝑑2

𝜃2

Case 2: Set center as reference
Incident Angle of Transmitter
𝜃2

?
=

𝑑1

𝜃1

Case 1: Change the place of Tx

𝑑2

𝜃2

Case 2: Rotate the Tx
Calibration with Different Incident Angle

𝑑1

𝜃1 =

0°

Case 1: Incident angle = 0°
Acos(wt)+Bsin(wt)

𝑑2
𝜃2

Case 2: Incident angle = 𝜃2
Acos(wt+ 𝜽 𝟐 )+Bsin(wt+ 𝜽 𝟐 )
Beamforming Pattern Before Calibration
• Choose the beamforming codes without the
signal amplitude sorting and the 600 points
selection.
• Choose the beamforming codes with the
signal amplitude sorting but without the 600
points selection(verify the performance of
additivity).
Counter Control
• Modified verilog codes for using a FPGA
button to control the counter of PGA control
codes.
• If any error happens, we don’t have to restart
the counter and measure all data again.
To-do List
• Measure and plot the beamforming pattern
before calibration.
• Do the receiver calibration when the incident
angle of the transmitter is not zero degree.

• Find a appropriate method for the calibration
of the transmitter.

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Radar 20131018

  • 2. Things to Do • 1. Make the 35GHz Standing-Wave Oscillator Array as a single Cell. • 2. Adjust some circuits(?) – CML → TSPC : To lower the power(?) • 3. Adjust reference frequency(?) – 2G, 4G (needed?)
  • 3. Things to Do • 4. Co-design the buffer and mixer. • 5. Redesign 35GHz phase-rotating PLL – Figure out the reasons for failure.
  • 5. 目前現有問題 • System方面 1. 散熱要改善 2. Array Pattern 畫不正確 (反射?) • 單一Channel方面 1. Channel Gain 比預期低 2. Settling Time (散熱? DCOC?) 3. 功耗要下降
  • 6. 相位補償 • • • • A ∙ cos A ∙ cos A ∙ cos A ∙ cos 𝜔 𝐵𝐵 ∙ 𝜔 𝐵𝐵 ∙ 𝜔 𝐵𝐵 ∙ 𝜔 𝐵𝐵 ∙ 𝑡 𝑡 −𝜋 ∙ 𝑠𝑖𝑛𝜑 𝑖 +∆𝜃2 𝑡 −2𝜋 ∙ 𝑠𝑖𝑛𝜑 𝑖 +∆𝜃3 𝑡 −3𝜋 ∙ 𝑠𝑖𝑛𝜑 𝑖 +∆𝜃4
  • 7. 相位補償 - 當反射波存在時 入射角θir • • • • A ∙ cos A ∙ cos A ∙ cos A ∙ cos 𝜔 𝐵𝐵 ∙ 𝜔 𝐵𝐵 ∙ 𝜔 𝐵𝐵 ∙ 𝜔 𝐵𝐵 ∙ 𝑡 𝑡 𝑡 𝑡 + B ∙ cos + B ∙ cos + B ∙ cos + 𝐵 ∙ cos 𝜔 𝐵𝐵 ∙ 𝜔 𝐵𝐵 ∙ 𝜔 𝐵𝐵 ∙ 𝜔 𝐵𝐵 ∙ 𝑡 𝑡+𝜋(𝑠𝑖𝑛𝜑 𝑖 −𝑠𝑖𝑛𝜑 𝑖𝑟 ) 𝑡+2𝜋(𝑠𝑖𝑛𝜑 𝑖 −𝑠𝑖𝑛𝜑 𝑖𝑟 ) 𝑡+3𝜋(𝑠𝑖𝑛𝜑 𝑖 −𝑠𝑖𝑛𝜑 𝑖𝑟 )
  • 8. Future Work • We will like to figure out what’s causing the array pattern problems. • It can be multipath due to reflections on our PCB? On the chamber? Etc. • • Is there a way, (after we do multiple incident angle, multiple phase-shift, ) that we try to figure out what goes wrong with our basic assumption? • That is the phase difference between adjacent element are: • L*Sin(theta)/(Lambda) <- something is wrong for this assumption. • • It will be good if we can figure out what goes wrong? • At the same time to figure out, 1.) how to reduce it in PCB assembly level, 2.) DSP level. • Yu-Jiu
  • 10. Reference Antenna ? = 𝑑1 𝜃1 Case 1: Set antenna 1 as reference 𝑑2 𝜃2 Case 2: Set center as reference
  • 11. Incident Angle of Transmitter 𝜃2 ? = 𝑑1 𝜃1 Case 1: Change the place of Tx 𝑑2 𝜃2 Case 2: Rotate the Tx
  • 12. Calibration with Different Incident Angle 𝑑1 𝜃1 = 0° Case 1: Incident angle = 0° Acos(wt)+Bsin(wt) 𝑑2 𝜃2 Case 2: Incident angle = 𝜃2 Acos(wt+ 𝜽 𝟐 )+Bsin(wt+ 𝜽 𝟐 )
  • 13. Beamforming Pattern Before Calibration • Choose the beamforming codes without the signal amplitude sorting and the 600 points selection. • Choose the beamforming codes with the signal amplitude sorting but without the 600 points selection(verify the performance of additivity).
  • 14. Counter Control • Modified verilog codes for using a FPGA button to control the counter of PGA control codes. • If any error happens, we don’t have to restart the counter and measure all data again.
  • 15. To-do List • Measure and plot the beamforming pattern before calibration. • Do the receiver calibration when the incident angle of the transmitter is not zero degree. • Find a appropriate method for the calibration of the transmitter.