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Control and protection Circuits
Need of protection circuit
• For this purpose we may first know
– What to protect ?
– Why to protect ?
– Possible way of implementation in current design.
– Complexities of the problem
– Easiest solution available with cost consideration
with circuit description.
– Testing result, how it is tested
– Actual result with that of simulation
– Why not the Present protection effective?
FEE boards on Detector
What to protect?
• By past experience we found that due to
any HV spike or any other reason there is
over-current in the FEE board. And due to
over-current FEE-boards are going bad.
• So we have to have a over current
protection circuit to protect our FEE board.
Why to protect?
• As we all know that board going bad means all the
channel associated with that board will be useless. Also
we cant neglect the cost of replacement of boards.
• Also if one FEE board goes bad in a chain then due to
current setting change at LVDB level other board in
chain also goes bad (observation).
• Also if MARC goes bad in present scenario then whole
chain will be gone bad.
Due to these problem we can say that protection of
over current should be done for the protection of the data
as well as cost (In long term). Also we must have a
control circuit to check MARC going bad
How it is to be implemented with
current design ?
Board Level Protection :
• In this method we can have a protection
circuit at board level. In this we have to
modify the design of the Fee board.
• The basic concept of this circuit is :
– We have a current sensor
– A precision resistance
– Electronic switches (in our case it is a MOSFET)
MAX 4373
Differential
Amplifier
Comparator Latch
Rs
G
S
D
MAX
4373 O/P
MOSFET
Rs
3.3V
Rs – Precision Resistance
MOSFET is IRLML 2502
O/P
Basic Circuit
Basic circuit description
• As soon as the current exceeds maximum
permissible limit, the differential amplifier will
amplify the voltage across the sense resistor.
• Then at the max limit the comparator will be
triggered and the output state of the comparator
will be changed
• As soon as the output of the comparator is
latched the switch get tripped and supply is cut
off.
reset reset reset
Full proposed circuit with
different modifications
Latch
Latch Latch
Full proposed circuit with lower
no of components
reset reset reset
Circuit description
• There are three units of basic involved with the
complete circuit.
• The point to be noted is that all the tree unit will
be tripped at the same time for overflow in any of
the circuit (i.e. full power supply is cut down).
• As the TKIN and TKOUT are from the same line
so they are also shorted to make the chain
working the condition of tripping of the board. So
in a twelve board chain all 11 will continue their
usual work.
• Also there is a additional facility to restart the
power supply from the remote point.
Testing conditions
• For testing right now we have used IRF 150
MOS with voltage rating 400V with MAX4373.
• Base voltage as specified for the given MOS is
7V in datasheet so it is tested for 7V base
voltage and on state resistance was .85 Ohm
approx.
• When base voltage was 3-5V the on state
resistance was 4-5 ohms.
• Margin for the current offset with set current
200mA is +/- (1-2)mA.
• Also circuit is tested with +2.5V source to drain
voltage.
Test Results
• The Basic need of tripping the circuit at the over-
current is tested and now we are almost sure
about the functionality of the circuit.
• At low base voltage the circuit functionality is not
up to mark. The resistance was high for 3-4V
base voltage. It’s resistance is following its
characteristics as given in datasheet. At higher
base voltage resistance was .85 Ohms .
• Restart of the circuit externally is done and the
supply can be restarted with ease.
Expected Result
• With the IRLML2502 MOSFET, the on
state resistance will be 140 milli ohms.
• With same MOSFET base voltage
required will be 2V which was 7V earlier.
• Off state resistance will be in mega ohms.
• As there is no use of relay in the circuit so
the circuit response will be much faster as
in case of the older DB circuit with relays.
Complexities of the problem
• Although the circuit is not a big one but the
basic complexities are:
– Redesigning of Back Plane PCB
– Redesigning of Translator Board
– Redesigning of FEE board
– Redesigning of Software for analyzing the
FEE board going bad and also to control it we
may be needing additional lines, which has to
be taken into account, which are to be
handled by software.
Second Prototypes
Cost Estimation
• Cost is behind any building block so it is to be estimated
first.
• We have to increase some 25 components per board so
some assembly cost is to be taken in account.
• Component cost is approx 2.5$ per board. If reduced
scheme is used then it may be reduced upto 2 $ per
board.
• Few counters and other control circuit is to be placed on
the translator board which is around 1$ per translator
board.
• Two layer of the back plane PCB has to be increased so
it’s cost is to be taken in account.
Present Scenario
• Right now we are using LVDB circuit, but it
has to set a margin of current must be
atleast few board current.
• So if one board is going bad then we don’t
have any control or protection for that
overcurrent on single board.
Proposal to take out relays from
present DB’S
• Looking at the data sheets we can now
say that a MOSFET having 12amp current
rating and on state resistance of 200 milli
ohms and less will definitely replace our
relays. Also negligible voltage drop at on
state and also we will have full flexibility of
use in magnetic field. And we can easily
control supply from remote terminal.
Proposal for the control circuit
for STAR with current design
• Looking to the concept developed we can
even introduce protection circuit for the
present STAR boards without change in
present design.
• We can have a board which can be put in
between the supply connectors.
• Although we will be using a extra board
but we can save boards going bad.
Control circuits
• One more important problem is if board didn’t
goes bad and it is to be restarted then what to
do?
• For that we will be using some control circuit on
the Translator board level. This circuit helps you
to restart and control your board from remote
places.
• There are various ways of designing this control
circuit. Few of them are shown in next few
slides
How it is to be implemented with
current design ?
• There are several ways to implement the
Control circuit as :
– We can go for FPGA or CPLD for this purpose
as a control circuit (i.e. TKIN and TKOUT
monitoring)
• This need little modification in the FEE board
design and space problem can be solved.
• This will also give us freedom to make a smart
circuit which can do additional task we want to do
as bridge board control etc.
We will discuss in next slides
Below shown is the possible
implementations
FEE -12
FEE -2
FEE -7
FEE -6
FEE -1
TRANSLATOR
TKOUT
TKIN
FPGA /
CPLD
This is other way of doing same
thing with additional advantages
FEE -12
FEE -2
FEE -7
FEE -6
FEE -1
TRANSLATOR
FPGA /
CPLD
TKOUT
TKIN
Replacement of FPGA with discrete
components
• As our requirements are low and by reducing
some of the flexibility we can go for a discrete
component solution. This is cost effective and
we can manage to make it on translator board
since it is spacious till now. By this we can have
a board level control and protection.
• Scheme is to use two counters and some other
control circuits. This circuit is yet to be tested but
we can rely on the discrete digital circuit for both
output in general environment and in radiation
environment.
Circuit Description
• In this circuit we enable the counter1 to
count as soon as the TKIN is 0 and
TKOUT is 1. Then if we didn’t get TKOUT
in limited time then cut supply signal is
sent back to the board. Also TKIN and
TKOUT is shorted as told earlier. So we
are able to cut the faulty board out of the
circuit.
Proposed control circuit at
Translator board level
• Counter-2 is used to take care of the
communication with the control circuit at
the remote terminal. Counter every time
counts the pulses of the TKIN and TKOUT.
So when the counter-2 has a certain count
and counter1 exceeds certain count
decided by us then particular channel will
set and thus we came to know that which
channel is gone bad.
• There is one provision from outside to
restart the board again.
Need of bridge-board
• When there is no data in some exterior
region then our DSP will be idle for a long
time. So for making full utilization without
hindering the speed of operation we can
increase the no of boards in a chain.
• So if we somehow land up with one less
DSP then we may separate the front panel
with rear panel.
Tested bridge board control
circuit
Circuit description
• In this circuit we are just taking care of the
token in and token out which are control
signal controlling data transfer.
• If we get token in then we transfer it to first
chain and then after receiving token back
from the first chain then circuit will switch
token to second chain.
Other circuit required
• Now after switching we will be needing the
buffer circuit. Need is due to the signal
going bad after 12 boards. If we will make
the chains parallel then also the signal will
go bad and this time the no reduce to 6
only.
• So we have to have a buffer circuit in
atleast one chain.
Conclusion
• So finally the problem of the boards going bad
are to be taken into account and some
protection measure has to be taken.
• The access to the board is always not possible
so there must be some software control so some
control circuit is to be taken in account.
• For faithful data bad boards are to be taken out
of the system.
• Finally we must also consider that what we are
getting and at what cost so bridge board must
also taken care.

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jogender contgrol and protection of power system

  • 2. Need of protection circuit • For this purpose we may first know – What to protect ? – Why to protect ? – Possible way of implementation in current design. – Complexities of the problem – Easiest solution available with cost consideration with circuit description. – Testing result, how it is tested – Actual result with that of simulation – Why not the Present protection effective?
  • 3. FEE boards on Detector
  • 4. What to protect? • By past experience we found that due to any HV spike or any other reason there is over-current in the FEE board. And due to over-current FEE-boards are going bad. • So we have to have a over current protection circuit to protect our FEE board.
  • 5. Why to protect? • As we all know that board going bad means all the channel associated with that board will be useless. Also we cant neglect the cost of replacement of boards. • Also if one FEE board goes bad in a chain then due to current setting change at LVDB level other board in chain also goes bad (observation). • Also if MARC goes bad in present scenario then whole chain will be gone bad. Due to these problem we can say that protection of over current should be done for the protection of the data as well as cost (In long term). Also we must have a control circuit to check MARC going bad
  • 6. How it is to be implemented with current design ? Board Level Protection : • In this method we can have a protection circuit at board level. In this we have to modify the design of the Fee board. • The basic concept of this circuit is : – We have a current sensor – A precision resistance – Electronic switches (in our case it is a MOSFET)
  • 7. MAX 4373 Differential Amplifier Comparator Latch Rs G S D MAX 4373 O/P MOSFET Rs 3.3V Rs – Precision Resistance MOSFET is IRLML 2502 O/P Basic Circuit
  • 8. Basic circuit description • As soon as the current exceeds maximum permissible limit, the differential amplifier will amplify the voltage across the sense resistor. • Then at the max limit the comparator will be triggered and the output state of the comparator will be changed • As soon as the output of the comparator is latched the switch get tripped and supply is cut off.
  • 9. reset reset reset Full proposed circuit with different modifications Latch Latch Latch
  • 10. Full proposed circuit with lower no of components reset reset reset
  • 11. Circuit description • There are three units of basic involved with the complete circuit. • The point to be noted is that all the tree unit will be tripped at the same time for overflow in any of the circuit (i.e. full power supply is cut down). • As the TKIN and TKOUT are from the same line so they are also shorted to make the chain working the condition of tripping of the board. So in a twelve board chain all 11 will continue their usual work. • Also there is a additional facility to restart the power supply from the remote point.
  • 12. Testing conditions • For testing right now we have used IRF 150 MOS with voltage rating 400V with MAX4373. • Base voltage as specified for the given MOS is 7V in datasheet so it is tested for 7V base voltage and on state resistance was .85 Ohm approx. • When base voltage was 3-5V the on state resistance was 4-5 ohms. • Margin for the current offset with set current 200mA is +/- (1-2)mA. • Also circuit is tested with +2.5V source to drain voltage.
  • 13. Test Results • The Basic need of tripping the circuit at the over- current is tested and now we are almost sure about the functionality of the circuit. • At low base voltage the circuit functionality is not up to mark. The resistance was high for 3-4V base voltage. It’s resistance is following its characteristics as given in datasheet. At higher base voltage resistance was .85 Ohms . • Restart of the circuit externally is done and the supply can be restarted with ease.
  • 14. Expected Result • With the IRLML2502 MOSFET, the on state resistance will be 140 milli ohms. • With same MOSFET base voltage required will be 2V which was 7V earlier. • Off state resistance will be in mega ohms. • As there is no use of relay in the circuit so the circuit response will be much faster as in case of the older DB circuit with relays.
  • 15. Complexities of the problem • Although the circuit is not a big one but the basic complexities are: – Redesigning of Back Plane PCB – Redesigning of Translator Board – Redesigning of FEE board – Redesigning of Software for analyzing the FEE board going bad and also to control it we may be needing additional lines, which has to be taken into account, which are to be handled by software.
  • 17. Cost Estimation • Cost is behind any building block so it is to be estimated first. • We have to increase some 25 components per board so some assembly cost is to be taken in account. • Component cost is approx 2.5$ per board. If reduced scheme is used then it may be reduced upto 2 $ per board. • Few counters and other control circuit is to be placed on the translator board which is around 1$ per translator board. • Two layer of the back plane PCB has to be increased so it’s cost is to be taken in account.
  • 18. Present Scenario • Right now we are using LVDB circuit, but it has to set a margin of current must be atleast few board current. • So if one board is going bad then we don’t have any control or protection for that overcurrent on single board.
  • 19. Proposal to take out relays from present DB’S • Looking at the data sheets we can now say that a MOSFET having 12amp current rating and on state resistance of 200 milli ohms and less will definitely replace our relays. Also negligible voltage drop at on state and also we will have full flexibility of use in magnetic field. And we can easily control supply from remote terminal.
  • 20. Proposal for the control circuit for STAR with current design • Looking to the concept developed we can even introduce protection circuit for the present STAR boards without change in present design. • We can have a board which can be put in between the supply connectors. • Although we will be using a extra board but we can save boards going bad.
  • 21. Control circuits • One more important problem is if board didn’t goes bad and it is to be restarted then what to do? • For that we will be using some control circuit on the Translator board level. This circuit helps you to restart and control your board from remote places. • There are various ways of designing this control circuit. Few of them are shown in next few slides
  • 22. How it is to be implemented with current design ? • There are several ways to implement the Control circuit as : – We can go for FPGA or CPLD for this purpose as a control circuit (i.e. TKIN and TKOUT monitoring) • This need little modification in the FEE board design and space problem can be solved. • This will also give us freedom to make a smart circuit which can do additional task we want to do as bridge board control etc. We will discuss in next slides
  • 23. Below shown is the possible implementations FEE -12 FEE -2 FEE -7 FEE -6 FEE -1 TRANSLATOR TKOUT TKIN FPGA / CPLD
  • 24. This is other way of doing same thing with additional advantages FEE -12 FEE -2 FEE -7 FEE -6 FEE -1 TRANSLATOR FPGA / CPLD TKOUT TKIN
  • 25. Replacement of FPGA with discrete components • As our requirements are low and by reducing some of the flexibility we can go for a discrete component solution. This is cost effective and we can manage to make it on translator board since it is spacious till now. By this we can have a board level control and protection. • Scheme is to use two counters and some other control circuits. This circuit is yet to be tested but we can rely on the discrete digital circuit for both output in general environment and in radiation environment.
  • 26. Circuit Description • In this circuit we enable the counter1 to count as soon as the TKIN is 0 and TKOUT is 1. Then if we didn’t get TKOUT in limited time then cut supply signal is sent back to the board. Also TKIN and TKOUT is shorted as told earlier. So we are able to cut the faulty board out of the circuit.
  • 27. Proposed control circuit at Translator board level
  • 28. • Counter-2 is used to take care of the communication with the control circuit at the remote terminal. Counter every time counts the pulses of the TKIN and TKOUT. So when the counter-2 has a certain count and counter1 exceeds certain count decided by us then particular channel will set and thus we came to know that which channel is gone bad. • There is one provision from outside to restart the board again.
  • 29. Need of bridge-board • When there is no data in some exterior region then our DSP will be idle for a long time. So for making full utilization without hindering the speed of operation we can increase the no of boards in a chain. • So if we somehow land up with one less DSP then we may separate the front panel with rear panel.
  • 30. Tested bridge board control circuit
  • 31. Circuit description • In this circuit we are just taking care of the token in and token out which are control signal controlling data transfer. • If we get token in then we transfer it to first chain and then after receiving token back from the first chain then circuit will switch token to second chain.
  • 32. Other circuit required • Now after switching we will be needing the buffer circuit. Need is due to the signal going bad after 12 boards. If we will make the chains parallel then also the signal will go bad and this time the no reduce to 6 only. • So we have to have a buffer circuit in atleast one chain.
  • 33. Conclusion • So finally the problem of the boards going bad are to be taken into account and some protection measure has to be taken. • The access to the board is always not possible so there must be some software control so some control circuit is to be taken in account. • For faithful data bad boards are to be taken out of the system. • Finally we must also consider that what we are getting and at what cost so bridge board must also taken care.