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Voltage-Controlled Oscillator

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- 1. RF Transceiver Module Design Chapter 7 Voltage-Controlled Oscillator 李健榮 助理教授 Department of Electronic Engineering National Taipei University of Technology
- 2. Outline • Resonator • Feedback Loop Analysis • Amplifier Configurations • Capacitor Ration with Copitts Oscillators • Phase Noise and Lesson’s Model • Summary Department of Electronic Engineering, NTUT2/43
- 3. Introduction • An oscillator is a circuit that generates a periodic waveform. • Oscillators are used with applications in which a reference tone is required. In most RF applications, sinusoidal references with a high degree of spectral purity (low phase noise) are required. 90 ( )I t cos ctω ( )Q t Low Noise Amplifier (LNA) Baseband Processor LPF LPF 90 ( )I t cos ctω ( )Q t ( )ms t Power Amplifier (PA) Antenna Baseband Processor Department of Electronic Engineering, NTUT3/43
- 4. LC Resonator • An LC resonator determines the oscillation frequency and often forms part of the feedback mechanism. If i (t) = Ipulsed (is applied to the parallel resonator, the system time response: ( ) 2 2 2 2 1 1 cos 4 t RC pulse out I e v t t C LC R C − = − ⋅ 2 2 1 1 4 osc LC R C ω = − 1 osc LC ω = L C R ( )outv t ( )i t Time Amplitude R → ∞ ( ) ( )pulsedi t I t= Department of Electronic Engineering, NTUT4/43
- 5. Adding Negative Resistance Through Feedback • In any practical circuit, oscillations will die away unless feedback is added to generate a negative resistance in order to sustain the oscillation. L C pR nR− L C sr nr− feedback active device Parallel RLC Resonator Series RLC Resonator feedback active device Department of Electronic Engineering, NTUT5/43
- 6. Feedback System • The oscillator can be seen as a linear feedback system. • The gain of the system: • Barkhausen’s criterion: For sustained oscillation at constant amplitude, the poles must be on the jω axis which states that the open-loop gain around the loop is 1 and the phase around the loop is 0 or some multiple of 2π. • To find the poles of the closed-loop system, one can equate this expression to zero, as in . ( ) ( ) ( ) ( ) ( )1 out in V s G s V s G s H s = − ( ) ( )1 0G s H s− = ( )G s ( )H s ( )outV s( )inV s + + ( ) ( ) 1G j H jω ω = ( ) ( ) 1G j H jω ω = ( ) ( ) 2G j H j nω ω π∠ =and Department of Electronic Engineering, NTUT6/43
- 7. Current Limiting • If the overall resistance is negative, then the oscillation amplitude will continue to grow indefinitely. In a practical circuit, this is, of course, not possible. • Current limiting (power rails, or nonlinearity) eventually limits the oscillating magnitude to some finite value effect of the negative resistance in the circuit until the losses are just canceled, which is equivalent to reducing the loop gain to 1. v growth t limited Department of Electronic Engineering, NTUT7/43
- 8. Implementations of Feedback • Feedback (or −Gm ) is usually provided in one of three ways: Colpitts oscillator: Using a tapped capacitor and amplifier to form a feedback loop Hartley oscillator: Using a tapped inductor and amplifier to form a feedback loop −−−−Gm oscillator: Using two amplifiers in a positive feedback configuration G amplifier G amplifier amplifier G L buffer Department of Electronic Engineering, NTUT8/43
- 9. Amplifier Configuration (Colpitts or –Gm) • The −Gm oscillator has either A CC amplifier made up of Q2 , and Q1 forms feedback A CB amplifier consisting of Q1, and Q2 forms feedback • Colpitts and Hartley oscillators can be made either CB or CC. C L 1Q 2Q 1C 2C L 1Q 1C 2C 1Q L CB Colpitts CC Colpitts−Gm Oscillator CC CB Department of Electronic Engineering, NTUT9/43
- 10. Loop Analysis (I) • Loop analysis gives information about the oscillator : (1) Determine the frequency of oscillation (2) The amount of gain required to start the oscillation 1C 2C L 1Q Common base 2C 1C LpR er ev c m ei g v= At the collector, ( )1 1 1 1 0c e m p v sC v sC g R sL + + − + = At the emitter, 1 2 1 1 0e c e v sC sC v sC r + + − = 1 1 1 1 2 1 1 0 01 m p c e e sC sC g R sL v v sC sC sC r + + − − = − + + Department of Electronic Engineering, NTUT10/43
- 11. Loop Analysis (II) • The conditions for oscillation: where ωconr is the corner frequency of the HPF formed by the capacitive feedback divider. ( )1 1 2 1 1 1 1 1 0m p e sC sC sC sC sC g R sL r + + + + − + = ( )1 23 2 1 1 2 1 1 2 1 0m p e p e e L C C LC L s LC C s LC g s C C R r R r r + + + − + + + + = 1 2 1 2 1 2 1 1 e p C C C C L r R C C L ω + = + p L R Q Lω = ( ) ( ) 2 2 0 0 0 0 1 2 1 2 1 1 1 1 e p p e L conr L L r R C C R r C C Q ω ω ω ω ω ω ω ω ω = + = + = + + + ( )1 2 m L C C g Q ω + = Tells us what value of gm (and corresponding value of re) will result in sustained oscillation. For a real oscillator gm would have to be made larger than this value to overcome any additional losses not properly modeled. Department of Electronic Engineering, NTUT , , and 11/43
- 12. Capacitor Ratios with Colpitts (I) • The capacitive divider (C1 , C2 , and re) affects oscillation frequency and feedback gain, which acts like a HPF. ( ) 1 1 1 2 1 21 1 e e cor c e cor j v j r C C v j r C C C C j ω ω ω ωω ω ′ = = + + + + L pR 1C 2C er ev′ cv Frequency 1 1 2 C C C+ Gain 0A corω 1 0 1 2 C A C C = + ( )1 2 1 cor er C C ω = + 1 tan 2 c π ω φ ω − = − If the frequency of operation is well above the corner frequency ωcor , the gain is given by the capacitor ratio and the phase shift is zero. 90 0 Phase Frequency corω Department of Electronic Engineering, NTUT12/43
- 13. Capacitor Ratios with Colpitts (II) • re is transformed to a higher value through the capacitor divider, which effectively prevents this low impedance from reducing the Q of the LC resonator. • The resulting transformed circuit as seen by the tank 2 2 ,tank 1 1e e C r r C = + L pR 1C 2C ,tanker cv 1 2 1 2 1 T C C LC CLC ω + = = (make C2 large and C1 small to get the maximum effect of the impedance transformation) Department of Electronic Engineering, NTUT13/43
- 14. Negative Resistance • Negative resistance of CB Colpitts oscillator • Input impedance: • A necessary condition for oscillation: This is just a negative resistor in series with the two capacitors. where rs is the equivalent series resistance on the resonator. 2i m e v i g v j C v r π π πω ′ ′ ′+ = + 1 m e g r ≃ 2 ii v j C π ω ′ = 1 i m ce i g v v j C π ω ′+ = 1 2 1 m i ce i g i v i j C j Cω ω = + 2 1 2 1 2 1 1i ce m i i i v v v g Z i i j C j C C C π ω ω ω ′ + = = = + − 2 1 2 m s g r C Cω < ii iv cev vπ ′ er 1C 2C mg vπ ′ + − + − − + Department of Electronic Engineering, NTUT where , , and 14/43
- 15. Negative Resistance for Series/Parallel Circuits • Since the resonance is actually a parallel one, the series components need to be converted back to parallel ones. • However, if the equivalent Q of the RC circuit is high, the parallel capacitor Cp will be approximately equal to the series capacitor Cs , and the above analysis is valid. Even for low Q, these simple equations are useful for quick calculations. 2C 1C LpR er xv m xg v cv sr negR L TC Department of Electronic Engineering, NTUT15/43
- 16. Example • Assume L = 10 nH, Rp = 300 , C1 = 2.5 pF, C2 = 10 pF, and the transistor is operating at 1 mA, or re = 25 and gm = 0.04. Using negative resistance, determine the oscillator resonant frequency and apparent frequency shift. ( |negative resistance| > original resistance, the oscillator should start up successfully) This is a frequency of 1.2353 GHz, which is close to a 10% change in frequency. Further refinement should come from a simulator. 1 1 7.07 Grad/s 10 nH 2 pFTLC ω = = = × 2 pFTC = ( ) 22 1 2 0.04 32 7.07107 Grad/s 2 pF 10 pF m s g r C Cω − = − = = − Ω ⋅ ⋅ 1 1 2.2097 7.07107 Grad/s 32 2 pFs T Q r Cω − = − = = − ⋅ ⋅ ( ) ( )2 2 par 1 32 1 2.2097 188sr r Q= + = − + = − Ω 0 1.1254 GHzf = ( )par 2 2 2 pF 1.66 pF 1 1 1 2.20971 sC C Q = = = ++ par 1 1 7.7615 Grad/s 10 nH 1.66 pFLC ω = = = ⋅ Department of Electronic Engineering, NTUT16/43
- 17. Negative Resistance of −Gm Oscillator • Assume that both transistors are biased identically, then gm1 = gm2 , re1 = re2 , vπ1 = vπ2 , and solve for Zi = vi /ii . • Input impedance: • Necessary condition for oscillation: where Rp is the equivalent parallel resistance of the resonator. 1 1 2 2 1 2 i i m m e e v i g v g v r r π π= − − + 2 i m Z g − = 2 m p g R > ii iv 1 1mg vπ + − 1vπ 2vπ 1er 2er 2 2mg vπ + − + − Department of Electronic Engineering, NTUT17/43
- 18. Minimum Current for Oscillation (I) • Using a 5-nH inductor with Q = 5 and assuming no other loading on the resonator, determine the minimum current required to start the oscillations of 3 GHz if a Colpitts oscillator is used or if a –Gm oscillator is used. To find the minimum current, we find the maximum rneg by taking the derivative with respect to C1. The maximum obtainable negative resistance is achieved when the two capacitors are equal in value, C1 = C2 = 1.1258 pF, and twice the Ctot. ( ) 22 1 1 562.9 fF 2 3 GHz 5 nH tot osc C Lω π = = = ⋅ ⋅ 1 2 1 2 tot C C C C C = + 1 2 1 tot tot C C C C C = − neg 2 2 2 2 1 2 1 1 m m m tot g g g r C C C C Cω ω ω = = − neg 2 2 2 3 1 1 1 2 0m m tot dr g g dC C C Cω ω − = + = 1 2 totC C= Department of Electronic Engineering, NTUT18/43
- 19. Minimum Current for Oscillation (II) Now the loss in the resonator at 3 GHz is due to the finite Q of the inductor. The series resistance of the inductor is Therefore, rneg = rs = 18.85 . Noting that gm = Ic /vT , In −Gm oscillator, there is no capacitor ratio to consider. The parallel resistance of the inductor is A −Gm oscillator can start with half as much collector current in each transistor as a Colpitts oscillator under the same loading conditions. ( )2 3 GHz 5 nH 18.85 5 s L r Q πω ⋅ ⋅ = = = Ω ( ) ( ) 2 22 1 2 neg 2 3 GHz 1.1258 pF 25 mV 18.85 212.2 AC TI C C v rω π µ= = ⋅ ⋅ ⋅ ⋅ Ω = ( )2 3 GHz 5 nH 5=471.2pR LQω π= = ⋅ ⋅ ⋅ Ω m C Tg I v= 2 2 25 mV 471.2 106.1 AC T pI v R µ= = ⋅ Ω = Department of Electronic Engineering, NTUT19/43
- 20. Basic Differential Topologies • Take two single-ended oscillators and place them back to back. 1C 1C CCV 1Q 2Q 2 2C biasV biasI biasI L CCV CCV 1Q 2Q L 1C 1C 2 2C biasI biasI CCV L C 1Q 2Q biasI Copitts CB Copitts CC −Gm Department of Electronic Engineering, NTUT20/43
- 21. Modified CC Colpitts with Buffering • Oscillators are usually buffered (use emitter follower) in order to drive a low impedance. Any load that is a significant fraction of the Rp of the oscillator would lower the output swing and increase the phase noise. • CC oscillator is modified slightly by placing resistors in the collector. The output is then taken from the collector. Since this is a high- impedance node, the resonator is isolated from the load. However, the addition of these resistors will also reduce the headroom available to the oscillator. CCV L 1C 1Q 2Q biasI 1C biasI 2 2C LR LR CCV Department of Electronic Engineering, NTUT21/43
- 22. Several Refinements to the −Gm Topology (I) • Decouple the base from the collector with capacitors to get larger swings. • The bases have to be biased separately. • Rbias have to be made large to prevent loss of signal at the base. However, these resistors can be a substantial source of noise. biasV L C 1Q 2Q biasI biasR CCV biasV biasR cpC cpC Department of Electronic Engineering, NTUT22/43
- 23. Several Refinements to the −Gm Topology (II) Department of Electronic Engineering, NTUT 1Q 2Q pL CCV C sL biasV biasI • Use a transformer to decouple the collectors from the bases. • Since the bias can be applied through the center tap, no need for the RF blocking. • A turns ratio of greater than unity is chosen, there is the added advantage that the swing on the base can be much smaller than the swing on the collector to prevent transistor saturation. 23/43
- 24. Several Refinements to the −Gm Topology (III) • Since the tail resistor is not a high impedance source, the bias current will vary dynamically over the cycle of the oscillation (highest when voltage peaks and lowest during the zero crossings). • Since the oscillator is most sensitive to phase noise during the zero crossings, this oscillator can often give very good phase noise performance.biasV L C 1Q 2Q tailR biasR CCV biasV biasR cpC cpC Department of Electronic Engineering, NTUT Time Amplitude ( )1ci t ( )2ci t AVEI dcI 24/43
- 25. • Using a noise filter in the tail can lead to a very low-noise bias, thus low-phase-noise designs. • Another advantage is that, before startup, the transistor Q3 can be biased in saturation, because during startup the 2nd harmonic will cause a dc bias shift at Q3 collector, pulling it out of saturation and into the active region. • Since 2nd harmonic cannot pass through Ltail, there is no ‘‘ringing’’ at Q3 collector, further reducing its headroom requirement. biasV 檔案中找不到 關聯識別碼 rId7 的圖像部 分。 C 1Q 2Q tailL biasR CCV biasV biasR cpC cpC 3Q tailCbiasV Department of Electronic Engineering, NTUT Several Refinements to the −Gm Topology (IV) 25/43
- 26. The Effect of Parasitics on the Frequency • The first task in designing an oscillator is to set the frequency of oscillation and hence set the value of the total inductance and capacitance in the circuit. • To increase output swing, it is usually desirable to make the inductance as large as possible (this will also make the oscillator less sensitive to parasitic resistance). However, it should be noted that large monolithic inductors suffer from limited Q. In addition, as the capacitors become smaller, their value will be more sensitive to parasitics. Department of Electronic Engineering, NTUT26/43
- 27. Oscillating Frequency Summary 1 2 1 1 2 1 osc C C C C L C C C C π µ π ω ≈ + + + + 1 2 2 1 2 1 osc C C C C L C C C C π µ π ω ≈ + + + + 1 2 2 osc C L C Cπ µ ω ≈ + + 1C 2C L 1Q 1C 2C 1Q L Department of Electronic Engineering, NTUT CB CC −−−−Gm C L 1Q 2Q 27/43
- 28. Oscillator Phase Noise ( )V f f 1f ( )V f f 1f ( )v t t 1 1 f ( )v t t 1 1 f Time Domain Frequency Domain Department of Electronic Engineering, NTUT Jitter Phase noise mf 28/43
- 29. Phase Disturbance Due to Thermal Noise (I) • Modeling the noise with the phasor diagram nP sP sP′ Phase disturbance Amplitude disturbance FkTB avsP Noise-free amplifier f 0f 0 mf f+ 1 Hz1 Hz 1nRMS FkT V R =2nRMS FkT V R = avs avsRMS P V R = The input phase noise in a 1-Hz bandwidth at any frequency from the carrier produces a phase deviation. 0 mf f+ Department of Electronic Engineering, NTUT Phasor Diagram 29/43
- 30. (noise from ) Phase Disturbance Due to Thermal Noise (II) • RMS phase deviation avsavsRMS nRMS peak P FkT V V ==∆ 1 θ avs RMS P FkT 2 1 1 =∆θ avs RMS P FkT 2 1 2 =∆θ 2 2 1 2RMS total RMS RMS avs FkT P θ θ θ∆ = ∆ + ∆ = mω 12 nRMSV 2 avsRMSV peakθ∆ (total phase deviation) ( ) ( )02 cososc avsRMSv t V t tω θ= + ∆ Department of Electronic Engineering, NTUT mf+(noise from ) mf− 30/43
- 31. Lesson’s Phase Noise Model (I) • The spectral density of phase noise : Due to Thermal Noise Consider Flicker Noise (modeled) ( ) 2 m RMS avs FkTB S f P θ θ= ∆ = 1)(BdBm/Hz174 =−=kTB (due to theoretical noise floor of the amplifier) 1)(B1)( = +⋅= m c avs m f f P FkTB fSθ noise floor flicker noise ( )mS fθ Noise-free amplifierPhase modulator avs FkTB P mf ( )mS fθ cf Department of Electronic Engineering, NTUT31/43
- 32. Lesson’s Phase Noise Model (II) • The oscillator may be modeled as an amplifier with feedback ( ) 0 1 2 1 m L m L Q j ω ω ω = + 22 0 B QL = ω ( ) ( )0 1 2 out m in m L m f f j Q ω θ θ ω ∆ = + ⋅∆ ( ) ( ) 2 0 ,2 1 1 2 out m in m m L f S f S f f Q θ θ = + ⋅ ( ), 1 c in m avs m FkTB f S f P f θ = ⋅ + Department of Electronic Engineering, NTUT Noise-free amplifier Phase modulator ( ),in mS fθ Output Feedback θ∆ Resonator Resonator equivalent low-pass ( )in mfθ∆ ( )0 2 in m L m f j Q ω θ ω ⋅∆ ( )out mfθ∆ ( )mL ω 32/43
- 33. Lesson’s Phase Noise Model (III) • Lesson’s phase noise model: ( ) 2 0 2 1 1 1 ( ) 2 2 m in m m L f L f S f f Q θ = + ⋅ ( ), 1 c in m avs m FkTB f S f P f θ = ⋅ + Open-loop Department of Electronic Engineering, NTUT Closed-loop w/ Resonator ( ) 2 2 3 2 2 1 1 1 2 4 2 o c o c m avs m L m l m FkTB f f f f L f P f Q f Q f = + + + Up-convert 1/f noise Thermal FM noise Flicker noise Thermal noise floor 33/43
- 34. Lesson’s Phase Noise Model (IV) Department of Electronic Engineering, NTUT Low-Q oscillator Phase perturbation 1 mf − 3 mf − 2 mf − 0 mf mf mf Resulting phase noise cf cf 0 2f Q High-Q oscillator Phase perturbation 1 mf − 1 mf − 0 mf 3 mf − mf mf Resulting phase noise cf cf0 2f Q 34/43
- 35. Design Example of Phase Noise Limits (I) • A 5-GHz receiver including an onchip phase-locked loop (PLL) is argued to be implemented with the VCO requirements: 1.8V supply, <1 mW DC power, and phase noise performance of −105 dBc/Hz at 100-kHz offset. It is known that, in the technology to be used, the best inductor Q is 15 for a 3-nH device. Assume that capacitors or varactors will have a Q of 50. Assume a −Gm topology will be used: 2 5 GHz 3 nH 15 1413.7pr L LQω π= = ⋅ ⋅ ⋅ = ΩParallel resistance due to the inductor: Required capacitance: ( ) 22 1 1 337.7 fF 2 5 GHz 3 nH tot osc C Lω π = = = ⋅ ⋅ ( ) 50 4712.9 2 5 GHz 337.7 fF p tot Q r C Cω π = = = Ω ⋅ ⋅ Parallel resistance due to the capacitor: Equivalent parallel resistance of the resonator is 1087.5 Current limit: 1.8-V VCC and PDC< 1 mW: 555.5 µA Peak voltage swing: ( )tank 2 2 555.5 A 1087.5 0.384 Vbias pV I R µ π π = = ⋅ Ω = Department of Electronic Engineering, NTUT35/43
- 36. Design Example of Phase Noise Limits (II) Assume all low-frequency upconverted noise is small and active devices add no noise to the circuit (F=1), we can now estimate the phase noise. ( ) ( ) 22 tank 0.384 V 67.8 W 2 2 1087.5 RF p V P R µ= = = Ω 337.7 fF 1087.5 11.53 3 nH tot p C Q R L = = Ω = This is −97.5 dBc/Hz at 100-kHz offset, which is 7.5 dB higher than the promised performance. Thus, the specifications given to the customer are most likely very difficult. This is an example of one of the most important principles in engineering. RF output power: Oscillator Q: ( ) ( ) ( ) 22 2 23 10 3 2 2 1.12 2 5 GHz1 1 1 1.38 10 J/K 298 K 1 Hz 100 kHz 1 1.79 10 2 4 2 2 67.8 W 2 11.53 2 100 kHz o c o c avs m L m l m FkTB f f f f L P f Q f Q f π µ π − − ⋅ ⋅ × ⋅ ⋅ = + + + = ⋅ = × ⋅ ⋅ ⋅ Department of Electronic Engineering, NTUT ~ 0 far from carrier 97.5 dBc Hz@100 kHz offset= − dominant around carrier 36/43
- 37. • VCO is an oscillator of which frequency is controlled by a tuning voltage. • VCO is a simple frequency modulator Voltage Controlled Oscillator (VCO) vcof tuneV tuneV Department of Electronic Engineering, NTUT tuneV ( )oscs t 37/43
- 38. Making the Oscillator Tunable • Varactors in a bipolar process can be realized using either the base-collector or the base-emitter junctions or else using a MOS varactor in BiCMOS processes. CCV CCV LL 1C 1Q 2Q 1C R 1BR 2BR varC varC CB Subs CB Subs Tuning port CCV biasI L varCvarC conR conV 1Q 2Q CCV biasI L varCvarC LR conV 1Q 2Q CCV LR 1C biasI 1C Department of Electronic Engineering, NTUT38/43
- 39. • Frequency Range • Frequency tuning characteristics Tuning sensitivity (Hz/V) : Linearity VCO Sensitivity and Tuning Linearity VK f V= ∆ ∆ vcof tuneV ,0tV 0f maxf minf ,mintV ,maxtV v∆ f∆ Ideal (perfect) Piecewise good Piecewise good Poor Department of Electronic Engineering, NTUT39/43
- 40. Important Figures • Output power (50 Ohm) • Frequency stability: frequency drifting • Source pushing and load pulling figures • Harmonics • Phase noise (or Jitter) Department of Electronic Engineering, NTUT40/43
- 41. • Phase noise • Jitter Cycle jitter Cycle-to-cycle jitter Absolute jitter (long-term jitter, accumulated jitter) of N cycles Phase Noise and Jitter ( ) ( ) ( )1 Hz 10log 10log dBc Hz 2 noise carrier S fP L f P ϕ ∆ ∆ = = cn nT T T∆ = − ( ) 2 1 1 lim N c cn n n T N σ →∞ = = ∆∑ 1ccn n nT T T+∆ = − ( ) 2 1 1 lim N c ccn n n T N σ →∞ = = ∆∑ ( ) ( ) ( ) 1 1 N N abs n cn n n T N T T T = = ∆ = − = ∆∑ ∑ ( ) 2 1 1 lim N c ccn n n T N σ →∞ = = ∆∑ for white noise sources ( ) 0 2 abs cc f T t tσ∆ ∆ = ∆ and 2cc cσ σ= Department of Electronic Engineering, NTUT41/43
- 42. • Relationship between the SSB phase noise and the rms cycle jitter: (Weigandt et al.) • Relationship between the SSB phase noise and the rms cycle jitter: (Herzel and Razavi) • Self-referred jitter and phase noise with white noise: (Demir et al.) Relation of Phase Noise and Jitter ( ) ( ) 3 2 0 2 cf L f f σ ∆ = ∆ ( ) ( ) ( ) ( ) 3 2 0 22 3 4 0 4 8 cc cc L ω π σ ω ω ω π σ ∆ = ∆ + ( ) ( ) 2 0 2 2 4 2 0 f c L f f f cπ ∆ = ∆ + ( )2 t t cσ ∆ = ∆ ⋅ 20 2 cc f c σ= Department of Electronic Engineering, NTUT where and 42/43
- 43. Summary • In this chapter, few kinds of popular oscillator topologies were introduced. The CB and CC configurations are good for high frequency operation while the CE is good for high power application and has good buffering characteristics. • The active device is configured as feedback loop to provide a negative resistance for resonator. • For a voltage-controlled frequency application, an oscillator is usually designed with variable capacitors, or varactors, to provide frequency-tuning capability. • Lesson’s phase noise model gives an intuitive way to understand the behavior of the phase noise generated from the oscillator. Department of Electronic Engineering, NTUT43/43

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