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JFET
SMALL SIGNAL MODEL
Due to the non-linear operation
of the device, the input signal
applied can introduce amplitude
distortion at the output, if the
signal is of larger amplitude.
Hence, to maintain the response
of the amplifier as linear, the
applied input signal must be small
enough, and such operation is
called as “small signal” operation.
INTRODUCTION
• Shockley’s equation:
• The change in drain current that will result from a
change in gate-to-source voltage can be determined using
the transconductance factor (gm) in the following manner:
• The prefix ‘trans’ in the terminology applied to gm
reveals that it establishes a relationship between an
output and an input quantity (g=conductance, m=mutual).
Graphical Determination of gm
• gm is the slope of the characteristics at the point of operation.
• The slope, and therefore, gm increase
as we progress from VP to IDSS .
• As VGS approaches 0 V,
the magnitude of gm increases.
Ex:1) Determine the magnitude of gm for a JFET with
IDSS = 8 mA and VP = -4V, at the following dc bias points:
a) VGS = -0.5 V, b) VGS = -1.5 V, c) VGS = -2.5 V.
Mathematical Definition of gm
• The derivative of a function at a point is equal to the slope of
the tangent line drawn at that point.
• Plugging in VGS = 0 V into the above equation, we get the
maximum value for gm:
where the added subscript “0” indicates the value of gm when VGS = 0 V.
• In equation form,
where ‘f’ signifies forward transfer conductance and ‘s’ indicates that it is
connected to the source terminal. For JFET, gfs ranges from 1 mS to 5 mS.
Ex:2) For the JFET having the transfer characteristics
of Ex:1, a) find the maximum value of gm, b) the value
of gm at each operating point.
Plotting of VGS versus gm
• The factor [1-(VGS/VP)] is less than
unity for any value of VGS other than 0 V.
• This means that the magnitude of gm
will decrease as VGS approaches VP.
• The maximum value of gm occurs
where VGS = 0 V and the minimum
value at VGS = VP. The more negative the
value of VGS, the less the value of gm.
Plot of VGS versus gm
For the previous example:
Effect of ID on gm
• Shockley’s equation can be written in the following form :
• Substituting into the equation of gm, we get -
• gm can be determined for a few specific values of ID :
Plot of ID versus gm
The highest values of gm are obtained when
VGS approaches 0 V and ID approaches IDSS.
JFET Input Impedance (Zi)
• The input impedance of JFETs is sufficiently large, typically
above 1 GΩ. Hence, for all practical purposes, it can be
assumed that the input terminals approximate an open
circuit. Thus, in equation form,
JFET Output Impedance (Zo)
• The output admittance is indicated as “gos”or “yos”, with the
unit of µS. The typical values range between 10 μS to 50 μS.
The subscript “o” signifies output network parameter, and “s”
signifies the terminal source in the model. Therefore, output
impedance in the equation form is,
• On the characteristic curves, the output impedance is the slope
of the curve at the point of operation. The more horizontal the
curve, the greater is Zo. In the equation form,
The value of rd is
different for each
value of VGS, and
hence, rd changes
from one operating
region to the other.
• Largest value of rd
occurs for the least
value of VGS, and
hence, the smallest
value of rd occurs
when VGS = 0 V.
JFET AC Equivalent Circuit
• The input impedance is represented by the open circuit at
the input terminals, and the output impedance is
represented by the resistor “rd” from drain to source.
• At the output, the control of Id by Vgs is included as a current
source (gm.Vgs) connected from drain to source.
• The current source has its arrow pointing from drain to
source, to indicate a 180° phase shift between output and
input signals, in the common source configuration.
1. FIXED-BIAS CONFIGURATION
• C1 and C2 isolate the dc biasing arrangement from the
applied signal and the load, and they act as short circuit
equivalents for the ac analysis.
• When the values of gm & rd are determined from either the
dc biasing arrangement or the specification sheet or the
characteristic curves, the ac equivalent model of the circuit
can be substituted between the appropriate terminals.
Ex:3) The following circuit has an operating point
defined by: VGSQ= -2 V, IDQ = 5.625 mA and yos = 40 μS.
Find Zi, Zo and Av.
gm0 = (2X10m) / 8 = 2.5 mS.
gm = 2.5m (1-(2/8)) = 1.875 mS.
rd = 1/40μ = 25 kΩ.
Zi = 1 MΩ.
Zo = (25 k) ll (2 k) = 1.85 kΩ.
Av = -1.875 m X 1.85 k = -3.47.
Note: The ac analysis of self-biased JFET amplifier, with bypass
capacitor, is same as that of fixed-bias circuit.
2. VOLTAGE-DIVIDER BIAS CONFIGURATION
OF MODULE 2

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Analog Electronic Circuits - Module 2.3

  • 1. JFET SMALL SIGNAL MODEL Due to the non-linear operation of the device, the input signal applied can introduce amplitude distortion at the output, if the signal is of larger amplitude. Hence, to maintain the response of the amplifier as linear, the applied input signal must be small enough, and such operation is called as “small signal” operation.
  • 2. INTRODUCTION • Shockley’s equation: • The change in drain current that will result from a change in gate-to-source voltage can be determined using the transconductance factor (gm) in the following manner: • The prefix ‘trans’ in the terminology applied to gm reveals that it establishes a relationship between an output and an input quantity (g=conductance, m=mutual).
  • 3. Graphical Determination of gm • gm is the slope of the characteristics at the point of operation. • The slope, and therefore, gm increase as we progress from VP to IDSS . • As VGS approaches 0 V, the magnitude of gm increases.
  • 4. Ex:1) Determine the magnitude of gm for a JFET with IDSS = 8 mA and VP = -4V, at the following dc bias points: a) VGS = -0.5 V, b) VGS = -1.5 V, c) VGS = -2.5 V.
  • 5. Mathematical Definition of gm • The derivative of a function at a point is equal to the slope of the tangent line drawn at that point.
  • 6. • Plugging in VGS = 0 V into the above equation, we get the maximum value for gm: where the added subscript “0” indicates the value of gm when VGS = 0 V. • In equation form, where ‘f’ signifies forward transfer conductance and ‘s’ indicates that it is connected to the source terminal. For JFET, gfs ranges from 1 mS to 5 mS.
  • 7. Ex:2) For the JFET having the transfer characteristics of Ex:1, a) find the maximum value of gm, b) the value of gm at each operating point.
  • 8. Plotting of VGS versus gm • The factor [1-(VGS/VP)] is less than unity for any value of VGS other than 0 V. • This means that the magnitude of gm will decrease as VGS approaches VP. • The maximum value of gm occurs where VGS = 0 V and the minimum value at VGS = VP. The more negative the value of VGS, the less the value of gm. Plot of VGS versus gm For the previous example:
  • 9. Effect of ID on gm • Shockley’s equation can be written in the following form : • Substituting into the equation of gm, we get - • gm can be determined for a few specific values of ID :
  • 10. Plot of ID versus gm The highest values of gm are obtained when VGS approaches 0 V and ID approaches IDSS.
  • 11. JFET Input Impedance (Zi) • The input impedance of JFETs is sufficiently large, typically above 1 GΩ. Hence, for all practical purposes, it can be assumed that the input terminals approximate an open circuit. Thus, in equation form, JFET Output Impedance (Zo) • The output admittance is indicated as “gos”or “yos”, with the unit of µS. The typical values range between 10 μS to 50 μS. The subscript “o” signifies output network parameter, and “s” signifies the terminal source in the model. Therefore, output impedance in the equation form is,
  • 12. • On the characteristic curves, the output impedance is the slope of the curve at the point of operation. The more horizontal the curve, the greater is Zo. In the equation form, The value of rd is different for each value of VGS, and hence, rd changes from one operating region to the other. • Largest value of rd occurs for the least value of VGS, and hence, the smallest value of rd occurs when VGS = 0 V.
  • 13. JFET AC Equivalent Circuit • The input impedance is represented by the open circuit at the input terminals, and the output impedance is represented by the resistor “rd” from drain to source. • At the output, the control of Id by Vgs is included as a current source (gm.Vgs) connected from drain to source. • The current source has its arrow pointing from drain to source, to indicate a 180° phase shift between output and input signals, in the common source configuration.
  • 14. 1. FIXED-BIAS CONFIGURATION • C1 and C2 isolate the dc biasing arrangement from the applied signal and the load, and they act as short circuit equivalents for the ac analysis. • When the values of gm & rd are determined from either the dc biasing arrangement or the specification sheet or the characteristic curves, the ac equivalent model of the circuit can be substituted between the appropriate terminals.
  • 15.
  • 16. Ex:3) The following circuit has an operating point defined by: VGSQ= -2 V, IDQ = 5.625 mA and yos = 40 μS. Find Zi, Zo and Av. gm0 = (2X10m) / 8 = 2.5 mS. gm = 2.5m (1-(2/8)) = 1.875 mS. rd = 1/40μ = 25 kΩ. Zi = 1 MΩ. Zo = (25 k) ll (2 k) = 1.85 kΩ. Av = -1.875 m X 1.85 k = -3.47. Note: The ac analysis of self-biased JFET amplifier, with bypass capacitor, is same as that of fixed-bias circuit.
  • 17. 2. VOLTAGE-DIVIDER BIAS CONFIGURATION