Introduction to CMOS Inverter

1. Introduction to CMOS Inverter
Dr. Varun Kumar
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2. Outlines
1 Basic Idea of CMOS Inverter
2 Switch Model of Inverter
3 Voltage Transfer Characteristics
4 Switching Threshold
5 Noise Margin
6 Gain Calculation
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3. Introduction to CMOS Inverter
⇒ CMOS is the building block of complex digital circuitry.
⇒ With the help of CMOS and its derivative
⇒ Gate (AND, OR, NOR, NAND, XOR) can be designed
⇒ With the help of Gate, complex digital circuitry can be made like
Adder
Multiplier
Simple to complex processor etc
⇒ Design metrics for making Gate.
(a) Cost → F(complexity, area)
(b) Integrity and robustness → F (steady-state behavior)
(c) Performance → F(dynamic or transient response)
(d) Energy efficiency Energy and power consumption
⇒ Static CMOS inverter
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4. Introduction to Switch Model of CMOS Inverter
⇒ The transistor is nothing more than a switch with an infinite
off-resistance (VGS VT ), and a finite on-resistance (VGS VT ).
Important properties of static CMOS
⇒ In static CMOS the voltage swing is equal to the supply voltage (high
levels = VDD, Low level= GND) This results in high noise margins.
⇒ The logic levels are not dependent upon the relative device sizes.
Ratioless logic design → Device dimension→ No restriction
Ratioed logic design → Device dimension→ Imposing restriction
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5. Continued–
⇒ Low output impedance → Less prone to noise
⇒ The input resistance of the CMOS inverter is extremely high.
The gate of an MOS transistor is virtually a perfect insulator and draws
no dc input current.
A single inverter can theoretically drive an infinite number of gates (or
have an infinite fan-out).
⇒ Increasing the fan-out also increases the propagation delay
Fan-out does not have any effect on the steady-state behavior, it
degrades the transient response.
⇒ No direct path exists between the supply and ground rails under
steady-state operating conditions.
The absence of current flow (ignoring leakage currents) means that the
gate does not consume any static power.
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6. Voltage Transfer Characteristics
CMOS VTC can be achieved by superimposing of drain current of NMOS
and PMOS onto a common co-ordinate plot. Assume VDD = 2.5V
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7. Continued–
Figure: Load curves for NMOS and PMOS transistors of the static CMOS inverter
(VDD = 2.5 V). The dots represent the dc operation points for various input
voltages.
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8. Continued–
Figure: VTC of static CMOS inverter (VDD = 2.5 V). For each operation region,
the modes of the transistors are annotated off, resistive, or saturated.
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