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Department of Electrical and Electronics Engineering
SRMIST, Kattankulathur
1
WELCOMES
NBA EXPERT COMMITTEE
Presented by Dr.K.Vijayakumar. HOD/EEE
PROGRAMMES OFFERED
• B.Tech - Electrical and Electronics Engineering
• M.Tech - Power Electronics & Drives
- Power Systems
• Ph.D. Program in Electrical Engineering
Department of EEE – A Glance
Faculty Members
70 Faculty Members
71% with PhD
2 with Post Doc
5 Adjunct Faculty Members
Students
853 UG students
26 PG students
125 PhD Scholars
FT: 56
Laboratories
14 Laboratories - UG
4 Industry Supported Laboratories -
Renewable Energy Research Lab
NI academy and research centre
e- Mobility Research centre
Wireless power Transfer Lab
Department Library
Books : 2173
e-Journals : 2712
dSpace Institutional Repository:
(Question banks, UG/PG/PhD
Thesis)
PT: 55
SFR: 1:18
B.Tech
2003
B.Tech
EEE
2001
B.Tech
EEE
1992
Anna University
Madras University SRMIST
The Skill and Personality Development Program
Centre (SPDC) is funded by AICTE under the
Scheme of Quality Improvement Scheme (AQIS)-
Rs. 19,05,166/-
Accreditation
B.Tech EEE Program Accredited by Engineering
Accreditation Commission (EAC) of Accreditation
Board of Engineering and Technology (ABET)
NBA 2001
Award
AICTE- CII Award (2019)
Energy Audit & Awareness
• Energy audit conducted with
Bureau of Energy Efficiency
• Energy Literacy drive-Energy
Swaraj Foundation
Funded Projects
Funding from external agency:
Rs. 1,53,47,662/
Funding from SRM:
Rs. 27,96,259/-
Faculty Industry Immersion
Programme
Number of Industries: 8
No of Faculty Members: 18
Man-days : 227
Publications and Patents
Publications : 484
Citation: 5292
Average Impact Factor: 2.79
Patents Published: 29
Department Achievements /Recognitions
Paper publication award-
IEEE Transaction
Post-Doctoral Research Fellow
.
Gandhi Global Solar Yatra-
1000 Students in Solar
Ambassador Workshop
.
NPTEL Online course-Elite
with Silver medal
1
2 3
4
Faculty Achievements/Recognitions
Rubik's club-
SRMIST India
Book of Records
Mr. Ajith Raj
MTS Under Graduate
Scholarship for 3000 USD
6 students received
scholarship (14, 500 USD)
First place
Mathworks
Minidrone
Competition at
IROS 2019,
China
Mr.Anirudh Ravi
MTS outstanding
student section
award -2019
Mr. Atulya
Kreator 3D Ventilator for
Covid Patients-SIIC
Mr. Shafuel Wara
NASA Human Exploration
Rover Challenge 2018, USA -
Won First prize
Student Achievements/Recognitions
Vision, Mission and its Consistency
Consistency of Mission
Institute Mission Department Mission
MOVE UP through international alliances and
collaborative initiatives to achieve global
excellence.
To educate the student to become better practicing
engineers to meet global excellence
ACCOMPLISH A PROCESS to advance
knowledge in a rigorous academic and research
environment
To provide better environment through latest
developments in electrical engineering involving
problem solving, design, practice and training.
ATTRACTS AND BUILD PEOPLE in a
rewarding and inspiring environment by
fostering freedom, empowerment, creativity and
innovation.
To motivate the graduates to become a good leader,
designer and researcher through industry-oriented
trainings with social and ethical responsibilities
Consistency of Vision
Institute Vision Department Vision
To emerge as a world – class university To impart quality education in the
field of Electrical & Electronics
Engineering
To disseminate knowledge and
providing students a unique learning
experience in Science, Technology,
Medicine, Management and other areas
of scholarship that will best serve the
world and betterment of mankind.
To produce globally competent
engineers to serve the society.
Vision
To impart quality education in the field of Electrical and Electronics
Engineering and to produce globally competent engineers to serve the
society
Mission
1. To educate the student to become better practicing engineers to meet global
excellence.
2.To provide better environment through latest developments in electrical
engineering involving problem solving, design, practice and training.
3.To motivate the graduates to become a good leader, designer and researcher
through industry-oriented trainings with social and ethical responsibilities.
CRITERION 1
Department
level
Social Media
Facebook
Faculty/Class/
Lab/ Office
Rooms/Notice
board
Brochure
Dissemination of Vision, Mission and PEOs
Program Educational Objectives( PEOs)
PEO1-Graduates are in a position to apply their knowledge acquired in Mathematics, Basic Sciences and Electrical and Electronics
Engineering courses, to the solution of complex problems encountered in the modern Engineering practice.
PEO2-Graduates learn and adapt themselves to the constantly evolving technology by pursuing higher studies.
PEO3-Graduates are better employable and achieve success in their chosen areas of Electrical and Electronics Engineering and related fields.
PEO4-Graduates are good leaders and managers by effectively communicating at both technical and interpersonal levels.
Institute
Brochure
Institute
Digital
Board
Induction
Programme Curriculum
Institute
Website
Institute
Level
CRITERION 1
8
Process for Defining Vision, Mission and PEOs
Vision and Mission PEOs
CRITERION 1
Consistency of PEOs with Mission
PEOs
Mission
1
Mission
2
Mission
3
Consistency
PEO1: Graduates are in a position to apply
their knowledge acquired in Mathematics,
Basic Sciences and Electrical and Electronics
Engineering courses, to the solution of
complex problems encountered in the modern
Engineering practice.
H
(3)
M
(2)
L
(1)
1. Students apply their knowledge of basic mathematical and science to solve complex
electrical problems.
2.The syllabus is constantly upgraded to be on par with global excellence which caters
to latest trends in engineering technology and practices.
3.The industrial collaboration in practical technical training elevates the students to
global standards
PEO 2: Graduates learn and adapt themselves
to the constantly evolving technology by
pursuing higher studies. M
(2)
H
(3)
L
(1)
1 Students are exposed to state-of-the-art technology through multi-disciplinary design
projects, technical seminar and industrial training, which supplements in complex
problem solving & design through meticulous practice & training.
2.Students apply the skills and knowledge acquired through these practices in minor &
major projects.
3.The research problem dealt in major projects motivates the students to pursue higher
studies in their respective domain.
PEO3: Graduates are better employable and
achieve success in their chosen areas of
Electrical and Electronics Engineering and
related fields.
M
(2)
M
(2)
L
(1)
1.Knowledge obtained on collaboration with industry through technical seminars,
workshops, laboratory practices, technical internships etc refines the students, thus
empowering them to be employable in core industries in Electrical & Electronics.
2.Software programming skills & hardware development done in major and minor
projects equips the students in the field of Research & Development.
PEO 4: Graduates are good leaders and
managers by effectively communicating at
both technical and interpersonal levels.
L
(1)
L
(1)
H
(3)
1. Communication & interpersonal skills of the students are continuously groomed
through laboratory practices, seminar and project presentations.
2.Active participation and organizing technical and non technical events of Students
equip them to manage and lead organisations in the future.
3.Life skill courses in the curriculum imparts the students the knowledge of ethical
responsibilities. 9
CRITERION 1
10
PEO
Mission
Statement
Mapping Level Justification
PEO1
Mission 1 3 Mapped strongly as all the students gain knowledge on mathematics, basic sciences and electrical engineering
courses which are periodically upgraded to be on par with global standards
Mission 2 2 Mapped moderately as the students gain the ability to design, solve and practice complex engineering problems
through latest developments
Mission 3 1 Mapped as the students collaborate with industries for practical training which makes them a good researcher,
leader and designer
PEO2
Mission 1 2 Mapped moderately as the students learn and adapt themselves to the evolving technologies and practice the
same to meet global standards
Mission 2 3 Mapped strongly as all the students learn and adapt themselves to latest technologies through higher studies
Mission 3 1 Mapped as the students collaborate with industries, adapt the new technologies practiced in industries for
becoming a good researcher
PEO3
Mission 1 2 Mapped moderately as the students practice discipline related concepts for successful employment in global
standard
Mission 2 2 Mapped moderately as the students are provided with better environment employing latest technologies to fetch
better employment and get success
Mission 3 1 Mapped as the students are motivated to take up industry oriented training to get better successful employment
by becoming good designer and researcher
PEO4
Mission 1 1 Mapped as the students practice engineering concepts and communicate the same at both technical and
interpersonal levels to meet global standards
Mission 2 1 Mapped as the students are provided with latest technology based environment so as to enable them in
designing and communicating the same at both technical and interpersonal levels
Mission 3 3 Mapped strongly as all the students intend to take up industry oriented training to become a good leader,
researcher and manager with social and ethical responsibilities by effectively communicating at both technical
and interpersonal levels
Justification of Mapping of PEOs and Mission CRITERION 1
11
Structure of the Curriculum
Category
AICTE 2015 2018
Credits % Credits Credits % Credits Credits %Credits
Humanities and social Sciences
including Management
12 7.5 15 8.33 12 7.5
Basic Sciences 25 15.5 39 21.6 36 22.5
Engineering Sciences including
workshop ,drawing, basics of
electrical/mechanical/computer etc.,
24 15 15 8.33 16 10
Professional core subjects 48 30 87 48.33 54 33.75
Professional subjects: Subjects
relevant to chosen
specialisation/branch
18 11.3 18 10 18 11.25
Open subjects: Electives from other
technical and/or emerging subjects
18 11.3 6 3.33 9 5.63
Project work, seminar and internship
in industry or elsewhere
15 9.4 18 10 15 9.38
Mandatory courses (Environmental
sciences, Induction Program, Indian
Constitution, Essence of Indian
Traditional Knowledge)
Non
credit
- - - - -
Total credits 160 180 160
Components of the Curriculum (2015 and 2018) in Compliance with AICTE
Process for designing the program curriculum
CRITERION 2
12
Compliance of the Curriculum for
attaining PO and PSO
CRITERION 2
13
Adherence-
Academic
Calendar
Academic Calendar
Slot based time table
Learning
through
Industries
Industrial Training
Industrial visit
Internship
Pedagogical
Initiatives
ICT based learning
Moodle based LMS
Google Class Room
Invited Lectures
Massive Open Online
Courses
Collaborative
Learning
Multidisciplinary
Design
Club-Association
Activity
Conduct of
Lab Courses
Experiments,
Record, Viva,
Model Exam,
University Practical
Exam
Project based
Learning
Major Project
Minor Project
Seminar
Monitoring
System
Students monitoring
Green Book
Faculty monitoring
Feedback system
HOD monitoring
Teaching Learning Process CRITERION 2
Flipped Classroom
Academic Calendar
Club-Association Activity
Industrial Training Moodle based LMS
Video Lectures
Green Book
Quality Improvement-Student Performance
14
.
Support to the
high performers
Semester Abroad
Programme Merit Scholarship Placement training Gate coaching
Workshops/
Conference/
Competitions
Club & Societal
activities
Support to Low Performers
Support to High Performers
Support to the low
performers
Counselling (Course
wise, Counsellors)
Student adoptive
scheme (or)
Special coaching
classes
Compensatory
classes Letter to parents Assignments
CRITERION 2
15
Process for internal semester question
paper setting
Quality of Assignments and its relevance to COs and
POs (Samples)
Process for Internal Semester Question Paper
Setting and Quality of Assignments
CRITERION 2
16
Best Project Attributes Average Project Attributes
• Design and hardware
implementation
• Paper/patent
communicated
• Compliance with POs
• Impact towards social
relevance
• Awards/Recognitions
• Lack of Design
• Partial compliance of
POs
• Partial compliance of
objectives
Quality of Completed Projects CRITERION 2
Industry Interaction
Industrial visit
Academic year Number
2017-18 06
2018-19 03
Alumni Talk
Academic year
2017-18
Number
06
Industrial Training 2018-19 06
Academic year Student strength No of Industries 2019-20 33
2017-18 446 230 Guest lecture
2018-19 450 222 2019-20 08
2019-20 280 95
Number of industries: 36
INDUSTRIES
ABB India Ltd
L&T Technology
Services Ltd
Alstom National Instruments
Aricent
Technologies
Nelcast Limited
Armstrong Fluid
Technologies
NIWE
KPIT
Valeo India Private
Limited
CRITERION 2
Industry supported Labs
NI supported Lab
Texas supported Lab
Zigzag Wallvision Lab
17
Impact Analysis of Industries
Register Number Internship Details Placement Details
RA1611005010041 Reliance Industries Limited
(1/6/2019 – 31/7/2019)
Reliance Industries Limited
offer dated 15/1/2021
RA1611005010266 Reliance Industries Limited
(1/6/2019 – 31/7/2019)
Reliance Industries Limited
offer dated 28/8/2019
RA1611005010294 Cue Learn Private Limited
(16/3/2020 – 11/9/2020)
Cue Learn Private Limited
offer dated 8/9/2020
Industry
Supported
Laboratory
Setup
Faculty Industry
Immersion
Program
Industry
collaboration in
Publications
Placement
by Alumni
IMPACT
ANALYSIS
Impact Analysis of Industrial Training
Impact Analysis of Industry Interaction
CRITERION 2
18
PROGRAM OUTCOMES
PO1: Engineering Knowledge
PO2: ProblemAnalysis
PO3: Design/Development of Solutions
PO4: Conduct Investigations of Complex Problems
PO5: Modern Tool Usage
PO6: The Engineer and Society
PO7: Environment and Sustainability
PO8: Ethics
PO9: Individual and Team Work
PO10: Communication
PO11: Project Management and Finance
PO12: Life-long Learning
PROGRAM SPECIFIC OUTCOMES
PSO1: Ability to Perform in a Global & Industrial
Perspective
PSO2: Ability to acquire Skills and are Career ready
PSO3: Ability to Utilize Energy, Safety and Practices
Course Outcomes, Program Outcomes &
Program Specific Outcomes
CRITERION 3
19
CO Assessment Process
CO – PO MAPPING IN SYLLABUS
15EE206 Digital System Design
Course
Code
Course
Outcome
(CO)
PO1
PO2
PO3
PO4
PO5
PO6
PO7
PO8
PO9
PO10
PO11
PO12
PSO1
PSO2
PSO3
15EE206
CO1 3 - - - - - - - - - - - 1 - -
CO2 3 2 2 - - 1 1 - - - - - 1 - -
CO3 3 - - - 1 1 1 - - - - - - 2 -
Average 3 2 2 - 1 1 1 - - - - - 1 2 -
COURSE ARTICULATION MATRIX
PROGRAM ARTICULATION MATRIX
Wi = Σ (COj) /No of Mapped COs (i=1 to15 and j= 1 to Max CO)
(where, Wi is the Weight Factor for POs & PSOs)
Course
Code
PO1
PO2
PO3
PO4
PO5
PO6
PO7
PO8
PO9
PO10
PO11
PO12
PSO1
PSO2
PSO3
15EE206
3 2 2 - 1 1 1 - - - - - 1 2 -
CRITERION 3
20
15EE206 Digital System Design
Course Code Course Outcome (CO)
PO1
PO2
PO3
PO4
PO5
PO6
PO7
PO8
PO9
PO10
PO11
PO12
PSO1
PSO2
PSO3
15EE206
15EE206.1 3 - - - - - - - - - - - 1 - -
15EE206.2 3 2 2 - - 1 1 - - - - - 1 - -
15EE206.3 3 - - - 1 1 1 - - - - - - 2 -
15EE206
CO
1
PO
1
3
Mapped strongly as all the students acquire knowledge on digital logic
circuits
CO2
PO
1
3
Mapped substantially as all the students gain knowledge on combinational
and sequential logic circuits
PO
2
2
Mapped moderately as all the students gain ability to solve and formulate
combinational and sequential logic circuits
PO
3
2
Mapped moderately as all the students gain ability to design
combinational and sequential logic circuits
PO
6
1
Mapped as students obtain the impact of implementation of combinational
and sequential logic circuits in practical uses.
PO
7
1
Mapped as the students understand the impact of combinational and
sequential logic circuits in Engineering practice.
CO3
PO
1
3
Mapped substantially as all the students gain knowledge on the concepts
of memory devices and VHDL
PO
5
1 Mapped as students implement modern tools for memory devices
PO
6
1
Mapped as the students understand the implementation of memory devices
in Engineering practice.
PO
7
1
Mapped as the students understand the impact of digital solution for the
ever-changing environment
CO-PSO JUSTIFICATION
CO-PO JUSTIFICATION
15EE206
CO1
PSO1
1
Mapped as all the students
understand the implementation of
digital logic circuits in industry and
practical applications.
CO2
PSO1
1
Mapped as all the students gain
knowledge on combinational and
sequential logic circuits in applied
Engineering sectors.
CO3
PSO2
1
Mapped as all the students gain
knowledge on memory devices in
applied Engineering sectors.
CO Assessment Process
CO-PO/PSO Mapping Justification
CRITERION 3
21
22
CO Assessment Process
Assessment Tools for Course Outcomes
CRITERION 3
CO Assessment Process
CO Marks Computation & Attainment Level
Calculation of CO marks for all COs for all students in the respective class is based on the course evaluation plan.
CO Marks = Σ{(Marks Obtained/Maximum Marks) * (Weightage of respective CO)}
Calculate the % of students who scored greater than or equal to set target mark for internal assessment
% of students = {(Number of students scored greater than or equal to set target mark /Total number of students)*100}
where,
To calculate the numerator, the below equation is used
Students scored greater CO Marks Obtained/respective total CO value * 100
than or equal to set target mark = from the course evaluation plan
>= Set target
SAMPLE CO MARKS CALCULATION SHEET CO ATTAINMENT LEVEL DEFINITION
The attainment level for each CO is calculated as
Level 0: 0 < = % of stud attained target marks <= 59
Level 1: 60 <= %of stud attained target marks <=69
Level 2: 70 <= %of stud attained target marks <=79
Level 3: 80 <= %of stud attained target marks <=100
CRITERION 3
23
24
Faculty Assignment by the
Department
Course Coordinator Subject Faculty
Teaching-
Learning Process
Course Committee Meeting
(Start of Course)
Course Design
Definition of COs
Mapping of CO-
JusP
tif
O
ic
/P
at
S
io
O
n of
Mapping
CO-PO/PSO
Evaluation
CO-PO attainment
(Previous Batch)
CO Gap Analysis
Action to
Improve
CO
Set Target
for CO
Conduction of Assessment
Method
CO Attainment Calculation
Monitoring Committee
CO
Level
Attained
?
Academic Activities
Syllabus
Lesson Plan
Course Material
Teaching Methods
Assessment
Methods
CCM by Academic
Advisor
Cycle Test
Guest Lecture/
Workshop/
Seminar
PSO
Attainmen
t
End Sem. Exam
Surprise Test
Quiz/Assignment
Faculty Feedback
CO attainment Discuss
Suggestion to Improve
Course Feedback Survey
Increase Set Target &
Attainment Level
CCM
(End of
Course)
Measures
to Improve
Yes
No
PSO
Attainmen
t
CO Evaluation Process CRITERION 3
CO Attainment CRITERION 3
25
PO Evaluation Process CRITERION 3
26
27
PO/PSO Attainment Table
PO/PSO Attainment CRITERION 3
PO/PSO Indirect Attainment Table
INDIRECT ASSESSMENT
TOOL
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PO INDIRECT ATTAINMENT 3 2.86 2.98 3 3 3 3 3 3 3 3 3 3 3 3
PAM average 2.77 2.60 2.64 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.70 2.16 2.26 1.93
PO INDIRECT ATTAINMENT
(on PAM base)
2.77 2.48 2.62 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.7 2.161 2.258 1.929
S.NO.
COURSE
CODE
COURSE NAME PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
1 15EE206 Digital System Design 2.3 1 1 - 1 0.75 0.75 - - - - - 0.65 2 -
2 15EE209L Analog and Digital Circuits Laboratory 3 2.67 2.75 2 - - - - - - - - 2 2 -
3 15EE211 Control Systems 1.09 0.72 1.09 - 0.73 0.36 - - - - - - 1.09 1.16 0.38
4 15EE212L Measurements and Control Systems Laboratory 3 - - 1.67 - 1 - - - - - - 1 2 -
5 15EE301J Power Electronics 3 3 - - - 1 1 - - - - - 2 2 -
6 15EE303 Discrete Transforms and Signal Processing 2.22 2.13 1.04 - - 0.62 1 - - - - - 1.35 0.74 -
7 15EE305J Microcontrollers 3 2 2 - 2 - - - - - - - 3 3 -
8 15EE306M Multi-Disciplinary Design 3 2 3 - - - - 1 - - - 1.5 3 3 3
9 15EE401 Solid State Drives 3 2 2 - - 1 1 - - - - - 2 2 -
10 15EE496L Major Project 3 3 3 - - 3 - 3 3 3 3 3 3 3 3
Students Performance
STUDENT SANCTIONED INTAKE
ENROLMENT RATIO
CRITERION 4
28
Success Rate
Success rate: without any backlogs in any semester during the course of study
Success rate: with and without backlogs in any semester during the course of study
CRITERION 4
29
Item
LYG
2015-2016
LYGm1
2014-2015
LYGm2
2013-2014
Total No. of Final Year Students (N) 408 390 417
No. of students placed in companies or Government Sector (x) 252 242 272
No. of students admitted to higher studies with valid qualifying scores (GATE
or equivalent State or National Level Tests, GRE, GMAT etc.) (y)
45 65 81
No. of students turned entrepreneur in engineering/technology (z) 4 12 13
x + y + z = 301 311 384
Placement Index : (x + y + z )/N P1=0.74 P2=0.82 P3=0.88
Average placement= (P1 + P2 + P3)/3 0.81
Assessment Points = 30 × average placement 24.40
Placement, Higher studies & Entrepreneurship CRITERION 4
30
Professional Societies and Chapters
No of Students Benefitted
CRITERION 4
31
Publications in Magazines & Newsletter
Details of “EEEA Review” – Magazine Samples
 EEEA REVIEW by EEE Association
 E=MC2 (e-magazine on computing and conservation of energy) by SRMIST ENFUSE chapter
 Publish their minor/ major projects works in refereed National and International Journals
Publication of the Students works in Journals
CRITERION 4
32
33
Students Awards/Achievements-
Inter Institute Events
International Events National Events
2020 2019 2018 2017 Total
Inter State 77 39 16 31 163
Intra State 27 16 8 10 61
Total 104 55 24 41 224
CRITERION 4
Total Achievements: 29
International: 12
National: 17
34
Student Faculty Ratio (SFR)
For sanctioned intake, Average SFR=18.76
For actual intake, Average SFR = 17.04
SFR Calculation for Sanctioned Intake
No. of Students = Sanctioned Intake +
Actual admitted lateral entry students
(Year)
CAY
2019-2020
CAYm1
2018-2019
CAYm2
2017-2018
U1.1 (II year) 360 310+1 460
U1.2 (III year) 310+1 460 460+3
U1.3 (IV year) 460 460+3 450
UG1(B.Tech. EEE) 1130+1=1131 1230+4=1234 1370+3=1373
P1.1 (PED) 20 30 20
P1.2 (PED) 30 20 20
PG1 (M.Tech. PED) 50 50 40
P2.1 (PS) 20 30 20
P2.2 (PS) 30 20 20
PG2 (M.Tech. PS) 50 50 40
Total No. of Students in the Department
(S)
S1=1231 S2=1334 S3= 1453
No. of Faculty in the Department (F) F1=69 F2=73 F3=72
Student Faculty Ration (SFR) SFR1=S1/F1 =17.84 SFR2= S2/F2= 18.27 SFR3= S3/F3= 20.18
Average SFR SFR= (SFR1+SFR2+SFR3)/3=18.76
CRITERION 5
35
Cadre Ratio Marks = 𝐴𝐹1
+ 𝐴𝐹2
∗ 0.6 + 𝐴𝐹3
∗ 0.4 ∗ 10 = (0.38 +0.43+0.52) *10 = 17
𝑅𝐹1 𝑅𝐹2 𝑅𝐹3
Faculty Qualification for Academic year
2020-21
 Total Number of Faculty- 71
 Total Number of Faculty with Ph.D.- 50
 Total Number of Faculty with M. Tech-
21
 Percentage of faculty with Ph.D. = 70.4%
 No. of regular faculty with Ph.D. is
increasing gradually
Academic
Year
No. of regular faculty
with Ph. D
No. of regular
faculty with M. Tech
2020-2021 50 21
2019-2020 30 39
2018-2019 26 47
2017-2018 17 55
Faculty Qualification
Faculty Information
Faculty Cadre Proportion
Faculty Retention
Description
2018-19
(CAYm1)
2019-20
(CAY)
No of Faculty
Retained
65 64
Total No of Faculty 71 71
% of Faculty Retained 92 90
Average Faculty Retention : 91%
Visiting/Adjunct Faculty
CRITERION 5
PSO 1: Ability to perform in a Global & Industrial Perspective
PSO 2: Ability to acquire Skills and are Career ready
PSO 3: Ability to apply Energy Safety and Practices
Program Specific Criteria Mapped with Faculty Competencies
18.4%
8%
20.8%
22%
20.7%
10.1%
Area of specialization Electronics
Power Systems
Control systems and
robotics
Machines and drives
Sustainable Energy
Resources
AI based Techniques
PSO Elect PS CS&R MD SER AIT
PSO 1 H H H H H H
PSO 2 H H H H H H
PSO 3 -- M L -- M L
Relation between PSO & Area of specialization
Elect: Electronics, PS=Power Systems, CS&R= Control System and Robotics, MD= Machines and Drives, SER= Sustainable Energy Resources,
AIT= Artificial based Techniques
Faculty Competencies in Correlation to
Program Specific Criteria
CRITERION 5
Program Specific Outcomes
36
 ICT course in collaboration with IIT Bombay -Bodhi
Tree
 A SAFE platform for attendance and class test
 MOODLE platform- SRMIST
FIIP
EDAC
Engineering
LTD
NIOT,
Chennai
KONE
Elevator
India Pvt Ltd,
Chennai
National
Instruments
Bharathiya
Nabhikiya
Vidyut Nigam
LTD
ID TECH
Solutions
PVT LTD
National
Institute of
Wind Energy
Totally 19 faculties participated in Faculty Industry
Immersion Program (FIIP) scheme in various
industries.
Tamilnadu
Cement
Corporation
LTD
Innovation Introduced in Classroom Teaching Innovations through Interaction with Industry
Sample of uploaded resources in Moodle Platform
Innovations -Faculty in Teaching and Learning CRITERION 5
37
Innovation through Organizing/Arranging
Workshops/STTP
Academic
Year
No. of
STTP/Workshop
organized
No. of Guest
lectures, webinars
arranged
2019-20 5 32
2018-19 4 7
2017-18 3 5
STTP Workshop Webinar
Sample Works available for Peer Review-
Website and Social Media (YouTube)
• The content of the course materials can be assessed by everyone
and can be used for further development.
• Sample courses are 18EES101J - Basic Electrical And Electronics
Engineering, 15EE305J-Microcontrollers, 18EEC205J- Electrical
Machines
• Faculty publications are also available in Research gate.
• Developed the virtual lab for the laboratory “Power system
Simulation Lab” during the academic year 2020-2021, in PALS
IIT VLAB platform.
Innovations in Teaching and Learning CRITERION 5
38
Academic
Year
Number of FDP/STTP
Attended
Number of Days
Attended
Number of Online
Courses Attended
2018-2019 148 411 131
2017-2018 112 822 62
2016-2017 95 298 52
Total: 355 1531 245
Sample FDP and NPTEL Certificates
Types of Program No of Participation
MHRD/AICTE/
SERB /UGC
31
Coursera 83
NPTEL 92
Edx 18
Edapt 09
Tata Steel 14
Others 29
Faculty Participation in FDPs CRITERION 5
39
Academic Research
Total Paper Publications
Ph.D. Details
Assessment Period Current status
No. of Research Supervisor 26 44
No. of Research Scholar 76 125
Ph.D. Awarded 22 45
CRITERION 5
• Total No. of papers published during assessment period- 366
• No. of Scopus publications- 256
• No. of SCI publications- 110
• No. of Book chapters- 40
• Highest Scopus citation of the faculty in the Dept- 1330
• Department Total Scopus citation - 5009
• Highest h-index- 16
Research Accomplishment
118
194
30
63
54
17
37
88
131
2017 -18 2018 -19 2019 -20
NO.
OF
PUBLICATIONS
ACADEMIC YEAR
FACULTY PUBLICATION DETAILS
Total SCI Scopus
40
DST SERB-TARE
1
SRMIST
2
DST SERB CORE
RESEARCH GRANT
3
DST SERB-TARE
4
5
IE(I) Project Funding
6
Project Funding
Rs. 75 L & 27L
1.02C
Teachers Association for Research Excellence
Grant Rs.1830000
Optimal Energy Management in ship microgrid with PV
SRMIST Grant Rs.1599290
Building automation systems in smart building
Core Re.search Grant Rs.3823732
Development of low cost, Easy to install, high performance
indigenous PV powered IWPT charging system for light duty
electric vehicle
Teachers Association for Research Excellence
Grant Rs.1830000
Design and Development of Resilient building
integrated PV system grid connected system
Dr. J.Preetha Roselyn
Associate Prof/EEE
Dr. C.Bharati Raja
Associate Prof/EEE
Dr. S.Padmini
Assistant Prof/EEE
SRMIST Grant Rs.318969
SRMEXPLOROVER
IE(I) Grant Rs.15000
Microbial fuel cell based large scale
sustainable energy with waste management
SRM Selective excellence
scheme
Dr. J.Divya Navamani
Assistant Prof/EEE
Dr. M.Jagabar Sathik
Associate Prof/EEE
Dr. R.Sridhar
Associate Prof/EEE
Dr. A.Geetha
Assistant Prof/EEE
7
SRM Grant Rs.878000
1.Range extended hybrid electric vehicle
2.Design and Development of hybrid PV water pumping system
3.Development of new small scale wind turbine
Sponsored Research CRITERION 5
SRMIST
42
Development Activities
Instructional Materials
Research Lab
CRITERION 5
Patent / Product Development Working Models Developed
43
Consultancy Services CRITERION 5
Academic year Project Duration Funding Agency Amount (INR)
2018-19 Efficient Transformerless low-cost
Microgrid inverters with Halide
Perovskite solar panels
1 year
CORRIT Energy and
Infra 5,00,000
2018-19 Energy, power quality and thermal audit 6 months Brite Brothers Ltd 60,000
2017-18
Temasek polytechnic 1 year
AEC Business school,
Singapore.
10,75,000
Advisory Services
• Ramco Cement- Conducted energy audit and suggested ECM.
• Kalleswary Refinery Ltd- Power loss detection using fluke 434 series II in UPS
• GE Industrial Bangalore Technology Centre- Conducted energy audit and recommended suitable mitigation
techniques.
• Hablis Hotel-Conducted harmonic analysis and related measurements in the chiller plant.
• Bhavani, IGCAR- Collaboration with scientists at IGCAR in the area of thermography for medical application.
• National Instruments- Signed an MOU with NI systems to carry out research and development activities in
academics
44
Laboratories
Electrical Machines Lab I & II
Measurement and Instruments Lab
Power Electronics Lab
Electronics Lab-I & II
Microcontroller Lab
Special Electrical Machines Lab
Basic Electrical Workshop Lab
Simulation Lab- 1, 2 & 3.
Research Lab
Renewable Energy Research Lab (RERL)
Service report of Special Electrical Machines Lab
Number of laboratories: 14
Number of Qualified Technical staff: 13
Number of attenders: 5
Special Electrical Machines Lab Power Electronics Lab
Electrical Machines Lab-I Electrical Machines Lab-II
Simulation Lab Measurement and
Instrumentation Lab
CRITERION 6
45
Special Laboratories and Utilization
Research lab
Renewable Energy research Lab
Outcome of Lab Utilized
Major Equipment
CRITERION 6
46
CO, PO & PSO-Evaluation Method
CO-PO-PEO Mapping
CRITERION 7
47
PO and PSO Attainment -Documentation CRITERION 7
Batch (2015-2019)
Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
Direct Attainment (DA) 2.33 2.06 2.3 2.53 2.24 1.52 1.96 2.24 2.39 2.44 2.39 2.4 1.79 1.94 1.61
Indirect Attainment (IDA) 2.77 2.48 2.62 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.70 2.16 2.26 1.93
Total PO/PSO Attainment
(0.8*DA + 0.2*IDA)
2.42 2.14 2.36 2.55 2.26 1.55 1.98 2.31 2.48 2.52 2.48 2.46 1.86 2.00 1.67
Batch (2016-2020)
Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
Direct Attainment (DA) 2.35 2.11 2.41 2.54 2.38 1.36 1.84 2.18 2.57 2.42 2.05 2.37 1.82 1.95 1.69
Indirect Attainment (IDA) 2.77 2.50 2.59 2.63 2.39 1.60 2.15 2.59 2.87 2.75 2.87 2.61 2.16 2.26 1.93
Total PO/PSO Attainment
(0.8*DA + 0.2*IDA)
2.43 2.19 2.45 2.56 2.38 1.41 1.90 2.26 2.63 2.49 2.21 2.42 1.89 2.01 1.74
Batch (2017-2021)
Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
Direct Attainment (DA) 2.14 1.9 2.3 2.39 2.34 1.49 1.9 2.4 2.69 2.48 2.69 2.42 1.72 1.84 1.73
Indirect Attainment (IDA) 2.68 2.53 2.53 2.45 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.70 2.16 2.26 1.93
Total PO/PSO Attainment
(0.8*DA + 0.2*IDA)
2.25 2.03 2.35 2.40 2.35 1.52 1.95 2.44 2.73 2.55 2.73 2.48 1.81 1.92 1.77
Target for PO Attainment CRITERION 7
Batch (2015-2019)
Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PAM Average 2.77 2.6 2.64 2.63 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.7 2.25 2.33 2.16
75 % of PAM 2.07 1.95 1.98 1.97 1.79 1.23 1.61 1.94 2.15 2.13 2.15 2.02 1.68 1.75 1.62
Direct Attainment (DA) 2.33 2.06 2.3 2.53 2.24 1.52 1.96 2.24 2.39 2.44 2.39 2.4 1.79 1.94 1.61
48
Sample Analysis for PO Attainment
Batch (2015-2019)
Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PAM average 2.77 2.60 2.64 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.70 2.16 2.26 1.93
PO Attainment 2.33 2.06 2.3 2.53 2.24 1.52 1.96 2.24 2.39 2.44 2.39 2.4 1.79 1.94 1.61
PO Attainment (%) 84.12 79.23 87.12 96.93 95.32 92.12 94.23 86.49 83.57 85.92 83.57 88.89 82.82 85.91 83.48
Batch (2016-2020)
Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PAM average 2.77 2.60 2.64 2.63 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.70 2.16 2.26 1.93
PO Attainment 2.35 2.11 2.41 2.54 2.38 1.36 1.84 2.18 2.57 2.42 2.05 2.37 1.82 1.95 1.69
PO Attainment (%) 84.84 81.15 91.29 96.58 99.58 82.42 85.58 84.17 89.55 85.21 71.43 87.78 84.21 86.36 87.63
Batch (2017-2021)
Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PAM average 2.77 2.60 2.64 2.63 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.70 2.16 2.26 1.93
PO Attainment 2.14 1.9 2.3 2.39 2.34 1.49 1.9 2.4 2.69 2.48 2.69 2.42 1.72 1.84 1.73
PO Attainment (%) 77.26 73.08 87.12 90.87 97.91 90.30 88.37 92.66 93.73 87.32 93.73 89.63 79.58 81.49 89.70
PO/PSO Attainment - Index CRITERION 7
49
Identification of Gap Analysis CRITERION 7
S.N
o
Course code Course title
Target Attainment Attainment
Gap
1 15EE204L Electrical Machines Laboratory I 1 1 0
2 15EC204J Linear Integrated Circuits 2 1.54 -0.46
3 15EE206 Digital System Design 1 1 0
4 15EE211 Control Systems 2 0.73 -1.27
5 15EE300 Comprehension 3 3 0
6 15EE305J Microcontrollers 2 2 0 50
Academic audit (Check list) CRITERION 7
51
52
Question
paper
scrutiny
Answer
script
paper
scrutiny
Teaching
methodology-Evaluation
Course
file
Evaluation
Course
committee
meeting
Student
feedback
Letter
to
parents
Counselling
Audit formats CRITERION 7
53
Improvement in Placement, Higher Studies
and Entrepreneurship
Year of
graduation
Total
strength
Placed
students
% of
placement
2017 417 272 65
2018 390 242 62
2019 408 252 62
2020 450 288 64
SALARY PACKAGES IN CORE AND IT INDUSTRY
DETAILS OF ENTREPRENEURS
PLACEMENT STATISTICS
CRITERION 7
PLACEMENT RECORD
54
PART-B
OUTCOME BASED EDUCATION
Curriculum
Teaching-
Learning
Assessment
55
OBE
Vision
Mission
PEOs
POs
COs
OUTCOMES
TEACHING-LEARNING PROCESS
CONTINUOUS IMPROVEMENT Internal
External
ASSESSMENT METHODS
• Cycle test, Assignment, surprise test
• Lab assessment
• Project: Review marks
• End semester examination
Feed
backs
• Course survey, graduating student survey,
Alumni survey, employer survey, Parent
survey
Syllabus
Pedagogical initiatives
Collaborative learning
Project based learning
Learning through laboratory
Outcome based Education (OBE)
Monitoring
and
action plan
Quality of learning
Quality of teaching
Learning outcomes
OBE
PEOs
Mission
1
Mission
2
Mission
3
Consistency
PEO1: Graduates are in a position to apply
their knowledge acquired in Mathematics,
Basic Sciences and Electrical and Electronics
Engineering courses, to the solution of
complex problems encountered in the modern
Engineering practice.
H
(3)
M
(2)
L
(1)
1.Students apply their knowledge of basic mathematical and science to solve complex
electrical problems.
2.The syllabus is constantly upgraded to be on par with global excellence which caters
to latest trends in engineering technology and practices.
3.The industrial collaboration in practical technical training elevates the students to
global standards
PEO 2: Graduates learn and adapt themselves
to the constantly evolving technology by
pursuing higher studies.
M
(2)
H
(3)
L
(1)
1 Students are exposed to state-of-the-art technology through multi-disciplinary design
projects, technical seminar and industrial training, which supplements in complex
problem solving & design through meticulous practice & training.
2.Students apply the skills and knowledge acquired through these practices in minor &
major projects.
3.The research problem dealt in major projects motivates the students to pursue higher
studies in their respective domain.
PEO3: Graduates are better employable and
achieve success in their chosen areas of
Electrical and Electronics Engineering and
related fields.
M
(2)
M
(2)
L
(1)
1.Knowledge obtained on collaboration with industry through technical seminars,
workshops, laboratory practices, technical internships etc refines the students, thus
empowering them to be employable in core industries in Electrical & Electronics.
2.Software programming skills & hardware development done in major and minor
projects equips the students in the field of Research & Development.
PEO 4: Graduates are good leaders and
managers by effectively communicating at
both technical and interpersonal levels.
L
(1)
L
(1)
H
(3)
1. Communication & interpersonal skills of the students are continuously groomed
through laboratory practices, seminar and project presentations.
2.Active participation and organizing technical and non technical events of Students
equip them to manage and lead organisations in the future.
3.Life skill courses in the curriculum imparts the students the knowledge5o7f ethical
responsibilities.
Consistency of PEOs with Mission OBE(Plan)
58
Program Outcomes (POs)
Graduate Attributes (GA) Program Specific
Outcomes (PSOs)
PO1:Engineerin
g
Knowledge
PO2:
Problem
Analysis
PO3:
Design
&
Development
PO4:
Analysis,
Design,
Research
PO5:
Modern
Tool
Usage
PO6:
Society
&
Culture
PO7:
Environment
&
Sustainability
PO8:
Ethics
PO9:
Individual
&
Team
Work
PO10:
Communication
PO11:
Project
Mgt.
&
Finance
PO12:
Life
Long
Learning
PSO1:Global
&
Industrial
Perspective
PSO2:
Skills
&
Career
ready
PSO3:Energ
y,
Safety
and
Practice
PEO - 1 H H H L M M
PEO - 2 H H H H M
PEO - 3 H H M H H M M M H
PEO - 4 H H H L M
Mapping of POs with PEOs
Every course in the curriculum are mapped with COs ,POs and PSOs
OBE(Plan)
Collaborative
learning
Project based
learning
Conduct of
lab courses
Multidisciplinary
design
Club
association
activity
Major project
Minor project
Seminar
Experiment
Record
Adherence to
Academic
calendar
Academic
calendar
Slot based
timetable Industrial training
Viva
Model exam
University
practical
Teaching-Learning Process OBE(Do)
Pedagogical
Initiatives - Content
Delivery
Google
Class
Room
Bodhi Tree
Safe
platform
Massive Open
Online Courses
(MOOCs)
Moodle
based
LMS
Invited
Lectures
Industrial
Training /
Internship
Pedagogical Initiatives OBE(Do)
PROGRAM OUTCOMES
PO1: Engineering Knowledge
PO2: ProblemAnalysis
PO3: Design/Development of Solutions
PO4: Conduct Investigations of Complex Problems
PO5: Modern Tool Usage
PO6: The Engineer and Society
PO7: Environment and Sustainability
PO8: Ethics
PO9: Individual and Team Work
PO10: Communication
PO11: Project Management and Finance
PO12: Life-long Learning
61
PROGRAM SPECIFIC OUTCOMES
PSO1: Ability to perform in a Global & Industrial
Perspective
PSO2: Ability to acquire Skills and are Career ready
PSO3: Ability to Utilize Energy, Safety and Practices
Course Outcomes (COs), Program Outcomes
(POs) & Program Specific Outcomes (PSOs)
SAMPLE COURSE OUTCOME (2015R)
COURSE: DIGITAL SYSTEM DESIGN (15EE206)
CO1: Understand the concept of digital logic circuits
CO2: Design combinational and sequential logic circuits
CO3: Learn the concepts of memory devices, VHDL
OBE(Check)
62
CO – PO MAPPING IN SYLLABUS COURSE ARTICULATION MATRIX
15EE206 Digital System Design
Course
Code
Course
Outcome
(CO)
PO1
PO2
PO3
PO4
PO5
PO6
PO7
PO8
PO9
PO10
PO11
PO12
PSO1
PSO2
PSO3
15EE206
CO1 3 - - - - - - - - - - - 1 - -
CO2 3 2 2 - - 1 1 - - - - - 1 - -
CO3 3 - - - 1 1 1 - - - - - - 2 -
Average 3 2 2 - 1 1 1 - - - - - 1 2 -
PROGRAM ARTICULATION MATRIX
Course
Code
PO1
PO2
PO3
PO4
PO5
PO6
PO7
PO8
PO9
PO
1
0
P
O
1
1
P
O
1
2
PSO
1
PS
O
2
PS
O
3
15EE206
3 2 2 - 1 1 1 - - - - - 1 2 -
Wi = Σ (COj) /No of Mapped COs (i=1 to15 and j= 1 to Max CO)
(where, Wi is the Weight Factor for POs & PSOs)
CO-PO in Syllabus OBE(Check)
Program Articulation Matrix (PAM) OBE(Check)
63
Course Articulation Matrix (CAM) OBE(Check)
64
15EE206 Digital System Design
Course Code Course Outcome (CO)
PO1
PO2
PO3
PO4
PO5
PO6
PO7
PO8
PO9
PO10
PO11
PO12
PSO1
PSO2
PSO3
15EE206
15EE206.1 3 - - - - - - - - - - - 1 - -
15EE206.2 3 2 2 - - 1 1 - - - - - 1 - -
15EE206.3 3 - - - 1 1 1 - - - - - - 2 -
15EE206
C
O1
PO1
3 Mapped strongly as all the students acquire knowledge on digital logic circuits
CO2
PO1
3
Mapped substantially as all the students gain knowledge on combinational and sequential logic
circuits
PO2
2
Mapped moderately as all the students gain ability to solve and formulate combinational and
sequential logic circuits
PO3
2
Mapped moderately as all the students gain ability to design combinational and sequential logic
circuits
PO6
1
Mapped as students obtain the impact of implementation of combinational and sequential logic
circuits in practical uses.
PO7
1
Mapped as the students understand the impact of combinational and sequential logic circuits in
Engineering practice.
CO3
PO1
3
Mapped substantially as all the students gain knowledge on the concepts of memory devices and
VHDL
PO5
1 Mapped as students implement modern tools for memory devices
PO6
1 Mapped as the students understand the implementation of memory devices in Engineering practice.
PO7
1 Mapped as the students understand the impact of digital solution for the ever-changing environment
CO-PSO JUSTIFICATION
CO-PO JUSTIFICATION
15EE206
CO1
PSO1
1
Mapped as all the students understand the
implementation of digital logic circuits in industry
and practical applications.
CO2
PSO1
1
Mapped as all the students gain knowledge on
combinational and sequential logic circuits in
applied Engineering sectors.
CO3
PSO2
1
Mapped as all the students gain knowledge on
memory devices in applied Engineering sectors.
CO-PO/PSO Mapping Justification OBE(Check)
65
Assessment Tools for Course Outcomes (COs) OBE(Check)
66
CO Marks Computation & Attainment Level
Calculation of CO marks for all COs for all students in the respective class is based on the course evaluation plan.
CO marks = Σ{(Marks obtained/Maximum Marks) * (Weightage of respective CO)}
Calculate the % of students who scored greater than or equal to set target mark for internal assessment
% of students = {(Number of students who scored greater than or equal to set target mark /Total number of students)*100}
To calculate the numerator, the below equation is used
Students scored greater
than or equal to set target mark =
CO marks obtained/respective total CO value
from the course evaluation plan
* 100 >= set target
SAMPLE CO MARKS CALCULATION SHEET CO ATTAINMENT LEVEL DEFINITION
OBE(Check)
% of students -
Target marks range
Level
0 59 0
60 69 1
70 79 2
80 100 3
67
CO Indirect Assessment –
Course Feedback Survey
OBE(Check)
68
CO Attainment Table OBE(Check)
69
S.NO.
COURSE
CODE
COURSE NAME CO1 CO2 CO3 CO4 CO5
1 15EE206 Digital System Design 2.4 1.5 3 - -
2 15EE209L Analog and Digital Circuits Laboratory 3 3 3 3 -
3 15EE211 Control Systems 0.88 1.2 0.97 1.3 -
4 15EE212L Measurements and Control Systems Laboratory 3 3 3 - -
5 15EE301J Power Electronics 3 3 3 - -
6 15EE303 Discrete Transforms and Signal Processing 1.7 2.7 1.6 2.1 3
7 15EE305J Microcontrollers 3 3 3 - -
8 15EE306M Multi-Disciplinary Design 3 3 3 3 -
9 15EE401 Solid State Drives 3 3 3 - -
10 15EE496L Major Project 3 3 3 3 3
PO/PSO Evaluation Process OBE(Check)
70
Questions mapped with POs/PSOs Sample Format
Questions mapped with POs/PSOs Sample Format
PO/PSO Indirect Assessment
Graduate Exit and Parent Survey
OBE(Check)
71
72
Questions mapped with POs/PSOs
Alumni Survey
Questions mapped with POs/PSOs
Employer Survey
OBE(Check)
PO/PSO Indirect Assessment
Alumni and Employer Survey
73
PO/PSO Attainment Table
PO/PSO Indirect Attainment OBE(Check)
S.NO.
COURSE
CODE
COURSE NAME PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
1 15EE206 Digital System Design 2.3 1 1 - 1 0.75 0.75 - - - - - 0.65 2 -
2 15EE209L Analog and Digital Circuits Laboratory 3 2.67 2.75 2 - - - - - - - - 2 2 -
3 15EE211 Control Systems 1.09 0.72 1.09 - 0.73 0.36 - - - - - - 1.09 1.16 0.38
4 15EE212L
Measurements and Control Systems
Laboratory
3 - - 1.67 - 1 - - - - - - 1 2 -
5 15EE301J Power Electronics 3 3 - - - 1 1 - - - - - 2 2 -
6 15EE303 Discrete Transforms and Signal Processing 2.22 2.13 1.04 - - 0.62 1 - - - - - 1.35 0.74 -
7 15EE305J Microcontrollers 3 2 2 - 2 - - - - - - - 3 3 -
8 15EE306M Multi-Disciplinary Design 3 2 3 - - - - 1 - - - 1.5 3 3 3
9 15EE401 Solid State Drives 3 2 2 - - 1 1 - - - - - 2 2 -
10 15EE496L Major Project 3 3 3 - - 3 - 3 3 3 3 3 3 3 3
INDIRECT ASSESSMENT
TOOL
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PO INDIRECT ATTAINMENT 3 2.86 2.98 3 3 3 3 3 3 3 3 3 3 3 3
PAM average 2.77 2.60 2.64 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.70 2.16 2.26 1.93
PO INDIRECT ATTAINMENT
(on PAM base)
2.77 2.48 2.62 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.7 2.161 2.258 1.929
74
Batch (2015-2019)
Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PAM average 2.77 2.60 2.64 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.70 2.16 2.26 1.93
PO Attainment 2.33 2.06 2.3 2.53 2.24 1.52 1.96 2.24 2.39 2.44 2.39 2.4 1.79 1.94 1.61
PO Attainment (%) 84.12 79.23 87.12 96.93 95.32 92.12 94.23 86.49 83.57 85.92 83.57 88.89 82.82 85.91 83.48
Batch (2016-2020)
Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PAM average 2.77 2.60 2.64 2.63 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.70 2.16 2.26 1.93
PO Attainment 2.35 2.11 2.41 2.54 2.38 1.36 1.84 2.18 2.57 2.42 2.05 2.37 1.82 1.95 1.69
PO Attainment (%) 84.84 81.15 91.29 96.58 99.58 82.42 85.58 84.17 89.55 85.21 71.43 87.78 84.21 86.36 87.63
Batch (2017-2021)
Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
PAM average 2.77 2.60 2.64 2.63 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.70 2.16 2.26 1.93
PO Attainment 2.14 1.9 2.3 2.39 2.34 1.49 1.9 2.4 2.69 2.48 2.69 2.42 1.72 1.84 1.73
PO Attainment (%) 77.26 73.08 87.12 90.87 97.91 90.30 88.37 92.66 93.73 87.32 93.73 89.63 79.58 81.49 89.70
PO/PSO Attainment - Index OBE(Check)
Process of identification of curriculum gaps
• Mapping of POs and PSOs-Starting of the semester-Course committee meeting.
• Subject handling faculty submits the deficiencies in attainment of PO’s and PSO’s in course
committee meeting at the end of the semester.
• Stake holder’s Survey-Gaps in the teaching learning process is identified.
• In Faculty meeting along with AAMC members, the Consolidated report of gap analysis is
discussed and plan of action is approved.
• Follow-up action is implemented in the next academic year.
Course
committee
meeting –
Planning
Course
committee
meeting –
attainment
analysis
Faculty
meeting Gap
analysis
discussion
AAMC
Approval
Actions
implemented
in courses
Next year PO
attainment
review
OBE(Act)
Course Committee Meeting OBE(Act)
76
Action taken & Improvement in PO attainment OBE(Act)
Sample Assignment
77
Gap analysis-Course Committee Meeting OBE(Act)
Plan of Action to Bridge the Gap & its
Implementation
Specific assignment, Tutorial classes
Video lectures, Minor projects
Design based competitions
Flipped classroom, NPTEL courses
Infrastructure
Joint courses-
Conduct additional experiments
Industrial visit, Industrial Training
Professional society activities
Seminars, Guest lecture, Alumni talk Industrial visit
79
Video Lecture
Specific assignment
Design based competition
OBE(Act)
Continuous Improvement OBE(Act)
80
https://drive.google.com/drive/u/3/my-drive
https://drive.google.com/drive/u/2/my-drive
Drive link-C and P file
Drive link-C file
81
Drive link-P file
82

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  • 1. Department of Electrical and Electronics Engineering SRMIST, Kattankulathur 1 WELCOMES NBA EXPERT COMMITTEE Presented by Dr.K.Vijayakumar. HOD/EEE
  • 2. PROGRAMMES OFFERED • B.Tech - Electrical and Electronics Engineering • M.Tech - Power Electronics & Drives - Power Systems • Ph.D. Program in Electrical Engineering Department of EEE – A Glance Faculty Members 70 Faculty Members 71% with PhD 2 with Post Doc 5 Adjunct Faculty Members Students 853 UG students 26 PG students 125 PhD Scholars FT: 56 Laboratories 14 Laboratories - UG 4 Industry Supported Laboratories - Renewable Energy Research Lab NI academy and research centre e- Mobility Research centre Wireless power Transfer Lab Department Library Books : 2173 e-Journals : 2712 dSpace Institutional Repository: (Question banks, UG/PG/PhD Thesis) PT: 55 SFR: 1:18 B.Tech 2003 B.Tech EEE 2001 B.Tech EEE 1992 Anna University Madras University SRMIST The Skill and Personality Development Program Centre (SPDC) is funded by AICTE under the Scheme of Quality Improvement Scheme (AQIS)- Rs. 19,05,166/-
  • 3. Accreditation B.Tech EEE Program Accredited by Engineering Accreditation Commission (EAC) of Accreditation Board of Engineering and Technology (ABET) NBA 2001 Award AICTE- CII Award (2019) Energy Audit & Awareness • Energy audit conducted with Bureau of Energy Efficiency • Energy Literacy drive-Energy Swaraj Foundation Funded Projects Funding from external agency: Rs. 1,53,47,662/ Funding from SRM: Rs. 27,96,259/- Faculty Industry Immersion Programme Number of Industries: 8 No of Faculty Members: 18 Man-days : 227 Publications and Patents Publications : 484 Citation: 5292 Average Impact Factor: 2.79 Patents Published: 29 Department Achievements /Recognitions
  • 4. Paper publication award- IEEE Transaction Post-Doctoral Research Fellow . Gandhi Global Solar Yatra- 1000 Students in Solar Ambassador Workshop . NPTEL Online course-Elite with Silver medal 1 2 3 4 Faculty Achievements/Recognitions
  • 5. Rubik's club- SRMIST India Book of Records Mr. Ajith Raj MTS Under Graduate Scholarship for 3000 USD 6 students received scholarship (14, 500 USD) First place Mathworks Minidrone Competition at IROS 2019, China Mr.Anirudh Ravi MTS outstanding student section award -2019 Mr. Atulya Kreator 3D Ventilator for Covid Patients-SIIC Mr. Shafuel Wara NASA Human Exploration Rover Challenge 2018, USA - Won First prize Student Achievements/Recognitions
  • 6. Vision, Mission and its Consistency Consistency of Mission Institute Mission Department Mission MOVE UP through international alliances and collaborative initiatives to achieve global excellence. To educate the student to become better practicing engineers to meet global excellence ACCOMPLISH A PROCESS to advance knowledge in a rigorous academic and research environment To provide better environment through latest developments in electrical engineering involving problem solving, design, practice and training. ATTRACTS AND BUILD PEOPLE in a rewarding and inspiring environment by fostering freedom, empowerment, creativity and innovation. To motivate the graduates to become a good leader, designer and researcher through industry-oriented trainings with social and ethical responsibilities Consistency of Vision Institute Vision Department Vision To emerge as a world – class university To impart quality education in the field of Electrical & Electronics Engineering To disseminate knowledge and providing students a unique learning experience in Science, Technology, Medicine, Management and other areas of scholarship that will best serve the world and betterment of mankind. To produce globally competent engineers to serve the society. Vision To impart quality education in the field of Electrical and Electronics Engineering and to produce globally competent engineers to serve the society Mission 1. To educate the student to become better practicing engineers to meet global excellence. 2.To provide better environment through latest developments in electrical engineering involving problem solving, design, practice and training. 3.To motivate the graduates to become a good leader, designer and researcher through industry-oriented trainings with social and ethical responsibilities. CRITERION 1
  • 7. Department level Social Media Facebook Faculty/Class/ Lab/ Office Rooms/Notice board Brochure Dissemination of Vision, Mission and PEOs Program Educational Objectives( PEOs) PEO1-Graduates are in a position to apply their knowledge acquired in Mathematics, Basic Sciences and Electrical and Electronics Engineering courses, to the solution of complex problems encountered in the modern Engineering practice. PEO2-Graduates learn and adapt themselves to the constantly evolving technology by pursuing higher studies. PEO3-Graduates are better employable and achieve success in their chosen areas of Electrical and Electronics Engineering and related fields. PEO4-Graduates are good leaders and managers by effectively communicating at both technical and interpersonal levels. Institute Brochure Institute Digital Board Induction Programme Curriculum Institute Website Institute Level CRITERION 1
  • 8. 8 Process for Defining Vision, Mission and PEOs Vision and Mission PEOs CRITERION 1
  • 9. Consistency of PEOs with Mission PEOs Mission 1 Mission 2 Mission 3 Consistency PEO1: Graduates are in a position to apply their knowledge acquired in Mathematics, Basic Sciences and Electrical and Electronics Engineering courses, to the solution of complex problems encountered in the modern Engineering practice. H (3) M (2) L (1) 1. Students apply their knowledge of basic mathematical and science to solve complex electrical problems. 2.The syllabus is constantly upgraded to be on par with global excellence which caters to latest trends in engineering technology and practices. 3.The industrial collaboration in practical technical training elevates the students to global standards PEO 2: Graduates learn and adapt themselves to the constantly evolving technology by pursuing higher studies. M (2) H (3) L (1) 1 Students are exposed to state-of-the-art technology through multi-disciplinary design projects, technical seminar and industrial training, which supplements in complex problem solving & design through meticulous practice & training. 2.Students apply the skills and knowledge acquired through these practices in minor & major projects. 3.The research problem dealt in major projects motivates the students to pursue higher studies in their respective domain. PEO3: Graduates are better employable and achieve success in their chosen areas of Electrical and Electronics Engineering and related fields. M (2) M (2) L (1) 1.Knowledge obtained on collaboration with industry through technical seminars, workshops, laboratory practices, technical internships etc refines the students, thus empowering them to be employable in core industries in Electrical & Electronics. 2.Software programming skills & hardware development done in major and minor projects equips the students in the field of Research & Development. PEO 4: Graduates are good leaders and managers by effectively communicating at both technical and interpersonal levels. L (1) L (1) H (3) 1. Communication & interpersonal skills of the students are continuously groomed through laboratory practices, seminar and project presentations. 2.Active participation and organizing technical and non technical events of Students equip them to manage and lead organisations in the future. 3.Life skill courses in the curriculum imparts the students the knowledge of ethical responsibilities. 9 CRITERION 1
  • 10. 10 PEO Mission Statement Mapping Level Justification PEO1 Mission 1 3 Mapped strongly as all the students gain knowledge on mathematics, basic sciences and electrical engineering courses which are periodically upgraded to be on par with global standards Mission 2 2 Mapped moderately as the students gain the ability to design, solve and practice complex engineering problems through latest developments Mission 3 1 Mapped as the students collaborate with industries for practical training which makes them a good researcher, leader and designer PEO2 Mission 1 2 Mapped moderately as the students learn and adapt themselves to the evolving technologies and practice the same to meet global standards Mission 2 3 Mapped strongly as all the students learn and adapt themselves to latest technologies through higher studies Mission 3 1 Mapped as the students collaborate with industries, adapt the new technologies practiced in industries for becoming a good researcher PEO3 Mission 1 2 Mapped moderately as the students practice discipline related concepts for successful employment in global standard Mission 2 2 Mapped moderately as the students are provided with better environment employing latest technologies to fetch better employment and get success Mission 3 1 Mapped as the students are motivated to take up industry oriented training to get better successful employment by becoming good designer and researcher PEO4 Mission 1 1 Mapped as the students practice engineering concepts and communicate the same at both technical and interpersonal levels to meet global standards Mission 2 1 Mapped as the students are provided with latest technology based environment so as to enable them in designing and communicating the same at both technical and interpersonal levels Mission 3 3 Mapped strongly as all the students intend to take up industry oriented training to become a good leader, researcher and manager with social and ethical responsibilities by effectively communicating at both technical and interpersonal levels Justification of Mapping of PEOs and Mission CRITERION 1
  • 11. 11 Structure of the Curriculum Category AICTE 2015 2018 Credits % Credits Credits % Credits Credits %Credits Humanities and social Sciences including Management 12 7.5 15 8.33 12 7.5 Basic Sciences 25 15.5 39 21.6 36 22.5 Engineering Sciences including workshop ,drawing, basics of electrical/mechanical/computer etc., 24 15 15 8.33 16 10 Professional core subjects 48 30 87 48.33 54 33.75 Professional subjects: Subjects relevant to chosen specialisation/branch 18 11.3 18 10 18 11.25 Open subjects: Electives from other technical and/or emerging subjects 18 11.3 6 3.33 9 5.63 Project work, seminar and internship in industry or elsewhere 15 9.4 18 10 15 9.38 Mandatory courses (Environmental sciences, Induction Program, Indian Constitution, Essence of Indian Traditional Knowledge) Non credit - - - - - Total credits 160 180 160 Components of the Curriculum (2015 and 2018) in Compliance with AICTE Process for designing the program curriculum CRITERION 2
  • 12. 12 Compliance of the Curriculum for attaining PO and PSO CRITERION 2
  • 13. 13 Adherence- Academic Calendar Academic Calendar Slot based time table Learning through Industries Industrial Training Industrial visit Internship Pedagogical Initiatives ICT based learning Moodle based LMS Google Class Room Invited Lectures Massive Open Online Courses Collaborative Learning Multidisciplinary Design Club-Association Activity Conduct of Lab Courses Experiments, Record, Viva, Model Exam, University Practical Exam Project based Learning Major Project Minor Project Seminar Monitoring System Students monitoring Green Book Faculty monitoring Feedback system HOD monitoring Teaching Learning Process CRITERION 2 Flipped Classroom Academic Calendar Club-Association Activity Industrial Training Moodle based LMS Video Lectures Green Book
  • 14. Quality Improvement-Student Performance 14 . Support to the high performers Semester Abroad Programme Merit Scholarship Placement training Gate coaching Workshops/ Conference/ Competitions Club & Societal activities Support to Low Performers Support to High Performers Support to the low performers Counselling (Course wise, Counsellors) Student adoptive scheme (or) Special coaching classes Compensatory classes Letter to parents Assignments CRITERION 2
  • 15. 15 Process for internal semester question paper setting Quality of Assignments and its relevance to COs and POs (Samples) Process for Internal Semester Question Paper Setting and Quality of Assignments CRITERION 2
  • 16. 16 Best Project Attributes Average Project Attributes • Design and hardware implementation • Paper/patent communicated • Compliance with POs • Impact towards social relevance • Awards/Recognitions • Lack of Design • Partial compliance of POs • Partial compliance of objectives Quality of Completed Projects CRITERION 2
  • 17. Industry Interaction Industrial visit Academic year Number 2017-18 06 2018-19 03 Alumni Talk Academic year 2017-18 Number 06 Industrial Training 2018-19 06 Academic year Student strength No of Industries 2019-20 33 2017-18 446 230 Guest lecture 2018-19 450 222 2019-20 08 2019-20 280 95 Number of industries: 36 INDUSTRIES ABB India Ltd L&T Technology Services Ltd Alstom National Instruments Aricent Technologies Nelcast Limited Armstrong Fluid Technologies NIWE KPIT Valeo India Private Limited CRITERION 2 Industry supported Labs NI supported Lab Texas supported Lab Zigzag Wallvision Lab 17
  • 18. Impact Analysis of Industries Register Number Internship Details Placement Details RA1611005010041 Reliance Industries Limited (1/6/2019 – 31/7/2019) Reliance Industries Limited offer dated 15/1/2021 RA1611005010266 Reliance Industries Limited (1/6/2019 – 31/7/2019) Reliance Industries Limited offer dated 28/8/2019 RA1611005010294 Cue Learn Private Limited (16/3/2020 – 11/9/2020) Cue Learn Private Limited offer dated 8/9/2020 Industry Supported Laboratory Setup Faculty Industry Immersion Program Industry collaboration in Publications Placement by Alumni IMPACT ANALYSIS Impact Analysis of Industrial Training Impact Analysis of Industry Interaction CRITERION 2 18
  • 19. PROGRAM OUTCOMES PO1: Engineering Knowledge PO2: ProblemAnalysis PO3: Design/Development of Solutions PO4: Conduct Investigations of Complex Problems PO5: Modern Tool Usage PO6: The Engineer and Society PO7: Environment and Sustainability PO8: Ethics PO9: Individual and Team Work PO10: Communication PO11: Project Management and Finance PO12: Life-long Learning PROGRAM SPECIFIC OUTCOMES PSO1: Ability to Perform in a Global & Industrial Perspective PSO2: Ability to acquire Skills and are Career ready PSO3: Ability to Utilize Energy, Safety and Practices Course Outcomes, Program Outcomes & Program Specific Outcomes CRITERION 3 19
  • 20. CO Assessment Process CO – PO MAPPING IN SYLLABUS 15EE206 Digital System Design Course Code Course Outcome (CO) PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 15EE206 CO1 3 - - - - - - - - - - - 1 - - CO2 3 2 2 - - 1 1 - - - - - 1 - - CO3 3 - - - 1 1 1 - - - - - - 2 - Average 3 2 2 - 1 1 1 - - - - - 1 2 - COURSE ARTICULATION MATRIX PROGRAM ARTICULATION MATRIX Wi = Σ (COj) /No of Mapped COs (i=1 to15 and j= 1 to Max CO) (where, Wi is the Weight Factor for POs & PSOs) Course Code PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 15EE206 3 2 2 - 1 1 1 - - - - - 1 2 - CRITERION 3 20
  • 21. 15EE206 Digital System Design Course Code Course Outcome (CO) PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 15EE206 15EE206.1 3 - - - - - - - - - - - 1 - - 15EE206.2 3 2 2 - - 1 1 - - - - - 1 - - 15EE206.3 3 - - - 1 1 1 - - - - - - 2 - 15EE206 CO 1 PO 1 3 Mapped strongly as all the students acquire knowledge on digital logic circuits CO2 PO 1 3 Mapped substantially as all the students gain knowledge on combinational and sequential logic circuits PO 2 2 Mapped moderately as all the students gain ability to solve and formulate combinational and sequential logic circuits PO 3 2 Mapped moderately as all the students gain ability to design combinational and sequential logic circuits PO 6 1 Mapped as students obtain the impact of implementation of combinational and sequential logic circuits in practical uses. PO 7 1 Mapped as the students understand the impact of combinational and sequential logic circuits in Engineering practice. CO3 PO 1 3 Mapped substantially as all the students gain knowledge on the concepts of memory devices and VHDL PO 5 1 Mapped as students implement modern tools for memory devices PO 6 1 Mapped as the students understand the implementation of memory devices in Engineering practice. PO 7 1 Mapped as the students understand the impact of digital solution for the ever-changing environment CO-PSO JUSTIFICATION CO-PO JUSTIFICATION 15EE206 CO1 PSO1 1 Mapped as all the students understand the implementation of digital logic circuits in industry and practical applications. CO2 PSO1 1 Mapped as all the students gain knowledge on combinational and sequential logic circuits in applied Engineering sectors. CO3 PSO2 1 Mapped as all the students gain knowledge on memory devices in applied Engineering sectors. CO Assessment Process CO-PO/PSO Mapping Justification CRITERION 3 21
  • 22. 22 CO Assessment Process Assessment Tools for Course Outcomes CRITERION 3
  • 23. CO Assessment Process CO Marks Computation & Attainment Level Calculation of CO marks for all COs for all students in the respective class is based on the course evaluation plan. CO Marks = Σ{(Marks Obtained/Maximum Marks) * (Weightage of respective CO)} Calculate the % of students who scored greater than or equal to set target mark for internal assessment % of students = {(Number of students scored greater than or equal to set target mark /Total number of students)*100} where, To calculate the numerator, the below equation is used Students scored greater CO Marks Obtained/respective total CO value * 100 than or equal to set target mark = from the course evaluation plan >= Set target SAMPLE CO MARKS CALCULATION SHEET CO ATTAINMENT LEVEL DEFINITION The attainment level for each CO is calculated as Level 0: 0 < = % of stud attained target marks <= 59 Level 1: 60 <= %of stud attained target marks <=69 Level 2: 70 <= %of stud attained target marks <=79 Level 3: 80 <= %of stud attained target marks <=100 CRITERION 3 23
  • 24. 24 Faculty Assignment by the Department Course Coordinator Subject Faculty Teaching- Learning Process Course Committee Meeting (Start of Course) Course Design Definition of COs Mapping of CO- JusP tif O ic /P at S io O n of Mapping CO-PO/PSO Evaluation CO-PO attainment (Previous Batch) CO Gap Analysis Action to Improve CO Set Target for CO Conduction of Assessment Method CO Attainment Calculation Monitoring Committee CO Level Attained ? Academic Activities Syllabus Lesson Plan Course Material Teaching Methods Assessment Methods CCM by Academic Advisor Cycle Test Guest Lecture/ Workshop/ Seminar PSO Attainmen t End Sem. Exam Surprise Test Quiz/Assignment Faculty Feedback CO attainment Discuss Suggestion to Improve Course Feedback Survey Increase Set Target & Attainment Level CCM (End of Course) Measures to Improve Yes No PSO Attainmen t CO Evaluation Process CRITERION 3
  • 26. PO Evaluation Process CRITERION 3 26
  • 27. 27 PO/PSO Attainment Table PO/PSO Attainment CRITERION 3 PO/PSO Indirect Attainment Table INDIRECT ASSESSMENT TOOL PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PO INDIRECT ATTAINMENT 3 2.86 2.98 3 3 3 3 3 3 3 3 3 3 3 3 PAM average 2.77 2.60 2.64 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.70 2.16 2.26 1.93 PO INDIRECT ATTAINMENT (on PAM base) 2.77 2.48 2.62 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.7 2.161 2.258 1.929 S.NO. COURSE CODE COURSE NAME PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 1 15EE206 Digital System Design 2.3 1 1 - 1 0.75 0.75 - - - - - 0.65 2 - 2 15EE209L Analog and Digital Circuits Laboratory 3 2.67 2.75 2 - - - - - - - - 2 2 - 3 15EE211 Control Systems 1.09 0.72 1.09 - 0.73 0.36 - - - - - - 1.09 1.16 0.38 4 15EE212L Measurements and Control Systems Laboratory 3 - - 1.67 - 1 - - - - - - 1 2 - 5 15EE301J Power Electronics 3 3 - - - 1 1 - - - - - 2 2 - 6 15EE303 Discrete Transforms and Signal Processing 2.22 2.13 1.04 - - 0.62 1 - - - - - 1.35 0.74 - 7 15EE305J Microcontrollers 3 2 2 - 2 - - - - - - - 3 3 - 8 15EE306M Multi-Disciplinary Design 3 2 3 - - - - 1 - - - 1.5 3 3 3 9 15EE401 Solid State Drives 3 2 2 - - 1 1 - - - - - 2 2 - 10 15EE496L Major Project 3 3 3 - - 3 - 3 3 3 3 3 3 3 3
  • 28. Students Performance STUDENT SANCTIONED INTAKE ENROLMENT RATIO CRITERION 4 28
  • 29. Success Rate Success rate: without any backlogs in any semester during the course of study Success rate: with and without backlogs in any semester during the course of study CRITERION 4 29
  • 30. Item LYG 2015-2016 LYGm1 2014-2015 LYGm2 2013-2014 Total No. of Final Year Students (N) 408 390 417 No. of students placed in companies or Government Sector (x) 252 242 272 No. of students admitted to higher studies with valid qualifying scores (GATE or equivalent State or National Level Tests, GRE, GMAT etc.) (y) 45 65 81 No. of students turned entrepreneur in engineering/technology (z) 4 12 13 x + y + z = 301 311 384 Placement Index : (x + y + z )/N P1=0.74 P2=0.82 P3=0.88 Average placement= (P1 + P2 + P3)/3 0.81 Assessment Points = 30 × average placement 24.40 Placement, Higher studies & Entrepreneurship CRITERION 4 30
  • 31. Professional Societies and Chapters No of Students Benefitted CRITERION 4 31
  • 32. Publications in Magazines & Newsletter Details of “EEEA Review” – Magazine Samples  EEEA REVIEW by EEE Association  E=MC2 (e-magazine on computing and conservation of energy) by SRMIST ENFUSE chapter  Publish their minor/ major projects works in refereed National and International Journals Publication of the Students works in Journals CRITERION 4 32
  • 33. 33 Students Awards/Achievements- Inter Institute Events International Events National Events 2020 2019 2018 2017 Total Inter State 77 39 16 31 163 Intra State 27 16 8 10 61 Total 104 55 24 41 224 CRITERION 4 Total Achievements: 29 International: 12 National: 17
  • 34. 34 Student Faculty Ratio (SFR) For sanctioned intake, Average SFR=18.76 For actual intake, Average SFR = 17.04 SFR Calculation for Sanctioned Intake No. of Students = Sanctioned Intake + Actual admitted lateral entry students (Year) CAY 2019-2020 CAYm1 2018-2019 CAYm2 2017-2018 U1.1 (II year) 360 310+1 460 U1.2 (III year) 310+1 460 460+3 U1.3 (IV year) 460 460+3 450 UG1(B.Tech. EEE) 1130+1=1131 1230+4=1234 1370+3=1373 P1.1 (PED) 20 30 20 P1.2 (PED) 30 20 20 PG1 (M.Tech. PED) 50 50 40 P2.1 (PS) 20 30 20 P2.2 (PS) 30 20 20 PG2 (M.Tech. PS) 50 50 40 Total No. of Students in the Department (S) S1=1231 S2=1334 S3= 1453 No. of Faculty in the Department (F) F1=69 F2=73 F3=72 Student Faculty Ration (SFR) SFR1=S1/F1 =17.84 SFR2= S2/F2= 18.27 SFR3= S3/F3= 20.18 Average SFR SFR= (SFR1+SFR2+SFR3)/3=18.76 CRITERION 5
  • 35. 35 Cadre Ratio Marks = 𝐴𝐹1 + 𝐴𝐹2 ∗ 0.6 + 𝐴𝐹3 ∗ 0.4 ∗ 10 = (0.38 +0.43+0.52) *10 = 17 𝑅𝐹1 𝑅𝐹2 𝑅𝐹3 Faculty Qualification for Academic year 2020-21  Total Number of Faculty- 71  Total Number of Faculty with Ph.D.- 50  Total Number of Faculty with M. Tech- 21  Percentage of faculty with Ph.D. = 70.4%  No. of regular faculty with Ph.D. is increasing gradually Academic Year No. of regular faculty with Ph. D No. of regular faculty with M. Tech 2020-2021 50 21 2019-2020 30 39 2018-2019 26 47 2017-2018 17 55 Faculty Qualification Faculty Information Faculty Cadre Proportion Faculty Retention Description 2018-19 (CAYm1) 2019-20 (CAY) No of Faculty Retained 65 64 Total No of Faculty 71 71 % of Faculty Retained 92 90 Average Faculty Retention : 91% Visiting/Adjunct Faculty CRITERION 5
  • 36. PSO 1: Ability to perform in a Global & Industrial Perspective PSO 2: Ability to acquire Skills and are Career ready PSO 3: Ability to apply Energy Safety and Practices Program Specific Criteria Mapped with Faculty Competencies 18.4% 8% 20.8% 22% 20.7% 10.1% Area of specialization Electronics Power Systems Control systems and robotics Machines and drives Sustainable Energy Resources AI based Techniques PSO Elect PS CS&R MD SER AIT PSO 1 H H H H H H PSO 2 H H H H H H PSO 3 -- M L -- M L Relation between PSO & Area of specialization Elect: Electronics, PS=Power Systems, CS&R= Control System and Robotics, MD= Machines and Drives, SER= Sustainable Energy Resources, AIT= Artificial based Techniques Faculty Competencies in Correlation to Program Specific Criteria CRITERION 5 Program Specific Outcomes 36
  • 37.  ICT course in collaboration with IIT Bombay -Bodhi Tree  A SAFE platform for attendance and class test  MOODLE platform- SRMIST FIIP EDAC Engineering LTD NIOT, Chennai KONE Elevator India Pvt Ltd, Chennai National Instruments Bharathiya Nabhikiya Vidyut Nigam LTD ID TECH Solutions PVT LTD National Institute of Wind Energy Totally 19 faculties participated in Faculty Industry Immersion Program (FIIP) scheme in various industries. Tamilnadu Cement Corporation LTD Innovation Introduced in Classroom Teaching Innovations through Interaction with Industry Sample of uploaded resources in Moodle Platform Innovations -Faculty in Teaching and Learning CRITERION 5 37
  • 38. Innovation through Organizing/Arranging Workshops/STTP Academic Year No. of STTP/Workshop organized No. of Guest lectures, webinars arranged 2019-20 5 32 2018-19 4 7 2017-18 3 5 STTP Workshop Webinar Sample Works available for Peer Review- Website and Social Media (YouTube) • The content of the course materials can be assessed by everyone and can be used for further development. • Sample courses are 18EES101J - Basic Electrical And Electronics Engineering, 15EE305J-Microcontrollers, 18EEC205J- Electrical Machines • Faculty publications are also available in Research gate. • Developed the virtual lab for the laboratory “Power system Simulation Lab” during the academic year 2020-2021, in PALS IIT VLAB platform. Innovations in Teaching and Learning CRITERION 5 38
  • 39. Academic Year Number of FDP/STTP Attended Number of Days Attended Number of Online Courses Attended 2018-2019 148 411 131 2017-2018 112 822 62 2016-2017 95 298 52 Total: 355 1531 245 Sample FDP and NPTEL Certificates Types of Program No of Participation MHRD/AICTE/ SERB /UGC 31 Coursera 83 NPTEL 92 Edx 18 Edapt 09 Tata Steel 14 Others 29 Faculty Participation in FDPs CRITERION 5 39
  • 40. Academic Research Total Paper Publications Ph.D. Details Assessment Period Current status No. of Research Supervisor 26 44 No. of Research Scholar 76 125 Ph.D. Awarded 22 45 CRITERION 5 • Total No. of papers published during assessment period- 366 • No. of Scopus publications- 256 • No. of SCI publications- 110 • No. of Book chapters- 40 • Highest Scopus citation of the faculty in the Dept- 1330 • Department Total Scopus citation - 5009 • Highest h-index- 16 Research Accomplishment 118 194 30 63 54 17 37 88 131 2017 -18 2018 -19 2019 -20 NO. OF PUBLICATIONS ACADEMIC YEAR FACULTY PUBLICATION DETAILS Total SCI Scopus 40
  • 41. DST SERB-TARE 1 SRMIST 2 DST SERB CORE RESEARCH GRANT 3 DST SERB-TARE 4 5 IE(I) Project Funding 6 Project Funding Rs. 75 L & 27L 1.02C Teachers Association for Research Excellence Grant Rs.1830000 Optimal Energy Management in ship microgrid with PV SRMIST Grant Rs.1599290 Building automation systems in smart building Core Re.search Grant Rs.3823732 Development of low cost, Easy to install, high performance indigenous PV powered IWPT charging system for light duty electric vehicle Teachers Association for Research Excellence Grant Rs.1830000 Design and Development of Resilient building integrated PV system grid connected system Dr. J.Preetha Roselyn Associate Prof/EEE Dr. C.Bharati Raja Associate Prof/EEE Dr. S.Padmini Assistant Prof/EEE SRMIST Grant Rs.318969 SRMEXPLOROVER IE(I) Grant Rs.15000 Microbial fuel cell based large scale sustainable energy with waste management SRM Selective excellence scheme Dr. J.Divya Navamani Assistant Prof/EEE Dr. M.Jagabar Sathik Associate Prof/EEE Dr. R.Sridhar Associate Prof/EEE Dr. A.Geetha Assistant Prof/EEE 7 SRM Grant Rs.878000 1.Range extended hybrid electric vehicle 2.Design and Development of hybrid PV water pumping system 3.Development of new small scale wind turbine Sponsored Research CRITERION 5 SRMIST
  • 42. 42 Development Activities Instructional Materials Research Lab CRITERION 5 Patent / Product Development Working Models Developed
  • 43. 43 Consultancy Services CRITERION 5 Academic year Project Duration Funding Agency Amount (INR) 2018-19 Efficient Transformerless low-cost Microgrid inverters with Halide Perovskite solar panels 1 year CORRIT Energy and Infra 5,00,000 2018-19 Energy, power quality and thermal audit 6 months Brite Brothers Ltd 60,000 2017-18 Temasek polytechnic 1 year AEC Business school, Singapore. 10,75,000 Advisory Services • Ramco Cement- Conducted energy audit and suggested ECM. • Kalleswary Refinery Ltd- Power loss detection using fluke 434 series II in UPS • GE Industrial Bangalore Technology Centre- Conducted energy audit and recommended suitable mitigation techniques. • Hablis Hotel-Conducted harmonic analysis and related measurements in the chiller plant. • Bhavani, IGCAR- Collaboration with scientists at IGCAR in the area of thermography for medical application. • National Instruments- Signed an MOU with NI systems to carry out research and development activities in academics
  • 44. 44 Laboratories Electrical Machines Lab I & II Measurement and Instruments Lab Power Electronics Lab Electronics Lab-I & II Microcontroller Lab Special Electrical Machines Lab Basic Electrical Workshop Lab Simulation Lab- 1, 2 & 3. Research Lab Renewable Energy Research Lab (RERL) Service report of Special Electrical Machines Lab Number of laboratories: 14 Number of Qualified Technical staff: 13 Number of attenders: 5 Special Electrical Machines Lab Power Electronics Lab Electrical Machines Lab-I Electrical Machines Lab-II Simulation Lab Measurement and Instrumentation Lab CRITERION 6
  • 45. 45 Special Laboratories and Utilization Research lab Renewable Energy research Lab Outcome of Lab Utilized Major Equipment CRITERION 6
  • 46. 46 CO, PO & PSO-Evaluation Method CO-PO-PEO Mapping CRITERION 7
  • 47. 47 PO and PSO Attainment -Documentation CRITERION 7 Batch (2015-2019) Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 Direct Attainment (DA) 2.33 2.06 2.3 2.53 2.24 1.52 1.96 2.24 2.39 2.44 2.39 2.4 1.79 1.94 1.61 Indirect Attainment (IDA) 2.77 2.48 2.62 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.70 2.16 2.26 1.93 Total PO/PSO Attainment (0.8*DA + 0.2*IDA) 2.42 2.14 2.36 2.55 2.26 1.55 1.98 2.31 2.48 2.52 2.48 2.46 1.86 2.00 1.67 Batch (2016-2020) Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 Direct Attainment (DA) 2.35 2.11 2.41 2.54 2.38 1.36 1.84 2.18 2.57 2.42 2.05 2.37 1.82 1.95 1.69 Indirect Attainment (IDA) 2.77 2.50 2.59 2.63 2.39 1.60 2.15 2.59 2.87 2.75 2.87 2.61 2.16 2.26 1.93 Total PO/PSO Attainment (0.8*DA + 0.2*IDA) 2.43 2.19 2.45 2.56 2.38 1.41 1.90 2.26 2.63 2.49 2.21 2.42 1.89 2.01 1.74 Batch (2017-2021) Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 Direct Attainment (DA) 2.14 1.9 2.3 2.39 2.34 1.49 1.9 2.4 2.69 2.48 2.69 2.42 1.72 1.84 1.73 Indirect Attainment (IDA) 2.68 2.53 2.53 2.45 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.70 2.16 2.26 1.93 Total PO/PSO Attainment (0.8*DA + 0.2*IDA) 2.25 2.03 2.35 2.40 2.35 1.52 1.95 2.44 2.73 2.55 2.73 2.48 1.81 1.92 1.77
  • 48. Target for PO Attainment CRITERION 7 Batch (2015-2019) Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PAM Average 2.77 2.6 2.64 2.63 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.7 2.25 2.33 2.16 75 % of PAM 2.07 1.95 1.98 1.97 1.79 1.23 1.61 1.94 2.15 2.13 2.15 2.02 1.68 1.75 1.62 Direct Attainment (DA) 2.33 2.06 2.3 2.53 2.24 1.52 1.96 2.24 2.39 2.44 2.39 2.4 1.79 1.94 1.61 48 Sample Analysis for PO Attainment
  • 49. Batch (2015-2019) Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PAM average 2.77 2.60 2.64 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.70 2.16 2.26 1.93 PO Attainment 2.33 2.06 2.3 2.53 2.24 1.52 1.96 2.24 2.39 2.44 2.39 2.4 1.79 1.94 1.61 PO Attainment (%) 84.12 79.23 87.12 96.93 95.32 92.12 94.23 86.49 83.57 85.92 83.57 88.89 82.82 85.91 83.48 Batch (2016-2020) Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PAM average 2.77 2.60 2.64 2.63 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.70 2.16 2.26 1.93 PO Attainment 2.35 2.11 2.41 2.54 2.38 1.36 1.84 2.18 2.57 2.42 2.05 2.37 1.82 1.95 1.69 PO Attainment (%) 84.84 81.15 91.29 96.58 99.58 82.42 85.58 84.17 89.55 85.21 71.43 87.78 84.21 86.36 87.63 Batch (2017-2021) Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PAM average 2.77 2.60 2.64 2.63 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.70 2.16 2.26 1.93 PO Attainment 2.14 1.9 2.3 2.39 2.34 1.49 1.9 2.4 2.69 2.48 2.69 2.42 1.72 1.84 1.73 PO Attainment (%) 77.26 73.08 87.12 90.87 97.91 90.30 88.37 92.66 93.73 87.32 93.73 89.63 79.58 81.49 89.70 PO/PSO Attainment - Index CRITERION 7 49
  • 50. Identification of Gap Analysis CRITERION 7 S.N o Course code Course title Target Attainment Attainment Gap 1 15EE204L Electrical Machines Laboratory I 1 1 0 2 15EC204J Linear Integrated Circuits 2 1.54 -0.46 3 15EE206 Digital System Design 1 1 0 4 15EE211 Control Systems 2 0.73 -1.27 5 15EE300 Comprehension 3 3 0 6 15EE305J Microcontrollers 2 2 0 50
  • 51. Academic audit (Check list) CRITERION 7 51
  • 53. 53 Improvement in Placement, Higher Studies and Entrepreneurship Year of graduation Total strength Placed students % of placement 2017 417 272 65 2018 390 242 62 2019 408 252 62 2020 450 288 64 SALARY PACKAGES IN CORE AND IT INDUSTRY DETAILS OF ENTREPRENEURS PLACEMENT STATISTICS CRITERION 7 PLACEMENT RECORD
  • 54. 54
  • 56. OBE Vision Mission PEOs POs COs OUTCOMES TEACHING-LEARNING PROCESS CONTINUOUS IMPROVEMENT Internal External ASSESSMENT METHODS • Cycle test, Assignment, surprise test • Lab assessment • Project: Review marks • End semester examination Feed backs • Course survey, graduating student survey, Alumni survey, employer survey, Parent survey Syllabus Pedagogical initiatives Collaborative learning Project based learning Learning through laboratory Outcome based Education (OBE) Monitoring and action plan Quality of learning Quality of teaching Learning outcomes OBE
  • 57. PEOs Mission 1 Mission 2 Mission 3 Consistency PEO1: Graduates are in a position to apply their knowledge acquired in Mathematics, Basic Sciences and Electrical and Electronics Engineering courses, to the solution of complex problems encountered in the modern Engineering practice. H (3) M (2) L (1) 1.Students apply their knowledge of basic mathematical and science to solve complex electrical problems. 2.The syllabus is constantly upgraded to be on par with global excellence which caters to latest trends in engineering technology and practices. 3.The industrial collaboration in practical technical training elevates the students to global standards PEO 2: Graduates learn and adapt themselves to the constantly evolving technology by pursuing higher studies. M (2) H (3) L (1) 1 Students are exposed to state-of-the-art technology through multi-disciplinary design projects, technical seminar and industrial training, which supplements in complex problem solving & design through meticulous practice & training. 2.Students apply the skills and knowledge acquired through these practices in minor & major projects. 3.The research problem dealt in major projects motivates the students to pursue higher studies in their respective domain. PEO3: Graduates are better employable and achieve success in their chosen areas of Electrical and Electronics Engineering and related fields. M (2) M (2) L (1) 1.Knowledge obtained on collaboration with industry through technical seminars, workshops, laboratory practices, technical internships etc refines the students, thus empowering them to be employable in core industries in Electrical & Electronics. 2.Software programming skills & hardware development done in major and minor projects equips the students in the field of Research & Development. PEO 4: Graduates are good leaders and managers by effectively communicating at both technical and interpersonal levels. L (1) L (1) H (3) 1. Communication & interpersonal skills of the students are continuously groomed through laboratory practices, seminar and project presentations. 2.Active participation and organizing technical and non technical events of Students equip them to manage and lead organisations in the future. 3.Life skill courses in the curriculum imparts the students the knowledge5o7f ethical responsibilities. Consistency of PEOs with Mission OBE(Plan)
  • 58. 58 Program Outcomes (POs) Graduate Attributes (GA) Program Specific Outcomes (PSOs) PO1:Engineerin g Knowledge PO2: Problem Analysis PO3: Design & Development PO4: Analysis, Design, Research PO5: Modern Tool Usage PO6: Society & Culture PO7: Environment & Sustainability PO8: Ethics PO9: Individual & Team Work PO10: Communication PO11: Project Mgt. & Finance PO12: Life Long Learning PSO1:Global & Industrial Perspective PSO2: Skills & Career ready PSO3:Energ y, Safety and Practice PEO - 1 H H H L M M PEO - 2 H H H H M PEO - 3 H H M H H M M M H PEO - 4 H H H L M Mapping of POs with PEOs Every course in the curriculum are mapped with COs ,POs and PSOs OBE(Plan)
  • 59. Collaborative learning Project based learning Conduct of lab courses Multidisciplinary design Club association activity Major project Minor project Seminar Experiment Record Adherence to Academic calendar Academic calendar Slot based timetable Industrial training Viva Model exam University practical Teaching-Learning Process OBE(Do)
  • 60. Pedagogical Initiatives - Content Delivery Google Class Room Bodhi Tree Safe platform Massive Open Online Courses (MOOCs) Moodle based LMS Invited Lectures Industrial Training / Internship Pedagogical Initiatives OBE(Do)
  • 61. PROGRAM OUTCOMES PO1: Engineering Knowledge PO2: ProblemAnalysis PO3: Design/Development of Solutions PO4: Conduct Investigations of Complex Problems PO5: Modern Tool Usage PO6: The Engineer and Society PO7: Environment and Sustainability PO8: Ethics PO9: Individual and Team Work PO10: Communication PO11: Project Management and Finance PO12: Life-long Learning 61 PROGRAM SPECIFIC OUTCOMES PSO1: Ability to perform in a Global & Industrial Perspective PSO2: Ability to acquire Skills and are Career ready PSO3: Ability to Utilize Energy, Safety and Practices Course Outcomes (COs), Program Outcomes (POs) & Program Specific Outcomes (PSOs) SAMPLE COURSE OUTCOME (2015R) COURSE: DIGITAL SYSTEM DESIGN (15EE206) CO1: Understand the concept of digital logic circuits CO2: Design combinational and sequential logic circuits CO3: Learn the concepts of memory devices, VHDL OBE(Check)
  • 62. 62 CO – PO MAPPING IN SYLLABUS COURSE ARTICULATION MATRIX 15EE206 Digital System Design Course Code Course Outcome (CO) PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 15EE206 CO1 3 - - - - - - - - - - - 1 - - CO2 3 2 2 - - 1 1 - - - - - 1 - - CO3 3 - - - 1 1 1 - - - - - - 2 - Average 3 2 2 - 1 1 1 - - - - - 1 2 - PROGRAM ARTICULATION MATRIX Course Code PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO 1 0 P O 1 1 P O 1 2 PSO 1 PS O 2 PS O 3 15EE206 3 2 2 - 1 1 1 - - - - - 1 2 - Wi = Σ (COj) /No of Mapped COs (i=1 to15 and j= 1 to Max CO) (where, Wi is the Weight Factor for POs & PSOs) CO-PO in Syllabus OBE(Check)
  • 63. Program Articulation Matrix (PAM) OBE(Check) 63
  • 64. Course Articulation Matrix (CAM) OBE(Check) 64
  • 65. 15EE206 Digital System Design Course Code Course Outcome (CO) PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 15EE206 15EE206.1 3 - - - - - - - - - - - 1 - - 15EE206.2 3 2 2 - - 1 1 - - - - - 1 - - 15EE206.3 3 - - - 1 1 1 - - - - - - 2 - 15EE206 C O1 PO1 3 Mapped strongly as all the students acquire knowledge on digital logic circuits CO2 PO1 3 Mapped substantially as all the students gain knowledge on combinational and sequential logic circuits PO2 2 Mapped moderately as all the students gain ability to solve and formulate combinational and sequential logic circuits PO3 2 Mapped moderately as all the students gain ability to design combinational and sequential logic circuits PO6 1 Mapped as students obtain the impact of implementation of combinational and sequential logic circuits in practical uses. PO7 1 Mapped as the students understand the impact of combinational and sequential logic circuits in Engineering practice. CO3 PO1 3 Mapped substantially as all the students gain knowledge on the concepts of memory devices and VHDL PO5 1 Mapped as students implement modern tools for memory devices PO6 1 Mapped as the students understand the implementation of memory devices in Engineering practice. PO7 1 Mapped as the students understand the impact of digital solution for the ever-changing environment CO-PSO JUSTIFICATION CO-PO JUSTIFICATION 15EE206 CO1 PSO1 1 Mapped as all the students understand the implementation of digital logic circuits in industry and practical applications. CO2 PSO1 1 Mapped as all the students gain knowledge on combinational and sequential logic circuits in applied Engineering sectors. CO3 PSO2 1 Mapped as all the students gain knowledge on memory devices in applied Engineering sectors. CO-PO/PSO Mapping Justification OBE(Check) 65
  • 66. Assessment Tools for Course Outcomes (COs) OBE(Check) 66
  • 67. CO Marks Computation & Attainment Level Calculation of CO marks for all COs for all students in the respective class is based on the course evaluation plan. CO marks = Σ{(Marks obtained/Maximum Marks) * (Weightage of respective CO)} Calculate the % of students who scored greater than or equal to set target mark for internal assessment % of students = {(Number of students who scored greater than or equal to set target mark /Total number of students)*100} To calculate the numerator, the below equation is used Students scored greater than or equal to set target mark = CO marks obtained/respective total CO value from the course evaluation plan * 100 >= set target SAMPLE CO MARKS CALCULATION SHEET CO ATTAINMENT LEVEL DEFINITION OBE(Check) % of students - Target marks range Level 0 59 0 60 69 1 70 79 2 80 100 3 67
  • 68. CO Indirect Assessment – Course Feedback Survey OBE(Check) 68
  • 69. CO Attainment Table OBE(Check) 69 S.NO. COURSE CODE COURSE NAME CO1 CO2 CO3 CO4 CO5 1 15EE206 Digital System Design 2.4 1.5 3 - - 2 15EE209L Analog and Digital Circuits Laboratory 3 3 3 3 - 3 15EE211 Control Systems 0.88 1.2 0.97 1.3 - 4 15EE212L Measurements and Control Systems Laboratory 3 3 3 - - 5 15EE301J Power Electronics 3 3 3 - - 6 15EE303 Discrete Transforms and Signal Processing 1.7 2.7 1.6 2.1 3 7 15EE305J Microcontrollers 3 3 3 - - 8 15EE306M Multi-Disciplinary Design 3 3 3 3 - 9 15EE401 Solid State Drives 3 3 3 - - 10 15EE496L Major Project 3 3 3 3 3
  • 70. PO/PSO Evaluation Process OBE(Check) 70
  • 71. Questions mapped with POs/PSOs Sample Format Questions mapped with POs/PSOs Sample Format PO/PSO Indirect Assessment Graduate Exit and Parent Survey OBE(Check) 71
  • 72. 72 Questions mapped with POs/PSOs Alumni Survey Questions mapped with POs/PSOs Employer Survey OBE(Check) PO/PSO Indirect Assessment Alumni and Employer Survey
  • 73. 73 PO/PSO Attainment Table PO/PSO Indirect Attainment OBE(Check) S.NO. COURSE CODE COURSE NAME PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 1 15EE206 Digital System Design 2.3 1 1 - 1 0.75 0.75 - - - - - 0.65 2 - 2 15EE209L Analog and Digital Circuits Laboratory 3 2.67 2.75 2 - - - - - - - - 2 2 - 3 15EE211 Control Systems 1.09 0.72 1.09 - 0.73 0.36 - - - - - - 1.09 1.16 0.38 4 15EE212L Measurements and Control Systems Laboratory 3 - - 1.67 - 1 - - - - - - 1 2 - 5 15EE301J Power Electronics 3 3 - - - 1 1 - - - - - 2 2 - 6 15EE303 Discrete Transforms and Signal Processing 2.22 2.13 1.04 - - 0.62 1 - - - - - 1.35 0.74 - 7 15EE305J Microcontrollers 3 2 2 - 2 - - - - - - - 3 3 - 8 15EE306M Multi-Disciplinary Design 3 2 3 - - - - 1 - - - 1.5 3 3 3 9 15EE401 Solid State Drives 3 2 2 - - 1 1 - - - - - 2 2 - 10 15EE496L Major Project 3 3 3 - - 3 - 3 3 3 3 3 3 3 3 INDIRECT ASSESSMENT TOOL PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PO INDIRECT ATTAINMENT 3 2.86 2.98 3 3 3 3 3 3 3 3 3 3 3 3 PAM average 2.77 2.60 2.64 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.70 2.16 2.26 1.93 PO INDIRECT ATTAINMENT (on PAM base) 2.77 2.48 2.62 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.7 2.161 2.258 1.929
  • 74. 74 Batch (2015-2019) Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PAM average 2.77 2.60 2.64 2.61 2.35 1.65 2.08 2.59 2.86 2.84 2.86 2.70 2.16 2.26 1.93 PO Attainment 2.33 2.06 2.3 2.53 2.24 1.52 1.96 2.24 2.39 2.44 2.39 2.4 1.79 1.94 1.61 PO Attainment (%) 84.12 79.23 87.12 96.93 95.32 92.12 94.23 86.49 83.57 85.92 83.57 88.89 82.82 85.91 83.48 Batch (2016-2020) Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PAM average 2.77 2.60 2.64 2.63 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.70 2.16 2.26 1.93 PO Attainment 2.35 2.11 2.41 2.54 2.38 1.36 1.84 2.18 2.57 2.42 2.05 2.37 1.82 1.95 1.69 PO Attainment (%) 84.84 81.15 91.29 96.58 99.58 82.42 85.58 84.17 89.55 85.21 71.43 87.78 84.21 86.36 87.63 Batch (2017-2021) Assessment Methods PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PAM average 2.77 2.60 2.64 2.63 2.39 1.65 2.15 2.59 2.87 2.84 2.87 2.70 2.16 2.26 1.93 PO Attainment 2.14 1.9 2.3 2.39 2.34 1.49 1.9 2.4 2.69 2.48 2.69 2.42 1.72 1.84 1.73 PO Attainment (%) 77.26 73.08 87.12 90.87 97.91 90.30 88.37 92.66 93.73 87.32 93.73 89.63 79.58 81.49 89.70 PO/PSO Attainment - Index OBE(Check)
  • 75. Process of identification of curriculum gaps • Mapping of POs and PSOs-Starting of the semester-Course committee meeting. • Subject handling faculty submits the deficiencies in attainment of PO’s and PSO’s in course committee meeting at the end of the semester. • Stake holder’s Survey-Gaps in the teaching learning process is identified. • In Faculty meeting along with AAMC members, the Consolidated report of gap analysis is discussed and plan of action is approved. • Follow-up action is implemented in the next academic year. Course committee meeting – Planning Course committee meeting – attainment analysis Faculty meeting Gap analysis discussion AAMC Approval Actions implemented in courses Next year PO attainment review OBE(Act)
  • 77. Action taken & Improvement in PO attainment OBE(Act) Sample Assignment 77
  • 78. Gap analysis-Course Committee Meeting OBE(Act)
  • 79. Plan of Action to Bridge the Gap & its Implementation Specific assignment, Tutorial classes Video lectures, Minor projects Design based competitions Flipped classroom, NPTEL courses Infrastructure Joint courses- Conduct additional experiments Industrial visit, Industrial Training Professional society activities Seminars, Guest lecture, Alumni talk Industrial visit 79 Video Lecture Specific assignment Design based competition OBE(Act)
  • 82. 82