Bus arbitration.

1. BUS ARBITRATION
SUBMITTED TO
SUBMITTED BY
SHASHANK SHARMA
SAIYAM AGRAWAL
(LECTURER of ECS-302) RAHUL
SINGH RAWAT
FET GKV

2. CONTENT
INTRODUCTION OF BUS
 BUS ARBITRATION
CATEGORIZED OF BUS ARBITRATION
 CENTRALIZATION ARBITRATION
 PROCESS OF CENTRALIZATION ARBITRATION
DISTRIBUTED ARBITRATION
PROCESS OF DISTRIBUTED ARBITRATION
NEEDS FOR BUS ARBITRATION
DIRECT MEMORY ACCESS
USE OF DIRECT MEMORY ACCESS

3. INTRODUCTION OF BUS
BUS is a common pathway connecting two or more devices.
DATA AND ADDRESS LINE:- Data, address and complex command
CONTROL LINES:- 1)-Signal request and acknowledgement.
2)-Indicate what type of information on data.
BUS TRANSITON CONSIST OF:-
1)- Master issuing the command (and Address) -request
2)-Slave receiving ( or sending the data) -action
3)-Defined by what transition does to memory-
-Input:- inputs data from the I/O device to the memory
-Output – outputs data from the memory to the I/O device
BUS
MASTE
R
BUS
SLAVE
CONTOL LINE:-MASTER INITATE REQUEST
DATA LINE :- DATA CAN GO EITHER
WAY

4. BUS ARBITRATION
Bus Arbitration is the process by which the next device
to become the bus master selected is selected and bus
mastership is transferred to it.tne selection of the bus
master take into account the need of various device by
establishing a priority system for gaining access to the
bus.
OR
Arbitration is the process when more than one module
controlling the bus. Example:-CPU & DMA Controller.
Only one module may control bus system at a time .

5. CATEGORIZED
It can be categorized into 2 parts-
1)CENTRALIZED
2)DISTRIBUTED

6. CENTRALIZED
ARBITRATION
It is a single hardware device for controlling bus
access.
It is a bus controller.
Bus arbitration represent.
It may be part of CPU or separate.
The processor is normally the bus master unless it
grant bus mastership to one of the DMA controller.

7. CENTRALIZATION
ABRITRATION
PROCESSO
R
DMA
CONTROLLE
R
1
DMA
CONTROLLER
2
BUS REQUEST
LINE
BUSY BUS
BG1 BG2

8. DISTRIBUTED
ARBITRATION
Each module may claim the bus.
Control logic is present on own module.
Bus arbitrator may be or not.
Decentralized arbitration has the advantage of
offering higher reliability because operation of the bus is
not dependent on any single device.

9. DISTRIBUTED
ARBITRATION
Bus
arbitrator
2
Ack
Req
Bus
arbitrator 1
Ack
Req
Bus
arbitrator
3
Ack
Req
Bus
arbitrator
4
Ack
Req
4x2
Priority encoder
2x4
Decoder
Bus
bus
y
line

10. NEEDS FOR BUS
ARBITRATION
Multiple devices may need to use the bus at the same time so
must have a way to arbitrate multiple requests
Bus arbitration schemes usually try to balance:
• Bus priority – the highest priority device should be serviced
first
• Fairness – even the lowest priority device should never be
completely locked out from the bus.
Bus arbitration schemes can be divided into four classes
• Daisy chain arbitration – see next slide
• Distributed arbitration by self-selection – each device
wanting the bus places a code indicating its identity on the
bus

11. DIRECT MEMORT ACCESS
(DMA)
A special control unit may be provided to allow of transfer of
block of data directly between an external device and the main
memory , without continuous intervention by the processor
.This approach is called DIRECT MEMORY ACCESS (DMA).
 To transfer large blocks of data at high speed, an alternative
approach is used .
DMA transfer are performed by a control unit that is a part of
the input or output device interface.
The DMA controller perform the function that would normally
be carried out by the processor when accessing the memory.

12. USE OF DMA CONTROLLER IN
COMPUTER
DISK OR DMA
CONTROLLER
PROCESSOR
DISK
DMA
CONTROLLE
R
KEYBOAR
D
PRINTE
R
NETWORK
INTRFACEDISK
MAIN MEOMERY
SYSTEM
BUS

13. BIBLOGRAPHY
 in Lecture of ECS-302 by Shri SHASHANK SHARMA sir.
Book “Computer system architecture” by M.MORRIS MANO.
Book “Computer organization” by CARL HAMACHER
,ZVONKO VRANSIC & SAFWAT ZAKY.
Ppt by JANIE IRWIN.

14. THANK YOU