Modes of Transfer (Computer Organization)

1. BY:
PULKIT ZAVERI – 161080107063
MOHIT AGARWAL – 161080107026
SEM : 4
BRANCH : COMPUTER

2. WHY ARE THEY USED ?
CPU merely executes instruction and accepts
data temporally from I/O devices.
Ultimate source and destination is memory.
Data transfer is handled in a variety of modes.

3. WHAT ARE THE DIFFERENT MODES?
Data transfer can be handled in one of Three
Modes:
 Programmed I/O
 Interrupt-Initiated I/O
 Direct Memory Access (DMA)

4. PROGRAMMED I/O
Each data item transfer is initiated by an I/O
instruction written in a computer program.
Transferring data under program control requires
constant monitoring of the peripheral by CPU.
In this method, the CPU stays in a program loop
until I/O unit is ready for data transfer.
This time-consuming process keeps the processor
needlessly busy.

5. An example of data transfer from an I/O device through
an interface into a CPU in given below:
I/O DeviceCPU
Data valid
Data accepted
Data bus
Interface
I/O Read
Data bus
Data Register
Status
Register
F
Address bus
I/O Write

6. INTERRUPT-INITIATED I/O
Instead of continuous monitoring of CPU, interface
will be informed to issue an interrupt request signal.
Meanwhile, CPU proceeds to execute another
program and the interface keeps monitoring the
device.
When device is ready for data transfer, it generates
interrupt request.
Here the CPU stops the task it is performing,
processes the data transfer then resumes the original
task.

8. TYPES OF INTERRUPTS
 There are various sources of interrupts, these could be both
internal or external :
• Program Interrupts : They are generated by some condition
that occurs as a result of an instruction execution.
• Timer Interrupts : They are generated within the processor,
and allow the OS to perform certain operations on regular
basis.
• I/O Interrupts : They are generated for initiation or completion
of I/O operation.
• Hardware Failure Interrupts : They are generated by failure,
such as power failure or memory parity error.

9. DIRECT MEMORY ACCESS (DMA)
Direct Memory Access (DMA) means CPU
grants I/O module authority to read from or
write to memory without involvement.
DMA module itself controls exchange of data
between main memory and the I/O device.
 CPU is only involved at the beginning and end
of the transfer and interrupted only after entire
block has been transferred.

10. DMA controller (DMAC) manages
the data transfers and arbitrates
access to the system bus.

11. DMA DATA TRANSFER MODES
 Data can be transferred in several different ways under
DMA control :
 DMA BlockTransfer : In this mode a block of data of arbitrary
length can be transferred in a single burst.
 Cycle Stealing Mode : Here, the DMA controller is allowed to use
the system bus to transfer one word at a time, after which it must
return control of the bus to CPU.
 Transparent DMA : In this mode DMA is allowed to steal only
those cycles when the CPU is not using system bus.