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Lecture Notes: EEEC6440315 Communication Systems - Digital Modulation
1. EEEC6440315 COMMUNICATION SYSTEMS
Digital Modulation
FACULTY OF ENGINEERING AND COMPUTER TECHNOLOGY
BENG (HONS) IN ELECTRICALAND ELECTRONIC ENGINEERING
Ravandran Muttiah BEng (Hons) MSc MIET
2. 1
Digital Radio
The property that distinguishes a digital radio system from a conventional
Amplitude Modulation (AM), Frequency Modulation (FM), or Phase
Modulation (PM) radio system is the nature of the modulating signal. Both
digital and analog radio systems use analog carriers; however, with analog
modulation, the modulating signal is analog, and with digital modulation,
the modulating signal is digital. However, that with both analog and digital
modulation, the original source information could have been either analog
or digital.
Figure 1 shows a simplified block diagram for a digital radio system. In the
transmitter, the precoder performs level conversion then encodes or groups
the incoming data into a control word that modulates the analog carrier. The
modulated carrier is shaped (i.e. filtered), amplified, then transmitted
through the transmission medium to the receiver. In the receiver, the
incoming signal is filtered, amplified, and then applied to the demodulator
circuit which reproduces the original source information. Clock and carrier-
recovery circuits remove carrier and clock timing information from the
incoming signal.
4. 3
Digital Amplitude Modulation
The simplest digital modulation technique is digital amplitude modulation,
which is simply double sideband, full carrier amplitude modulation where
the input modulating signal is a binary waveform. Mathematically, digital
amplitude modulation by a binary signal is,
π£am π‘ = 1 + π£m π‘
π΄
2
cos πcπ‘
where,
π£am π‘ = digital amplitude modulated wave
π΄
2
= unmodulated carrier amplitude (volts)
π£m π‘ = modulated binary signal (volts)
πc = carrier radian frequency (radians per second)
The modulating signal π£am π‘ is a normalised binary waveform, where
+ 1V = logic 1 and β1V = logic 0.
5. 4
Therefore for logic 1 input, π£m π‘ = +1, thus,
π£am π‘ = 1 + 1
π΄
2
cos πcπ‘
= π΄cos πcπ‘
and for a logic 0 input, π£m π‘ = β1, thus,
π£am π‘ = 1 β 1
π΄
2
cos πcπ‘
= 0
Thus, for 100% modulation π£am π‘ is either π΄cos πcπ‘ or 0. Hence, the carrier
is either βonβ or βoffβ, which is why digital amplitude modulation is commonly
referred to as On-Off Keying (OOK) modulation. Digital amplitude modulation
is sometimes called Continuous Waves (CW), because when the carrier is being
transmitted (i.e., on) it has a constant amplitude, constant frequency, and
constant phase.
6. 5
Figure 2 shows the input and output waveforms for a digital amplitude
modulation transmitter. An OOK waveform can be demodulated either
coherently or non-coherently with little difference in performance. The use of
amplitude modulated analog carriers to transport digital information is a
relatively low quality, low cost type of digital radio and is, therefore, seldom
used in high capacity, high performance communication systems.
Figure 2: Digital amplitude modulation.
Input binary
Output OOK waveform
7. 6
Frequency Shift Keying (FSK) Modulation
Binary FSK is a form of constant-amplitude angle modulation similar to
conventional Frequency Modulation (FM) except that the modulating signal is a
binary signal that varies between two discrete voltage levels rather than a
continuously changing analog waveform. The general expression for binary FSK
is,
π£fsk π‘ = π
ccos 2π πc + π£m π‘ βπ π‘
where,
π£fsk π‘ = binary FSK waveform
π
c = peak carrier amplitude (Volts)
πc = carrier center frequency (Hertz)
βπ = peak frequency deviation (Hertz)
π£m π‘ = binary input modulating signal Β±1
The peak shift in the carrier frequency βπ is proportional to the amplitude and
polarity of the binary input signal. The modulating signal π£m π‘ , is a
normalised binary waveform where a logic 1 = +1 and a logic 0 = β1 .
8. 7
Thus, for a logic 1 input, π£m π‘ =+1 and the above equation can be rewritten as,
π£fsk π‘ = π
ccos 2π πc + βπ π‘
For a logic 0 input, π£m π‘ = β1 and the above equation becomes,
π£fsk π‘ = π
ccos 2π πc β βπ π‘
With binary FSK, the carrier frequency is shifted (i.e. deviated) by the binary
input signal. As the binary input signal changes from a logic 0 to a logic 1, and
vice versa, the output frequency shifts between two frequencies: a mark or logic 1
frequency πm , and space or logic 0 frequency πs . The mark and space
frequencies are separated from the carrier frequency by the peak frequency
deviation πc Β± βπ . It is important to note, however, that the mark and space
frequencies are arbitrarily assigned, depending on systems design. Figure 3 shows
a binary input signal and FSK output waveform for an FSK modulator. As the
figure shows, as the binary input changes from a logic 1 to a logic 0 and vice
versa, the FSK output frequency changes from πm to πs, and vice versa. In figure
3, the mark frequency is the higher frequency πc + βπ , and the space frequency
is the lower frequency πc β βπ .
10. 9
FSK Bit Rate And Baud
With binary FSK, there is a change in the output frequency each time the
logic condition of the binary input signal changes. Consequently, the output
rate of change is equal to the input rate of change. In digital modulation, the
rate of change at the input to the modulator is called the bit rate πb and
has the unit of bits per second (bps). The rate of change at the output of the
modulator is called baud, after J. M. E. Baudot.
Baud is often misunderstood and commonly confused with bit rate. Baud is
a rate of change and is equal to the reciprocal of the time of one output
signaling element. With FSK, the time of an output signaling element is the
minimum time either the mark or space frequency is outputted, which is
equal to the time of a single bit π‘b . As shown in figure 3, the output
changes from a mark frequency to a space frequency and vice versa at the
same rate that the input condition changes from logic 1 to a logic 0 and vice
versa. The minimum time that a mark frequency can be outputted equals the
time of one bit. Therefore, with binary FSK, the time of a signaling element
and the time of a bit rate are equal; thus, the input and output rates of
change are equal and the bit rate and baud must also be equal.
11. 10
Bandwidth Considerations Of FSK
The output of a FSK modulator is related to the binary input as shown in
figure 4 where a logic 0 corresponds to space frequency πs, a logic 1
corresponds to the mark frequency πm, and πc is the carrier frequency. The
peak frequency deviation is,
βπ =
πm β πs
2
The FSK consists of two pulsed sinusoidal waves of frequency πm and πs
which have frequency spectrums that are
sin π₯
π₯
functions. The peaks of the
power spectrum contain the bulk of the energy, the minimum bandwidth is,
π΅π = πs + πb β πm β πb
= πs β πm + 2πb
Since πs β πm equals 2βπ, the minimum bandwidth can be approximated as,
π΅π = 2βπ + 2πb
= 2 βπ + πb
12. 11
NRZ Binary Input FSK Output
FSK Modulator
0 1 0 1
π‘b π
m π
s
π
c
π
m π
s
π
c
π΅π
πm β
1
π‘b
π
s +
1
π‘b
Figure 4: FSK frequency spectrum.
π
c β βπ π
c + βπ
π΅π
13. 12
Example 1:
Determine (a) the peak frequency deviation, (b) the minimum bandwidth, and
(c) baud for an FSK signal with a mark frequency of 49 KHz, a space
frequency of 51 KHz, and an input bit rate of 2 Kbps.
Solution:
(a) The peak frequency deviation is found by substituting into the following
equation,
βπc =
πm β πs
2
=
49 KHz β 51 KHz
2
= 1 KHz
(b) The minimum bandwidth is found by substituting into the following
equation,
π΅ = 2 βπ + ππ = 2 1000 + 2000 = 6 KHz
(c) With FSK, the baud is equal to the bit rate, 2000.
14. 13
Binary Phase Shift Keying (BPSK) Modulation
With BPSK Modulation, two output phases are possible for a single carrier
frequency (binary meaning β2β). One output phase represents a logic 1 and
the other a logic 0. As the input digital signal changes state, the phase of the
output carrier shifts between two angle that are out of phase. BPSK is a
form of suppressed-carrier, squarewave modulation of a continuous wave
(CW) signal. Figure 5 shows a simplified block diagram of a BPSK
modulation process.
Binary Data
Input
Modulated
PSK Output
Reference Carrier Signal
Figure 5: BPSK modulator.
BPSK Modulator
15. Figure 6 shows the truth table, phasor diagram and constellation diagram for a BPSK
modulator.
Binary input Output phase
Logic 0
Logic 1
Figure 6(a): Truth table.
Logic 1
Logic 0
Figure 6(b): Phasor diagram.
14
+90Β°
cos πcπ‘
βcos πcπ‘
β90Β°
βsin πcπ‘
180Β°
sin πcπ‘
0Β°
0Β°
180Β°
20. 19
Example 2:
For a BPSK modulator with a carrier frequency of 70 MHz and an input bit rate of
10 Mbps, determine the maximum and minimum upper and lower side frequencies,
draw the output spectrum, determine the minimum Nyquist bandwidth, and
calculate the baud.
Solution:
Substituting into the following equation yields,
Output = sin πaπ‘ sin πcπ‘
= sin 2Ο 5 MHz π‘ sin 2Ο 70 MHz π‘
=
1
2
cos 2Ο 70 MHz β 5 MHz π‘ β
1
2
cos 2Ο 70 MHz + 5 MHz π‘
Lower side frequency Upper side frequency
21. 20
Minimum lower side frequency, LSF = 70 MHz β 5 MHz = 65 MHz
Maximum upper side frequency, USF = 70 MHz + 5 MHz = 75 MHz
Therefore, the output spectrum for the worst case binary input conditions is as
follows:
The minimum Nyquist bandwidth, πN = 75 MHz β 65 MHz = 10 MHz
and the baud = πb or 10 Megabaud.
π΅π = 10 MHz
65 MHz 70 MHz 75 MHz
(Suppressed)
22. A balanced modulator is a product modulator; the output signal is the product of
the two input signals. In a BPSK modulator, the carrier input signal is multiplied
by the binary data. If +1 V is assigned to a logic 1 and β1 V is assigned to a
logic 0, the input carrier sin πcπ‘ is multiplied by either a + or β1 .
Consequently, the output signal is either +1 sinπcπ‘ or β1 sinπcπ‘ ; the first
represents a signal that is in phase with the reference oscillator, the latter a signal
that is 180Β°
out of phase with the reference oscillator. Each time the input logic
condition changes, the output phase changes. Consequently, for BPSK, the output
rate change (baud) is equal to the input rate of change (bps), and the widest
output bandwidth occurs when the input binary data are a alternating 1/0
sequence. The fundamental frequency πa of an alternative 1/0 bit sequence is
equal to one-half of the bit rate πa/2 . Mathematically, the output of a BPSK
modulator is proportional to,
BPSK output = sin 2Οπaπ‘ Γ sin 2Οπcπ‘
where,
πa = maximum fundamental frequency of binary input (Hertz)
πc = reference carrier frequency (Hertz)
Bandwidth Considerations Of BPSK
21
23. Solving for the trig identity for the product of two sine functions,
1
2
cos 2Ο πc β πa π‘ β
1
2
cos πc + πa π‘
Thus, the minimum double-sided Nyquist bandwidth πΉN is,
πc + πa πc + πa
β πc+πa
2πa
or
βπc+πa
2πa
and because πa =
πb
2
where πb = input bit rate,
π΅π =
2πb
2
= πb
where π΅π is the minimum double-sided Nyquist bandwidth.
22
24. 23
Differential Binary Phase Shift Keying (DBPSK)
DBPSK is an alternative form of digital modulation where the
binary input information is contained in the difference between two
successive signaling elements rather than the absolute phase. With
DBPSK it is not necessary to recover a phase-coherent carrier.
Instead, a received signaling element is delayed by one signaling
element time slot and then compared with the next received
signaling element. The difference in the phase of the two signaling
elements determines the logic condition of the data.
25. 24
DBPSK Transmitter
Figure 10(a) shows a simplified DBPSK transmitter. An incoming
information bit is XNORed with the preceding bit prior to entering the
BPSK modulator (i.e. balanced modulator). For the first data bit, there
is no preceding bit with which to compare it. Therefore, an initial
reference bit is assumed. Figure 10(b) shows the relationship between
the input data, the XNOR output data, and the phase at the output of the
balanced modulator. If the initial reference bit is assumed a logic 1, the
output from the XNOR circuit is simply the complement of that shown.
The first data bit is XNORed with the reference bit. If they are the same,
the XNOR output is a logic 1; if they are different, the XNOR output is
a logic 0. The balanced modulator operates the same as a conventional
BPSK modulator; a logic 1 produces + sin πcπ‘ at the output and a logic
0 produces β sin πcπ‘ at the output.
26. 25
DBPSK Receiver
Figure 11(a) shows the block diagram and timing sequence for a
DBPSK receiver. The received signal is delayed by one bit time, then
compared with the next signaling element in the balanced modulator. If
they are the same, a logic 1 (+ voltage) is generated. If they are
different, a logic 0 (β voltage) is generated. If the reference phase is
incorrectly assumed, only the first demodulated bit is in error.
Differential encoding can be implemented with higher-than-binary
digital modulation schemes, although the differential algorithms are
much more complicated than for DBPSK.
The primary advantage of DBPSK is the simplicity with which it can be
implemented. With DBPSK, no carrier recovery circuit is needed. A
disadvantage of DBPSK is that it requires between 1dB and 3dB more
signal-to-noise ratio to achieve the same bit error rate as that of absolute
PSK.
28. 27
Balanced
Modulator
1-bit
delay
DBPSK
Input
Recovered
Data
Balanced modulator output
+ sin πcπ‘ + sin πcπ‘ = +
1
2
β
1
2
cos 2πcπ‘
β sin πcπ‘ β sin πcπ‘ = +
1
2
β
1
2
cos 2πcπ‘
β sin πcπ‘ + sin πcπ‘ = β
1
2
+
1
2
cos 2πcπ‘
(a)
DBPSK
Input
Phase
Recovered
Bit Stream 1 0 0
1
1 0
1 0 1 1 0 1
180Β°
0Β°
0Β° 0Β°
0Β°
180Β° 0Β°
180Β° 180Β° 180Β°
0Β°
0Β°
(Reference Phase)
(b)
Figure 11: DBPSK demodulator.
29. 28
M-Ary Encoding
M is simply a digit that represents the number of conditions or
combinations possible for a given number of binary variables. Binary
FSK and BPSK are M-ary systems where π = 2. With PSK system
with four possible output phases π = 4. If there are eight possible
output phases, π = 8, and so on. The number of output conditions,
π = log2 π
where,
π = number of bits encoded
π = number of output conditions possible with π bits
With binary FSK each input bit acts independently on the carrier,
producing one of two possible output frequencies.
30. 29
Thus,
π = log2 2
2π
= 2
converting to logs and solving for π,
log 2π
= log 2
π log 2 = log 2
π =
log 2
log 2
π = 1
With BPSK, each input bit also independently acts on the carrier,
therefore π = 1. If two bits are inputted, encoded together, and then
allowed to simultaneously modulate a carrier, the number of output
condition is,
π = 22
= 4
31. 30
The minimum bandwidth necessary to pass M-ary digitally modulated
carriers other than FSK (i.e. PSK) can be expressed as,
π΅π =
πb
log2 π
where,
πb = input bit rate (bits per second)
If N is substituted for log2 π, then,
π΅π =
πb
π
For M-ary PSK the absolute minimum system bandwidth is equal to the
input bit rate divided by the number of bits encoded or grouped together.
32. 31
Quaternary Phase Shift Keying (QPSK) Modulation
Quaternary phase shift keying (QPSK), or quadrature PSK as it is
sometimes called, is another form of angle-modulated, constant-
amplitude digital modulation. QPSK is an π-ary encoding technique
where π = 4 (hence the name βquaternaryβ, meaning β4β). With QPSK
four output phases are possible for a single carrier frequency. Because
there are four different output phases, there must be four different input
conditions. Because the digital input to a QPSK modulator is a binary
(base 2) signal, to produce four different input conditions, it takes more
than a single input bit. With two bits, there are four possible conditions:
00, 01, 10, and 11. Therefore, with QPSK, the binary input data are
combined into groups of two bits called dibits. Each dibit code generates
one of the four possible output phases. Therefore, for each two-bit dibit
clocked into the modulator, a single output changes occurs. Therefore,
the rate of change at the output (baud rate) is one-half of the input bit
rate.
33. 32
QPSK Transmitter
A block diagram of a QPSK modulator is shown in figure 12. Two bits (a
dibit) are clocked into the bit splitter. After both bits have been serially
inputted, they are simultaneously parallel outputted. One bit is directed
to the I channel and the other to the Q channel. The I bit modulates a
carrier that is in phase with the reference oscillator (hence, the name βIβ
for βin phaseβ channel), and the Q bit modulates a carrier that is 90Β°
out
of phase or in quadrature with the reference carrier (hence, the name βQβ
for βquadratureβ channel).
It can be seen that once a dibit has been split into the I and Q channels,
the operation is the same as in a BPSK modulator. Essentially, a QPSK
modulator is two BPSK modulators combined in parallel. Again, for a
logic 1 = +1 V and a logic 0 = β1 V, two phases are possible at the
output of the I balanced modulator (+ sin πcπ‘ and β sin πcπ‘), and two
phases are possible at the output of the Q balanced modulator (+ cos πcπ‘
and β cos πcπ‘). When the linear summer combines the two quadrature
(90Β°
out of phase) signals, there are four possible resultant phasors given
by these expressions: + sin πcπ‘ + cos πcπ‘ , + sin πcπ‘ β cos πcπ‘ ,
β sin πcπ‘ + cos πcπ‘, and β sin πcπ‘ β cos πcπ‘.
35. 34
In figure 13 and 14 it can be seen that with QPSK each of the four
possible output phasors has exactly the same amplitude. Therefore, the
binary information must be encoded entirely in the phase of the output
signal. This constant amplitude characteristic is the most important
characteristic of PSK that distinguishes it from Quadrature Amplitude
Modulation (QAM). Also from figure 13 it can be seen that the angular
separation between any two adjacent phasors in QPSK is 90Β°
. Therefore,
a QPSK signal can undergo almost a +45Β°
or β45Β°
shift in phase during
transmission and still retain the correct encoded information when
demodulated at the receiver. Figure 15 shows the output phase-versus-
time relationship for a QPSK modulator.
Binary Input QPSK
Q I Output Phase
0 0 βπππΒ°
0 1 βππΒ°
1 0 +πππΒ°
1 1 +ππΒ°
Table 1: Truth table.
36. 35
cos πc π‘
βcos πc π‘
sin πc π‘
0Β°
reference
βsin πc π‘
Q I
cos πc π‘ + sin πcπ‘
1 1
sin πcπ‘ + 45Β°
Q I
βcos πc π‘ + sin πcπ‘
0 1
sin πcπ‘ β 45Β°
Q I
βcos πc π‘ β sin πcπ‘
0 0
sin πcπ‘ β 135Β°
Q I
cos πc π‘ β sin πcπ‘
1 0
sin πcπ‘ + 135Β°
cos πc π‘
βcos πc π‘
sin πc π‘
βsin πc π‘
10 β’
00 β’
β’11
β’ 01
Figure 13: Phasor diagram. Figure 14: Constellation diagram.
37. 36
Figure 15: Output phase-versus-time relationship for a QPSK modulator.
Time
Dibit
Input
QPSK
Output
Phase
Q I
1 0
Q I
0 1
Q I
1 1
Q I
0 0
+135Β°
β45Β° +45Β° β135Β°
Degrees
38. 37
Bandwidth Considerations Of QPSK
With QPSK, because the input data are divided into two channels, the bit
rate in either the I or the Q channel is equal to one-half of the input data
rate (πb 2). Essentially, the bit splitter stretches the I and Q bits to twice
their input bit length. Consequently, the highest fundamental frequency
present at the data input to the I or the Q balanced modulator is equal to
one-fourth of the input data rate (one-half of πb 2 = πb 4). As a result,
the output of the I and Q balanced modulators requires a minimum
double-sided Nyquist bandwidth equal to one-half of the incoming bit
rate (πN = twice πb 4 = πb 2).
Thus, with QPSK, a bandwidth compression is realized (the minimum
bandwidth is less than the incoming bit rate). Also, because the QPSK
output signal does not change phase until two bits (a dibit) have been
clocked into the bit splitter, the fastest output rate of change (baud) is
also equal to one-half of the input bit rate. As with BPSK, the minimum
bandwidth and the baud are equal. The output of the balanced
modulators can be expressed mathematically as,
ouput = sin πaπ‘ sin πcπ‘
39. 38
where,
πaπ‘ = 2Ο
πb
4
π‘ and πcπ‘ = 2Οπcπ‘
Thus,
output = sin 2Ο
πb
4
π‘ sin 2Οπcπ‘
1
2
cos 2Ο πc β
πb
4
π‘ β
1
2
cos 2Ο πc +
πb
4
π‘
The output frequency spectrum extends from πc +
πb
4
to πc β
πb
4
and the
minimum bandwidth πN is,
πc +
πb
4
β πc β
πb
4
=
2πb
4
=
πb
2
modulating phase unmodulated carrier phase
40. 39
Example 3:
For a Quadrature Phase Shift Keying (QPSK) modulator with an input data
rate, πb equal to 10 Mbps and a carrier frequency of 70 MHz, determine the
minimum double sided Nyquist bandwidth, πN and the baud.
Solution:
The bit rate in both the I and Q channels is equal to one half of the
transmission bit rate or,
πbQ = πbI =
πb
2
=
10 Mbps
2
= 5 Mbps
The highest fundamental frequency presented to either balanced modulator
is,
πa =
πbQ
2
or
πbI
2
=
5 Mbps
2
= 2.5 MHz
41. 40
The output wave from each balanced modulator is,
sin 2Οπaπ‘ sin 2Οπcπ‘
1
2
cos 2Ο πc β πa π‘ β
1
2
cos 2Ο πc + πa π‘
1
2
cos 2Ο 70 β 2.5 MHz π‘ β
1
2
cos 2Ο 70 + 2.5 MHz π‘
1
2
cos 2Ο 67.5 MHz π‘ β
1
2
cos 2Ο 72.5 MHz π‘
The minimum Nyquist bandwidth, πN = 72.5 β 67.5 MHz = 5 MHz
The symbol rate equals the bandwidth, symbol rate = 5 Megabaud
42. 41
The output spectrum is as follows:
It can be seen that for the same input bit rate the minimum bandwidth
required to pass the output of the QPSK modulator is equal to one half of
that required for the BPSK modulator in Example 2.
The minimum bandwidth for the QPSK system in Example 3 can also be
determined by simply substituting into the equation,
π΅π =
πb
π
=
10 Mbps
2
= 5 MHz
π΅π = 5 MHz
67.5 MHz 70 MHz 72.5 MHz
(Suppressed)
43. 42
Probability Of Error And Bit Error Rate
Probability of error π π and Bit Error Rate (BER) are often used
interchangeably. π π is a theoretical expectation of the BER for a given
system. BER is an empirical record of a systemβs actual bit error performance.
If a system has a π π of 10β5
, this means that, you can expect one bit error in
every 100,000 bits transmitted
1
105 =
1
100,000
. If a system has a BER of 10β5
,
this means that in the past there was one bit error for every 100,000 bits
transmitted. A BER is measured, then compared with the expected probability
of error to evaluate a systemβs performance.
Probability of error is a function of the carrier-to-noise power ratio (or more
specifically, the average energy per bit-to-noise power density ratio) and the
number of possible encoding conditions used (M-ary). Carrier-to-noise power
ratio is the ratio of the average carrier power (the combined power of the
carrier and its associated sidebands) to the thermal noise power. Carrier power
can be stated in watts or dBm, where,
πΆ dBm = 10 log
πΆ watts
0.001
44. 43
Thermal noise power is expressed as,
π = πΎππ΅ watts
where,
πΎ = Boltzmannβs proportionality constant (1.38 Γ 10β23
Joules per Kelvin)
π = temperature (kelvin: 0 K = β273Β°
C, room temperature = 290 K)
π΅ = bandwidth (Hertz)
π dBm = 10 log
πΎππ΅
0.001
Carrier-to-noise power ratio is,
πΆ
π
=
πΆ
πΎππ΅
where,
πΆ = carrier power (watts)
45. 44
πΆ
π
dB = 10 log
πΆ
π
= πΆ dBm β π dBm
Energy per bit is simply the energy of a single bit of information. Energy per bit is,
πΈb = πΆπb
J
bit
where,
πb = time of a single bit (seconds)
πΈb dBJ = 10 log πΈb
and because πb =
1
πb
, where πb is the bit rate in bits per second, πΈb can be rewritten
as,
πΈb =
πΆ
πb
J
bit
46. 45
πΈb dBJ = 10 log
πΆ
πb
= 10 log πΆ β 10 log πb
Noise power density is the thermal noise power normalised to a 1 Hz bandwidth.
Therefore, Noise power density,
π0 =
π
π΅
W
Hz
π0 dBm = 10 log
π
0.001
β 10 log π΅
= π dBm β 10 log π΅
From π = πΎππ΅ and π0 =
π
π΅
W
Hz
yields,
π0 =
πΎππ΅
π΅
= πΎπ W
Hz
47. 46
π0 dBm = 10 log
πΎ
0.001
+ 10 log π
Energy per bit-to-noise power density ratio is,
πΈb
π0
=
πΆ πb
π π΅
=
πΆπ΅
ππb
=
πΆ
π
Γ
π΅
πb
where,
π΅
πb
= noise bandwidth-to-bit rate ratio.
πΈb
π0
dB = 10 log
πΆ
π
+ 10 log
π΅
πb
= 10 log πΈb β 10 log π0
48. 47
Example 4:
For a QPSK system and the given parameter, determine:
(a) Carrier power in dBm.
(b) Noise power in dBm.
(c) Noise power density in dBm.
(d) Energy per bit in dBJ.
(e) Carrier-to-noise power ratio in dB.
(f)
πΈb
π0
ratio.
πΆ = 10β12
W πb = 60 Kbps
π = 1.2 Γ 10β14
W B = 120 KHz
Solution:
(a) The carrier power in dBm is determined by substituting into equation,
πΆ dBm = 10log
πΆ watts
0.001
= 10log
10β12
0.001
= β90 dBm
49. 48
(b) The noise power in dBm is determined by substituting into equation,
π dBm = 10log
πΎππ΅
0.001
= 10log
1.2 Γ 10β14
0.001
= β109.2 dBm
(c) The noise power density is determined by substituting into equation,
π0 dBm = 10log
πΎ
0.001
+ 10 log π = β109.2 dBm β 10 log 120 KHz
= β160 dBm
(d) The energy per bit is determined by substituting into equation,
πΈb dBJ = 10log
πΆ
πb
= 10log
10β12
60 kbps
= β167.8 dBJ
50. 49
(e) The carrier-to-noise power is determined by substituting into equation,
πΆ
π
dB = 10 log
πΆ
π
= 10log
10β12
1.2 Γ 10β14
= 19.2 dB
(f) The energy per bit-to-noise density ratio is determined by substituting
into equation,
πΈb
π0
dB = 10 log
πΆ
π
+ 10 log
π΅
πb
= 19.2 + 10 log
120 KHz
60 Kbps
= 22.2 dB
51. 50
β’ The effect of distortion, noise and interference is less in a digital
communication system. This is because the disturbance must be large
enough to change the pulse from one state to other.
β’ Regenerative repeaters can be used at fixed distance along the link, to
identify and regenerate a pulse before it is degraded to an ambiguous state.
β’ Digital circuits are more reliable and cheaper.
β’ The hardware implementation is more flexible because of the use of
microprocessor, VLSI chips etc.
β’ Signal processing functions like encryption, compression can be employed to
maintain the secrecy of the information.
β’ Error detecting and error correction codes improve the system performance
by reducing the probability of error.
β’ The different type of signals such as data, telephone, television can be
treated as identical signals in transmission and switching in a digital
communication system.
β’ Can avoid signal jamming using spread spectrum technique.
Advantages Of Digital Communications
52. 51
Disadvantages Of Digital Communications
β’ Quantisation error.
β’ Every signal are not a digital in nature.
β’ High power consumption.
β’ The error introduced error due to quantisation process, cannot be
removed. Hence this error possess a problem for digital signals.
β’ Infinite bandwidth, bandwidth is inversely proportional to the time period
of the pulses.
β’ As pulse width reduces bandwidth requirement increases.
β’ For fast switching or fast speed communication, require to reduce the
time period of pulses or increase the frequency of pulses, this calls for
higher and higher bandwidth.
β’ Difficult transmission.
53. (1) Paul H. Young, Electronic Communication Techniques, 5th Edition,
Pearson, 2004.
References
52