Ac analysis of bjt and mosfet inverting amplifiers

AC Analysis of
BJT and MOSFET
Inverting Amplifiers
Assoc Prof Chang Chip Hong email: echchang@ntu.edu.sg
EE2002 Analog Electronics

Lesson Objectives
AC Analysis of BJT and MOSFET Inverting Amplifiers 2
At the end of this lesson, you should be able to:
• Draw small signal model for BJT and MOSFET
• Calculate the small signal parameters of BJT and MOSFET
• Construct AC equivalent circuit of BJT and MOSFET inverting amplifiers
• Calculate the following performance characteristics of C-E and C-S amplifiers
- Voltage gain
- Input resistance
- Output resistance

Hybrid-Pi Model of BJT
• This hybrid-pi small-signal model is
the intrinsic low-frequency
representation of the BJT.
• Small-signal parameters are
controlled by the Q-point and are
independent of geometry of BJT.
Transconductance:
Output resistance:
ic
gmvbe
ib
E
CB
vbe rp ro vce
40C
m C
T
I
g I
V
 
where 25 mV@25 CT
kT
V
q
  
Input resistance:
m
r
g
p


–
+
–
+
A CE A
o
C C
V V V
r
I I

  if

Equivalent Forms of Small-Signal
Model for BJT
Voltage-controlled current source gmvbe can be transformed into current-controlled
current source.
gmvbe
ib
E
CB
vbe
rp ro
ic
 ib
ib
E
CB
vbe rp ro
ic
Basic relationship ic=  ib is useful
for both dc and ac analysis when
BJT is in forward-active region.
be b
m be m b b
ce
c b b
o
v i r
g v g i r i
v
i i i
r
p
p 
 

 
  
–
+
–
+

VCC
E
Q
RC
RE
C1  
C2  
C3  
B
C
RB
RC
RI
vi
+
-
RL
RI
RB2
RB1
vi
+
-
Q
C
B
E RL
+
vo
-
1 2B B BR R R
• The ac equivalent circuit is
constructed by assuming that all
capacitances have zero
impedance at signal frequency and
dc voltage source is ac ground.
• Assume that Q-point has already
been calculated from DC analysis.
Hence, gm, rp , and ro of BJT can
be calculated.
Small Signal Analysis of C-E Amplifier
with Fully Bypass RE

EE2002 Analog Electronics AC Analysis of BJT and MOSFET Inverting Amplifiers 6
C-E Amplifier with Fully Bypass RE:
Voltage Gain
c o m be L
vt m L
b be be
v v g v R
A g R
v v v
-
    -
Terminal voltage gain between
base and collector is:
Overall voltage gain from source vi
to output voltage vo across RL is:
o c b b
v vt
i b i i
v v v v
A A
v v v v
    
RI
vi
+
- RB ro RL
+
vo
-
B C
E
rp
RC
gmvbe
+
vbe
-
0L C L
R r R R 
B
v m L
I B
R r
A g R
R R r
p
p
   -   
B
R rp

Input Resistance
C1  
VCC
1 2B B BR R R
RI
RB2
vi
Q
RB1
RC C2  
C3  
+
-
RL
Rin
vx
+
-
ix
RE
 x x B
x
in
x
B
v i R r
v
R
i
R r
p
p



RB rp ro RL
+
vo
-
B C
E
RC
gmvbe
+
vbe
-
B
R rp

Output Resistance
C1  
0
x x
x m be
C o
x x
be x
C o
v v
i g v
R r
v v
v i
R r
  
   
VCC
RI
Q
RB2
RB1 C2  
C3  
RL
Rour
1 2B B BR R R
vx
+
-
RB ro
RI
B C
E
rp RC
gmvbe
+
vbe
-
ix
RE
RC
vi
+
-
1
1 1x
out C o
x C o
out C
v
R R r
i R r
R R
-
 
    
 
 if

Example
Problem: Find voltage gain, input
and output resistances.
Given:  = 65, VA = 50 V
Find the Q-point from dc equivalent circuit:
 3 3
100 10 0.7 66 16 10 ( 5) 0B BI I     - 
3.71 μA
65 241 μA
66 245 μA
B
C B
E B
I
I I
I I

 
 
 5 10 k 241 μ 16 k 245 μ 5 0CEV-  - -  - - 
+5 V
10 k
voRout
RC
C3  
C1  
Rin
vi
+
–
220 k
RB
100 k
RE
16 k
330 
RI
–5 V
RL
C2  
+5 V
10 k
IC
VCE
+
–
IE
16 k
–5 V
100 k VBE
+
–
IB
3.67 VCEV 

AC Analysis of C-E Amplifier with
Fully Bypass RE
9.64 (223 10 220) 6.23 k
84.0
330 6.23 k
bein
v vt
I in be
vR
A A
R R v
 -     
   -   
     
40 241 μ 9.64 mSmg   
65
6.64 k
9.64 m
rp   
50 3.67
223 k
241 μ
or

  
100 k 6.64 k 6.23 kinR   
223 k 10 k 9.57 koutR   
330 
vi
+
-
100k
ro
220k
+
vo
-
B C
E
rp
10k
gmvbe
+
vbe
-
Rin
100k
223k
220k
B C
E
6.64k
10k
9.64mvbe9.64mvbe
Rout
100k
223k
330
B C
E
6.64k
10k
Small signal equivalent

Small Signal Parameters of MOSFET
• Since gate is insulated from channel
by gate-oxide, input resistance = .
• Small-signal parameters are
controlled by the Q-point.
• MOSFET transconductance is
geometry dependent.
   
  
2
1
2
1
n
D GS TN DS
D
m n GS TN DS
GS Q pt
K
i v V v
i
g K V V V
v


-
 - 

  - 

n n OX
W
K C
L
    
 
where
+
gmvgs
ig
S
DG
vgs ro
id
vds
–
+
–
2
2
1
1
D
m n D
GS TN
DS
o
D D
I
g K I
V V
V
r
I I


 
-

  if
1


Small Signal Analysis of C-S
Amplifier with Fully Bypass RS
VDD
S
• AC equivalent circuit is constructed by
assuming that all capacitances have zero
impedance at signal frequency and dc
voltage sources represent ac grounds. M
RD
RS
C1  
C2  
C3  
G
D
RG
RD
RI
vi
+
-
RL
RI
RG2
RG1
vi
+
-
D
MG
S RL
+
vo
-
1 2G G GR R R
vo
• The small signal parameters, gm and ro of
the MOSFET is calculated at the Q-point,
ID and VDS.

C-S Amplifier with Fully Bypass RS:
Voltage Gain
Terminal voltage gain between
gate and drain is:
Overall voltage gain from source vi
to output voltage vo across RL is:
RI
vi
+
-
RG ro RL
+
vo
-
G D
S
RD
gmvgs
+
vgs
-
0L D LR r R R 
m gs Ld
vt m L
g gs
g v Rv
A g R
v v
-
   -
g go o
v vt
i g i i
G
m L
I G
v vv v
A A
v v v v
R
g R
R R
    
 
 -  
 

Input Resistance
RG2
M
RG1
RD
RS
C2  
C3  
RL
Rin
C1  
RG ro RL
+
vo
-
G D
S
RD
gmvgs
+
vgs
-
1 2G G GR R R
VDD
RI
vi
+
-
x x G
x
in
x
G
v i R
v
R
i
R



vx
+
-
ix

Output Resistance
vi
+
-
VDD
C1  
Since vgs = 0, gmvgs = 0.
RI
RG2
RG1 C2  
Rour
RS
RD
RL
M
gmvgs
vx
+
-
RG ro
RI
G D
S
RD
+
vgs
-
ix
C3  
21 GG G
R R R
 x x D o
x
out D o
x
out D
v i R r
v
R R r
i
R R

 
 if

Example
Problem: Find voltage gain, input and
output resistances.
Given: Kn = 500 A/V2, VTN = 1V,
 = 0.0167 V–1
DC Analysis:
61
1
6
5 10
2 10
0.4
S
GS
D
DS
I
IV
V
V


  

5 , 2 , 250 μADS GS DV V V V I   
 
2500 μ
1
2
GSD VI  - (1)
 3
110 20 10DS D IV I -   (2)
+10 V
20 k
C3  
vo
+
–
Rout
100 k
RL
RD
RG3
1 M
RG2 2 M
RG1 2 M
C2  
C1  
10 k
RI
Rin
vi
+10 V
20 k
RG3
1 M
RG2
2 M
RG1
2 M
vDS
+
–
+
–
vGS
I1
ID
IG
RD

Example
   0.5 260 k 1 M 20 k 100 k 1 M
7.93
10 k 1 M
gsin
v vt
I in gs
m vR
A A
R R v
-   
   -     
2 2 1inR M M M  
2 500 μ 250 μ 0.5 mSm
g    
1
5
0.0167 260 k
250 μ
or

  
10k 
vi
+
-
2M
ro
100k
+
vo
-
G
D
S
1M
gmvgs
+
vgs
-
2M
20k
Rin
1M
260k
16.4k
G D
S
0.5mvgs
0.5mvgs
S
Rout
1M
260k
10k
G D
1M
20k
260 1 20 18.2outR k M k k  
16.4 k1 M
Small Signal Equivalent Circuit:

C-E Amplifier with Unbypass RE:
Terminal Voltage Gain
VCC
RB2
RB1
RC
RE2 C3  
RI
vi
+
-
RL
C2  
C1  
vo
RE1
Q
vi
+
- RB
RL
+
vo
-
RC
ro
B C
E
rp
gmvbe
+
vbe
-
RI
RE1
ic
L C LR R R 
1 1 11
c c L m be L m L
vt
b be e E be m be E m E
v i R g v R g R
A
v v i R v g v R g R
  - - -
   
  
ie
1 2B B BR R R

Input Resistance
vi
+
-
RI
 
 
1
1
1
1
b b b E
b
in E
b
v i r i R
v
R r R
i
p
p


  
    
Rin
vb
+
- RB
RL
+
vo
-
RC
ro
B C
E
rp
ib
+
vbe
-
RE1
(+1)ib
ib
Rin
in in BR R R
inR
RB
RL
+
vo
-
RC
ro
B C
E
rp
gmvbe
+
vbe
-
RE1
1 2B B BR R R

Overall Voltage Gain
+
vb
-
Rin
RB = RB1 || RB2
RL
+
vo
-
RC
ro
B C
E
rp
gmvbe
+
vbe
-
RE1
Rin
VCC
RB2
RB1
RC
RE2 C3  
RI
vi
+
-
RL
C2  
C1  
vo
RE1
Q
o o b in
v vt
i b i I in
v v v R
A A
v v v R R
    

vi
+
-
RI
Rin
vi
+
-
RI
+
vb
-
Rin

Output Resistance
Rth
RC
ro
B C
E
rp
gmvbe
+
vbe
-
RE1
vx
+
-
ix
Rout
1 2th I B BR R R R
ix
  1
be e
th
x th E
th
r
v v
r R
r
i r R R
r R
p
p
p
p
p
 
 -  
 
 -   
  1e x th Ev i r R Rp 
 x m bex o ev g v r vi -
current through ro
outR
RL
+
vo
-
RI
RB
RC
ro
B C
E
rp
gmvbe
+
vbe
-
RE1
1 2B B BR R R
Rout
vi
+
-

Output Resistance
 
  
  
1
1
x x m be o e
x m x th E o
th
x th E
v i g v r v
r
i g i r R R r
r R
i r R R
p
p
p
p
 - 
  
    
  
 Rth
ro
B C
E
rp
gmvbe
+
vbe
-
RE1
vx
+
-
ix
ix
out out CR R R
RC
Rout
  11x
out m th E o
x th
v r
R g r R R r
i r R
p
p
p
          
outR

C-S Amplifier with Unbypass RS:
Terminal Voltage Gain
VDD
RG2
RG1
RD
RS2 C3  
RI
vi
+
-
RL
C2  
C1  
vo
RS1
vi
+
- RG
RL
+
vo
-
RD
RI
RS1
id  gmvgs
L D LR R R 
1 1 11
m gs Ld d L m L
vt
g gs d S gs m gs S m S
g v Rv i R g R
A
v v i R v g v R g R
- - -
   
  
id
1 2G G GR R R
ro
G D
S
gmvgs
+
vgs
-
M

Input Resistance
RG = RG1 || RG1
RL
+
vo
-
RD
RS1
Rin
in GR R
ro
G D
S
gmvgs
+
vgs
-vi
+
-
RI
Rin
RG
RL
+
vo
-
RD
RS1
1 2G G GR R R
ro
G D
gmvgs
+
vgs
-

Overall Voltage Gain
VDD
RG = RG1 || RG2
RL
+
vo
-
RD
ro
G D
S
gmvgs
+
vgs
-
RS1
Rin
RG2
RG1
RD
RS2 C3  
RI
vi
+
-
RL
C2  
C1  
vo
RS1
vi
+
-
RI
go o in
v vt
i g i I in
vv v R
A A
v v v R R
    

Rin
vi
+
-
RI
+
vg
-
Rin
M

Output Resistance
Rth
RD
RS1
vx
+
-
ix
Rout
1 2th I G GR R R R
ix
1
10,
s x S
g gs s x S
v i R
v v v i R

  -  -
ro
G D
S
gmvgs
+
vgs
-
 1 1x x m x S o x Sv i g i R r i R  
 11x
out m S o
x
v
R g R r
i
   
out out DR R R
 x m gsx o sv g v r vi -
current through ro
outR
RL
+
vo
-
RI
RG
RD
RS1
1 2G G GR R R
ro
G D
gmvgs
+
vgs
-
Rout
vi
+
-

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