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A semantic model for VHDL-AMS
Natividad MartıĢnez Madrid, Peter T. Breuer, Carlos Delgado Kloos
Universidad Carlos III de Madrid
<nmadrid,ptb,cdk>@it.uc3m.es
CHARME ā€™97, MontreĢal, Canada - October 1997 1
Objectives ?
ā€¢ explain behaviour of VHDL-AMS processes
ā€“ not a detailed syntactic mapping
ā€“ provide sufficient primitives
ā€¢ present an underlying model that . . .
ā€“ extends existing model for VHDL
CHARME ā€™97, MontreĢal, Canada - October 1997 2
Content of the talk ?
ā€¢ Introduction
ā€¢ A process algebraic analysis
ā€¢ Semantics
ā€¢ The analog solver with example
CHARME ā€™97, MontreĢal, Canada - October 1997 3
Main idea ?
VHDL semantics analog extension
imperative
discrete-event
diff. equations
real time domain
declarative
continuous-time
ց ւ
INTEGRATION
CHARME ā€™97, MontreĢal, Canada - October 1997 4
Name space division & Properties ?
VARIABLES assigned
instantaneously
not scheduled
SIGNALS at least Ī“-delayed preemptively
scheduled
QUANTITIES assigned
instantaneously
governed by diff. eqns.
PROCESSES invariant invariant
CHARME ā€™97, MontreĢal, Canada - October 1997 5
Semantics of assignment ?
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11 "Forced" signal assignment
a <= 1 after 4
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a
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.
v =
x
.
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11 "Relaxed" quantity update
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CHARME ā€™97, MontreĢal, Canada - October 1997 6
Semantic Domains ?
WorldLine = Time ā†’ State
State = Id ā†’ V alue
VHDL Statements
Semantics = (WorldLine, Time) ā†” (WorldLine, Time)
Time = Int
VHDL-AMS Statements
Semantics = (EqnSet, WorldLine, Time) ā†” (EqnSet, WorldLine, Time)
Time = Real
CHARME ā€™97, MontreĢal, Canada - October 1997 7
Parallel decomposition ?
LRM view of basic VHDL compositionality:
ā€¢ processes in parallel (+ kernel)
ā€¢ process body loops continuously
ā€¢ imperative commands in process body run sequentially
Our view:
ā€¢ no kernel
CHARME ā€™97, MontreĢal, Canada - October 1997 8
VHDL-AMS: integer time ā†’ real time
Analog Solver
Process algebraic analysis ?
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CHARME ā€™97, MontreĢal, Canada - October 1997 9
Process algebraic analysis (II) ?
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CHARME ā€™97, MontreĢal, Canada - October 1997 10
Denotational semantics ?
S[a; b] = S[a]; S[b]
P[a; b] = P[a] āˆŖ S[a]; P[b]
S[while(true)do a end] = { }
P[while(true)do a end] = P[a] āˆŖ S[a]; P[while(true)do a end]
= ĀµR : Semantics . R = P[a] āˆŖ S[a]; R
S[a||b] = S[a] āˆ© S[b]
P[a||b] = P[a] āˆ© P[b]
CHARME ā€™97, MontreĢal, Canada - October 1997 11
Wait & Assignment semantics ?
Wait Semantics
(e, w0, t0)S[wait until p](e, w1, t1) = w0 = w1
āˆ§ wt1 |= p āˆ§ āˆ€t āˆˆ [t0, t1) . wt 6|= p
(e, w0, t0)P[wait until p](e, w1, t1) = w0 = w1
āˆ§ āˆ€t āˆˆ [t0, t1] . wt 6|= p
Assignment Semantics
(e, w0, t0)S[x ā‡ y after Ļ„](e, w1, t1) = t0 = t1
āˆ§ w1 = relax(e, t0)(force assign(w0))
P[x ā‡ y after Ļ„] = { }
CHARME ā€™97, MontreĢal, Canada - October 1997 12
Wait semantics ?
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00000000000000000000
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11111111111111111111
11111111111111111111
Generalized Wait
a
x
wait until a = 1
on signals -> discrete time
00000000000000000000
00000000000000000000
00000000000000000000
11111111111111111111
11111111111111111111
11111111111111111111
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wait until x >= 2/3
on quantities -> continuous time
CHARME ā€™97, MontreĢal, Canada - October 1997 13
Sequential composition ?
;
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.
v =
x
. a
= v
wait until x >= 2/3
wait until x >= 2/3
wait until x >= 2/3
a <= 1 after 4
CHARME ā€™97, MontreĢal, Canada - October 1997 14
Analog solution ?
Bouncing ball example
ds
dt = v
dv
dt = āˆ’g Ā± av2
Local approximation s(t) = 1
v(t) = āˆ’gt
origin at
s = 1
v = 0
t = 0
Linear approximation (s, v) = (s0, v0) + (t āˆ’ t0)(v0, āˆ’g Ā± av2
0)
Recursion
(s, v)(t0,s0,v0)(t) āˆ¼
ļ£±
ļ£²
ļ£³
(s0, v0) + (t āˆ’ t0)(v0, āˆ’g Ā± av2
0) t āˆˆ [t0, t1)
(s, v)(t1,s1,v1)(t)
s1 = s0 + v0āˆ†t
v1 = v0 + (āˆ’g Ā± av2
0)āˆ†t
t1 = t0 + āˆ†t
CHARME ā€™97, MontreĢal, Canada - October 1997 15
Example ?
proc [qty s := 1.0, v := 0.0, g := 9.8, a := 0.1 ]
ds/dt == v;
dv/dt == -g + if v<0 then a else -a end * v * v;
begin
wait until s < 0;
v := -v;
s := 0 ;
end
āˆ†t = 0.02
CHARME ā€™97, MontreĢal, Canada - October 1997 16
Example Cont. ?
proc [qty s := 1.0, v := 0.0, g := 9.8, a := 0.1 ]
ds/dt == v;
dv/dt == -g + if v<0 then a else -a end * v * v;
begin
wait until s < 0;
v := 1.4142 * (g * s + 0.5 * v * v)**0.5 ;
s := 0 ;
end
g āˆ— 0 + vā€²2
2 =
g āˆ— s + v2
2
āˆ†t = 0.06
CHARME ā€™97, MontreĢal, Canada - October 1997 17
Example Cont. (II) ?
Height
Speed
āˆ†t = 0.06
CHARME ā€™97, MontreĢal, Canada - October 1997 18
Unresolved areas ?
ā€¢ Implementation of the parallel composition of pro-
cesses if quantities are shared between processes
ā€¢ Errors in the analog solver may require us to rewrite
our program
ā€¢ The proper execution of the analog solver in Ī“ time
when the processes are in parallel
CHARME ā€™97, MontreĢal, Canada - October 1997 19
Conclusion ?
ā€¢ What? Extension of our VHDL semantics to cover
VHDL-AMS
ā€¢ How? Embedding of the VHDL semantics in a bigger,
continuous time domain, which contains an oracular
analog solver
ā€¢ Why? Clarify the draft standard document
CHARME ā€™97, MontreĢal, Canada - October 1997 20

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A Semantic Model For VHDL-AMS

  • 1. ? A semantic model for VHDL-AMS Natividad MartıĢnez Madrid, Peter T. Breuer, Carlos Delgado Kloos Universidad Carlos III de Madrid <nmadrid,ptb,cdk>@it.uc3m.es CHARME ā€™97, MontreĢal, Canada - October 1997 1
  • 2. Objectives ? ā€¢ explain behaviour of VHDL-AMS processes ā€“ not a detailed syntactic mapping ā€“ provide sufficient primitives ā€¢ present an underlying model that . . . ā€“ extends existing model for VHDL CHARME ā€™97, MontreĢal, Canada - October 1997 2
  • 3. Content of the talk ? ā€¢ Introduction ā€¢ A process algebraic analysis ā€¢ Semantics ā€¢ The analog solver with example CHARME ā€™97, MontreĢal, Canada - October 1997 3
  • 4. Main idea ? VHDL semantics analog extension imperative discrete-event diff. equations real time domain declarative continuous-time ց ւ INTEGRATION CHARME ā€™97, MontreĢal, Canada - October 1997 4
  • 5. Name space division & Properties ? VARIABLES assigned instantaneously not scheduled SIGNALS at least Ī“-delayed preemptively scheduled QUANTITIES assigned instantaneously governed by diff. eqns. PROCESSES invariant invariant CHARME ā€™97, MontreĢal, Canada - October 1997 5
  • 6. Semantics of assignment ? 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0000000000000000000000000 0000000000000000000000000 0000000000000000000000000 0000000000000000000000000 0000000000000000000000000 1111111111111111111111111 1111111111111111111111111 1111111111111111111111111 1111111111111111111111111 1111111111111111111111111 0000000000000000000000000 0000000000000000000000000 0000000000000000000000000 0000000000000000000000000 0000000000000000000000000 1111111111111111111111111 1111111111111111111111111 1111111111111111111111111 1111111111111111111111111 1111111111111111111111111 00000000000000000000000000 00000000000000000000000000 00000000000000000000000000 00000000000000000000000000 00000000000000000000000000 11111111111111111111111111 11111111111111111111111111 11111111111111111111111111 11111111111111111111111111 11111111111111111111111111 00000 11111 00 11 "Forced" signal assignment a <= 1 after 4 00000000000000000000 00000000000000000000 00000000000000000000 11111111111111111111 11111111111111111111 11111111111111111111 a 00000000000000000000000000 00000000000000000000000000 00000000000000000000000000 11111111111111111111111111 11111111111111111111111111 11111111111111111111111111 . v = x . 00000 11111 00 11 "Relaxed" quantity update 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 00000000000000000000000000 00000000000000000000000000 00000000000000000000000000 11111111111111111111111111 11111111111111111111111111 11111111111111111111111111 x a = v CHARME ā€™97, MontreĢal, Canada - October 1997 6
  • 7. Semantic Domains ? WorldLine = Time ā†’ State State = Id ā†’ V alue VHDL Statements Semantics = (WorldLine, Time) ā†” (WorldLine, Time) Time = Int VHDL-AMS Statements Semantics = (EqnSet, WorldLine, Time) ā†” (EqnSet, WorldLine, Time) Time = Real CHARME ā€™97, MontreĢal, Canada - October 1997 7
  • 8. Parallel decomposition ? LRM view of basic VHDL compositionality: ā€¢ processes in parallel (+ kernel) ā€¢ process body loops continuously ā€¢ imperative commands in process body run sequentially Our view: ā€¢ no kernel CHARME ā€™97, MontreĢal, Canada - October 1997 8
  • 9. VHDL-AMS: integer time ā†’ real time Analog Solver
  • 10. Process algebraic analysis ? 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 0000000000000000000000000000 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 1111111111111111111111111111 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 Ai Aj Ī£j Ī£i Ī£j Pjā€™ Piā€™ Pi Pj Ki Kj Ī£i 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 00000000000000000000000000000 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 11111111111111111111111111111 000000000000000000000000000000 000000000000000000000000000000 000000000000000000000000000000 000000000000000000000000000000 000000000000000000000000000000 000000000000000000000000000000 000000000000000000000000000000 000000000000000000000000000000 000000000000000000000000000000 000000000000000000000000000000 000000000000000000000000000000 000000000000000000000000000000 111111111111111111111111111111 111111111111111111111111111111 111111111111111111111111111111 111111111111111111111111111111 111111111111111111111111111111 111111111111111111111111111111 111111111111111111111111111111 111111111111111111111111111111 111111111111111111111111111111 111111111111111111111111111111 111111111111111111111111111111 111111111111111111111111111111 AS Ai Aj Ī£j Ī£i Ī£j Pjā€™ Piā€™ Pj Ki Kj Ī£i Pi CHARME ā€™97, MontreĢal, Canada - October 1997 9
  • 11. Process algebraic analysis (II) ? 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 000000000000000000000000000000000000000 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 111111111111111111111111111111111111111 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 11111111111111111111 i Ī£ Ī£j ā€™i Ī£ ā€™j Ī£ Kā€™i Ī£ Ī£ Q AS Q AS KAj KAi Pi Pj Ai Aj Kā€™j Pjā€™ Piā€™ CHARME ā€™97, MontreĢal, Canada - October 1997 10
  • 12. Denotational semantics ? S[a; b] = S[a]; S[b] P[a; b] = P[a] āˆŖ S[a]; P[b] S[while(true)do a end] = { } P[while(true)do a end] = P[a] āˆŖ S[a]; P[while(true)do a end] = ĀµR : Semantics . R = P[a] āˆŖ S[a]; R S[a||b] = S[a] āˆ© S[b] P[a||b] = P[a] āˆ© P[b] CHARME ā€™97, MontreĢal, Canada - October 1997 11
  • 13. Wait & Assignment semantics ? Wait Semantics (e, w0, t0)S[wait until p](e, w1, t1) = w0 = w1 āˆ§ wt1 |= p āˆ§ āˆ€t āˆˆ [t0, t1) . wt 6|= p (e, w0, t0)P[wait until p](e, w1, t1) = w0 = w1 āˆ§ āˆ€t āˆˆ [t0, t1] . wt 6|= p Assignment Semantics (e, w0, t0)S[x ā‡ y after Ļ„](e, w1, t1) = t0 = t1 āˆ§ w1 = relax(e, t0)(force assign(w0)) P[x ā‡ y after Ļ„] = { } CHARME ā€™97, MontreĢal, Canada - October 1997 12
  • 14. Wait semantics ? 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 00000000000000000000 00000000000000000000 00000000000000000000 11111111111111111111 11111111111111111111 11111111111111111111 Generalized Wait a x wait until a = 1 on signals -> discrete time 00000000000000000000 00000000000000000000 00000000000000000000 11111111111111111111 11111111111111111111 11111111111111111111 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 00000000000000000000 00000000000000000000 00000000000000000000 11111111111111111111 11111111111111111111 11111111111111111111 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 wait until x >= 2/3 on quantities -> continuous time CHARME ā€™97, MontreĢal, Canada - October 1997 13
  • 15. Sequential composition ? ; 000000000000 111111111111 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 a x 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 0000000000000 1111111111111 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 000000000000 111111111111 000000000000 111111111111 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 a x 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 0000000000000 1111111111111 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 000000000000 111111111111 000000000000 111111111111 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 a x 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 0000000000000 1111111111111 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 000000000000 111111111111 . v = x . a = v wait until x >= 2/3 wait until x >= 2/3 wait until x >= 2/3 a <= 1 after 4 CHARME ā€™97, MontreĢal, Canada - October 1997 14
  • 16. Analog solution ? Bouncing ball example ds dt = v dv dt = āˆ’g Ā± av2 Local approximation s(t) = 1 v(t) = āˆ’gt origin at s = 1 v = 0 t = 0 Linear approximation (s, v) = (s0, v0) + (t āˆ’ t0)(v0, āˆ’g Ā± av2 0) Recursion (s, v)(t0,s0,v0)(t) āˆ¼ ļ£± ļ£² ļ£³ (s0, v0) + (t āˆ’ t0)(v0, āˆ’g Ā± av2 0) t āˆˆ [t0, t1) (s, v)(t1,s1,v1)(t) s1 = s0 + v0āˆ†t v1 = v0 + (āˆ’g Ā± av2 0)āˆ†t t1 = t0 + āˆ†t CHARME ā€™97, MontreĢal, Canada - October 1997 15
  • 17. Example ? proc [qty s := 1.0, v := 0.0, g := 9.8, a := 0.1 ] ds/dt == v; dv/dt == -g + if v<0 then a else -a end * v * v; begin wait until s < 0; v := -v; s := 0 ; end āˆ†t = 0.02 CHARME ā€™97, MontreĢal, Canada - October 1997 16
  • 18. Example Cont. ? proc [qty s := 1.0, v := 0.0, g := 9.8, a := 0.1 ] ds/dt == v; dv/dt == -g + if v<0 then a else -a end * v * v; begin wait until s < 0; v := 1.4142 * (g * s + 0.5 * v * v)**0.5 ; s := 0 ; end g āˆ— 0 + vā€²2 2 = g āˆ— s + v2 2 āˆ†t = 0.06 CHARME ā€™97, MontreĢal, Canada - October 1997 17
  • 19. Example Cont. (II) ? Height Speed āˆ†t = 0.06 CHARME ā€™97, MontreĢal, Canada - October 1997 18
  • 20. Unresolved areas ? ā€¢ Implementation of the parallel composition of pro- cesses if quantities are shared between processes ā€¢ Errors in the analog solver may require us to rewrite our program ā€¢ The proper execution of the analog solver in Ī“ time when the processes are in parallel CHARME ā€™97, MontreĢal, Canada - October 1997 19
  • 21. Conclusion ? ā€¢ What? Extension of our VHDL semantics to cover VHDL-AMS ā€¢ How? Embedding of the VHDL semantics in a bigger, continuous time domain, which contains an oracular analog solver ā€¢ Why? Clarify the draft standard document CHARME ā€™97, MontreĢal, Canada - October 1997 20