The majority of electronic failures occur due to thermally induced stresses and strains caused by excessive differences in coefficients of thermal expansion (CTE) across materials. CTE mismatches occur in both 1st and 2nd level interconnects in electronics assemblies. -1st level interconnects connect the die to a substrate. -This substrate can be underfilled so there are both global and local CTE mismatches to consider. -2nd level interconnects connect the substrate, or package, to the printed circuit board (PCB). This would be considered a “board level” CTE mismatch. -Several stress and strain mitigation techniques exist including the use of conformal coating. The purpose of this presentation is to show that accelerated testing can be successfully used to predict solder joint and plated through hole (PTH) fatigue behavior.

1. Temperature Cycling and Fatigue in Electronics
Cheryl Tulkoff, ASQ CRE
DfR Solutions
Senior Member of the Technical Staff
ctulkoff@dfrsolutions.com
SMTAI 2014
Rosemont, Il
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2. Abstract
The majority of electronic failures occur due to thermally induced stresses and strains caused by excessive differences in coefficients of thermal expansion (CTE) across materials.
CTE mismatches occur in both 1st and 2nd level interconnects in electronics assemblies.
1st level interconnects connect the die to a substrate.
This substrate can be underfilled so there are both global and local CTE mismatches to consider.
2nd level interconnects connect the substrate, or package, to the printed circuit board (PCB). This would be considered a “board level” CTE mismatch.
Several stress and strain mitigation techniques exist including the use of conformal coating.
The purpose of this presentation is to show that accelerated testing can be successfully used to predict solder joint and plated through hole (PTH) fatigue behavior.
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3. Describes the potential for product failure when subjected to periodic changes in environmental stress or an overstress event that are thermal or mechanical in nature
What types of thermal or mechanical stress could cause failure in today’s electronics?
Focus in this presentation is temperature cycling
Thermo/Mechanical Reliability
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4. Due to Solar Loading
Temperature Cycling
Due to Power Dissipation
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5. Failures are not always about electrical overstress (EOS)!
Recent studies suggest that the majority of electronic failures are thermo-mechanically related*
Why Care About Temperature Cycling?
*Wunderle, B. and B. Michel, “Progress in Reliability Research in Micro and Nano Region”, Microelectronics and Reliability, V46, Issue 9-11, 2006.
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6. Why Care About Temperature Cycling?
Everything is Hot
Everything is Mobile
Everything is Everywhere
M2M Technology
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7. Use many different materials
Semiconductors, Ceramics, Metals, Polymers
Bond these different materials together
Plating, Solder, Adhesive
Materials expand/contract at different rates
Why Do Electronics Fail Under Temperature Cycling?
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8. Why do Solder Joints Fail under Temperature Cycling?
Two different expansion/contraction behaviors
Because solder is connecting two materials that are expanding / contracting at different rates (GLOBAL)
Because solder is expanding / contracting at a different rate than the material to which it is connected (LOCAL)
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9. Differential expansion and contraction introduces stress into the solder joint
Stress causes the solder to deform (aka, elastic and plastic strain)
Extent of this strain (that is, strain range or strain energy) tells us the lifetime of the solder joint
Higher the strain, the more the solder joint is damaged, the shorter the lifetime
Why do Solder Joints Fail under Temperature Cycling? (cont.)
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10. Knowing the critical drivers for solder joint fatigue allows development of predictive models and design rules
Drivers for Solder Joint Thermo- Mechanical Failures
CTE of Board
Elastic Modulus (Compliance) of Board
CTE of Component Elastic Modulus (Compliance) of Component Length of Component
Volume of Solder
Thickness of Solder
Solder Fatigue Properties
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11. CTE Mismatch
Effect of CTE Mismatch on Solder Joint Strain
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12. Typical Field Conditions
Field Conditions for Various Industries
IPC-SM-785, Guidelines for Accelerated Reliability Testing of Surface Mount Solder Attachments
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13. JESD47G Conditions Used in Accelerated Tests
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Stress-Test-Driven Qualification of Integrated Circuits, Nonhermetic package temperature cycling requirements

14. Mfg Provided Laminate Properties
Weave Illustration showing X and Y Fiber Orientation in FR-4
Isola 370HR Laminate and Prepreg Datasheet, http://www.isola- group.com/wp-content/uploads/2014/04/370HR-Laminate-and-Prepreg-Data- Sheet-Isola.pdf
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15. Out-of-plane CTE (CTEz) is almost always provided on the laminate datasheet
Sometimes in ppm/C above and below the Tg
Sometimes in % between 50-260C
Out-of-plane modulus (Ez) is almost never provided on the laminate datasheet
Requires calculation based on in-plane laminate properties, glass fiber properties, glass fiber volume fraction, and Rule-of-Mixtures / Halpin-Tsai models
Laminate Datasheets
1/Elaminate = Vepoxy/Eepoxy + Vfiber/Efiber
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16. Impact of Glass Style on Modulus of Elasticity & CTE
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17. Solder Joint Structure
Solder Joint Structure: BGAs, BTCs.
Filleted Solder Joint Structure
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18. Solder Fatigue Crack Formation
Grains grow as the solder joint is stressed
Growing grains cause micro-voids to appear at the grain boundaries
Micro-voids connect with each other to create micro-cracks and eventually macro-cracks
Solder joints in Electronics: Design for Reliability, Werner Engelmaier
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19. Knowing the drivers and how to predict provides powerful insight to the design process
Identify which designs and environments are at potential risk of solder joint fatigue
Quantitatively benchmark material changes
Develop accurate accelerated life tests
Thermo-Mechanical Design Rules
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20. Predictive Models – Physics of
Failure (PoF)
 Modified Engelmaier for Pb-free Solder (SAC305)
 Semi-empirical analytical approach
 Energy based fatigue
 Determine the strain range (Dg)
 C is a correction factor that is a function of dwell time
and temperature, LD is diagonal distance, a is
coefficient of thermal expansion (CTE), DT is
temperature cycle, h is solder joint height
T
h
L
C
s
D Dg  DaD
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21. Predictive Models – Physics of
Failure (PoF)(cont.)
 Determine the shear force applied to the solder joint
 F is shear force, L is length, E is elastic modulus, A is
the area, h is thickness, G is shear modulus, and a is edge
length of bond pad
 Subscripts: 1 is component, 2 is board, s is solder joint, c
is bond pad, and b is board
 Takes into consideration foundation stiffness and
both shear and axial loads
   


 


 


 




 D       
A G G a
h
A G
h
E A
L
E A
L
T L F
c c b
c
s s
s
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2
1 1 2 2
2 1

a a
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22. Predictive Models – Physics of
Failure (PoF)(cont.)
 Determine the strain energy dissipated by the
solder joint
 Calculate cycles-to-failure (N50), using energy
based fatigue models
  1 0.0019  N  DW f
s A
F
DW  0.5Dg 
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23. Glass Style Impact on Fatigue Life for 2512 Resistors
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24. Modeling Works
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25. 25
Thermal Cycling: SnPb vs. SAC
Where does SnPb outperform Pb-free?
Leadless, ceramic components
Leadless ceramic chip carriers (crystals, oscillators, resistor networks, etc.)
SMT resistors
Ceramic BGAs
Severe temperature cycles
-40 to 125ºC
-55 to 125ºC
Syed, Amkor
“Overview of Reliability Models and Data Needs,” Ahmer Syed, Amkor Technology

26. Time to 1% Failure for 2512 Resistors Attached with SAC and SnPb Solder
Time to 1% Failure for TSOPs attached with SAC and SnPb with Long Dwells (8 hours)
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•At small changes in temperature, SnPb fails first but performs better at higher temperature changes
•Longer dwell times allow more stress relaxation of solder and are thought to cause more damage as a result
•Longer dwell times at higher temperatures also cause more damage than long dwell times at low temperatures

27. The dominant failure mode in PTH tends to be barrel fatigue
Barrel fatigue is the circumferential cracking of the copper plating that forms the PTH wall
Driven by differential expansion between the copper plating (~17 ppm) and the out-of-plane CTE of the printed board (~70 ppm)
How do PTH’s Fail?
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28. Historically, two material properties of concern
Out-of-plane coefficient of thermal expansion (CTEz)
Out-of-plane elastic modulus (‘stiffness’)(Ez)
Key Assumption: No exposure to temperatures above the glass transition temperature (Tg)
The two material properties (CTE and E) are driven by choices in resin, glass style, and filler
PCB Materials and PTH Reliability
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29. Round Robin Reliability Evaluation of Small Diameter (<20 mil) Plated Through Holes in PWBs
Activity initiated by IPC and published in 1988
Objectives
Confirm sufficient reliability
Benchmark different test procedures
Evaluate influence of PTH design and plating (develop a model)
IPC TR-579
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30. IPC TR-579 (cont.)
Determine stress applied (σ)
Assumes perfectly elastic deformation when below yield strength (Sy)
Linear stress-strain relationship above Sy
h
PTV Height
d
PTV Diameter
t
Plating Thickness
E
Elastic Modululs
a
Coefficient of Thermal Expansion
T
Temperature (oC)
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31. IPC TR-579 (cont.)
Determine strain range (Δε)
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32. IPC-TR-579 (Calibration Constants)
Strain distribution factor, Kd (2.5 –5.0)
2.5 recommended
Quality index, KQ (0 –10)
Extraordinary (KQ = 10)
Superior (KQ = 8.7)
Good (KQ = 6.7)
Marginal (KQ = 4.8)
Poor (KQ = 3.5)
Some companies assume KQ = 5
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33. Influence of Glass Style on Properties
Glass Style
Modulus of Elasticity Ez (MPa)
CTEz (ppm)
1027
4380.4
73.9
1037
4380.4
73.9
106
4478.2
72.3
1067
4478.2
72.3
1035
4528.7
71.5
1078
4580.3
70.7
1080
4742.7
68.4
1086
4799.3
67.6
2313
5040.4
64.4
2113
5170.2
62.8
2116
5237.6
62.0
3313
5237.6
62.0
3070
5450.9
59.7
1647
5603.1
58.1
1651
5603.1
58.1
2165
5603.1
58.1
2157
5603.1
58.1
7628
5764.0
56.5
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34. Glass Style Influence on PTH Fatigue
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35. Majority of failures in electronics are caused by thermo-mechanical loads
Solder fatigue is the major failure mechanism
CTE mismatch between the board, component and attach materials creates stresses in the solder and the plating material
Experimental data for solder fatigue predictions and basic models can be used to predict solder fatigue for surface mount components
Conclusions
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36. PCB designers can change component placement and board laminate material to alleviate fatigue since component level design changes are usually not an option
PCB design also affects PTH reliability.
PCB designer influences PTH reliability by modifying drill diameters, laminate material, and plating parameters.
Solder and PTH fatigue are just two of the many effects of thermo-mechanical loads but they can be predicted and prevented
Conclusions
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37. Presenter Biography
Cheryl has over 20 years of experience in electronics manufacturing focusing on failure analysis and reliability. She is passionate about applying her unique background to enable her clients to maximize and accelerate product design and development while saving time, managing resources, and improving customer satisfaction.
Throughout her career, Cheryl has had extensive training experience and is a published author and a senior member of both ASQ and IEEE. She views teaching as a two-way process that enables her to impart her knowledge on to others as well as reinforce her own understanding and ability to explain complex concepts through student interaction. A passionate advocate of continued learning, Cheryl has taught electronics workshops that introduced her to numerous fascinating companies, people, and cultures.
Cheryl has served as chairman of the IEEE Central Texas Women in Engineering and IEEE Accelerated Stress Testing and Reliability sections and is an ASQ Certified Reliability Engineer, an SMTA Speaker of Distinction and serves on ASQ, IPC and iNEMI committees.
Cheryl earned her Bachelor of Mechanical Engineering degree from Georgia Tech and is currently a student in the UT Austin Masters of Science in Technology Commercialization (MSTC) program. She was drawn to the MSTC program as an avenue that will allow her to acquire relevant and current business skills which, combined with her technical background, will serve as a springboard enabling her clients to succeed in introducing reliable, blockbuster products tailored to the best market segment.
In her free time, Cheryl loves to run! She’s had the good fortune to run everything from 5k’s to 100 milers including the Boston Marathon, the Tahoe Triple (three marathons in 3 days) and the nonstop Rocky Raccoon 100 miler. She also enjoys travel and has visited 46 US states and over 20 countries around the world. Cheryl combines these two passions in what she calls “running tourism” which lets her quickly get her bearings and see the sights in new places.
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