Design of NOT, NAND, NOR, AND, OR gates using CMOS

1. MOSFET based
Digital Circuits
Arpan Deyasi
Dept of ECE, RCCIIT, Kolkata, India
12/27/2020 1Arpan Deyasi,RCCIIT

2. 12/27/2020 Arpan Deyasi,RCCIIT 2
Formation of Complementary MOS
G
D
S
B
G
D
B
S
p-MOSFET
n-MOSFET
ON at lower
gate bias
OFF at lower
gate bias

3. 12/27/2020 Arpan Deyasi,RCCIIT 3
Formation of Complementary MOS
S
B
D
B
S
G
D
Input PMOS NMOS output
0
ON
OFF
1
0 ON OFF 1
OFF

4. 12/27/2020 Arpan Deyasi,RCCIIT 4
Formation of Complementary MOS
S
B
D
B
S
G
D
Input PMOS NMOS output
1 OFF ---- 0
1
OFF
0

5. 12/27/2020 Arpan Deyasi,RCCIIT 5
Complementary MOS
i/p
o/p
PMOS
NMOS
G
D
S
B
G
S
D
B

6. 12/27/2020 Arpan Deyasi, RCCIIT 6
CMOSbasedNANDgate
A
B
A B output
0 0 1
0
0
ON ON
OFF
OFF o/p
1

7. 12/27/2020 Arpan Deyasi, RCCIIT 7
CMOSbasedNANDgate
A
B
A B output
1 0 1
0
ON
o/p
1
1
ON
OFF
ON

8. 12/27/2020 Arpan Deyasi, RCCIIT 8
CMOSbasedNANDgate
A
B
A B output
0 1 1
0
ON
OFF o/p
1
1
ON
OFF

9. 12/27/2020 Arpan Deyasi, RCCIIT 9
CMOSbasedNANDgate
A
B
A B output
1 1 0
0
o/p
1
1
ON
OFF
ON
OFF

10. 12/27/2020 Arpan Deyasi, RCCIIT 10
CMOSbasedNANDgate
A B output
1 1 0
0 1 1
1 0 1
0 0 1

11. 12/27/2020 Arpan Deyasi,RCCIIT 11
CMOSbasedNORgate
A
B
o/p
0
1
ON
ON
OFF
OFF
0
A B output
0 0 1

12. 12/27/2020 Arpan Deyasi,RCCIIT 12
CMOSbasedNORgate
A
B
o/p
0
0
ON
ON
OFF
OFF
1
A B output
0 1 0

13. 12/27/2020 Arpan Deyasi,RCCIIT 13
CMOSbasedNORgate
A
B
o/p
0
1
ON
ON
OFF
OFF
0
A B output
1 0 0

14. 12/27/2020 Arpan Deyasi,RCCIIT 14
CMOSbasedNORgate
A
B
o/p
0
1
ON ON
OFF
OFF
1
A B output
1 1 0

15. 12/27/2020 Arpan Deyasi,RCCIIT 15
CMOSbasedNORgate
A B output
0 0 1
0 1 0
1 0 0
1 1 0

16. 12/27/2020
Arpan Deyasi, RCCIIT
16
CMOSbasedORgate
A
B
o/p

17. 12/27/2020 Arpan Deyasi,RCCIIT 17
CMOSbasedORgate
A B output
0 0 0
0 1 1
1 0 1
1 1 1

18. 12/27/2020 Arpan Deyasi, RCCIIT 18
CMOSbasedANDgate
A
B
o/p

19. 12/27/2020 Arpan Deyasi,RCCIIT 19
CMOSbasedANDgate
A B output
0 0 0
0 1 0
1 0 0
1 1 1