Embedded Platform Architecture - I

Advanced Computer Architecture
Embedded Platform Architecture
Dr. Muhammad Asif
drasifpk@hotmail.com

Outline
Components of Embedded System Platform
– Embedded Processor
– System Memory Map
– Interrupt Controller
– Timers
Dr. M. Asif drasifpk@hotmail.com Advanced Computer Architecture

Embedded System Platforms
• Electronic devices are becoming Internet-
accessible with software-defined feature sets
• Not Just Computers and Mobile Devices
• Almost every kind of electronics device
• Major domains of processor-based systems-
on-a-chip (SoC) that are going to rely on
Internet connectivity.
–Consumer Electronics
–Telephony
–In-vehicle information systems

Embedded System Platforms
• Changing Trend: Internet connectivity enables
the command and control of deployed
electronics.
• Example: Building Automation,
– systems such as lighting, climate, and
security can be monitored and managed
remotely. Lights can be turned off and
temperatures can be adjusted in rooms and
buildings that are known to be empty,
without requiring a physical presence in the
room.

Embedded System Architecture
• SoC is an ideal platform for building ES.

• Processor: primary execution environment
• An embedded SoC sometimes contains additional
processing elements that are designed for a more
specific function.
• Processors can be scalar or super scalar
• A superscalar-based processor supports the
parallel execution of instructions by having
multiple copies of key functional units within the
CPU
•

Memory-Hierarchy in Embedded
System Architecture
• When the processor is waiting for the memory
subsystem, the processor stalls and is no longer doing
useful work.
• stalls directly impact the performance of the
system.
• Solution is to provide large amounts of the extremely
fast memory technology tightly coupled to the
processor core.
• Costly solution

System Architecture
•

System Architecture
• Logic gate memory. This is typically used for
intermediate buffering, such as write buffers.
• Static RAM (SRAM). SRAM cells are used on devices for
caches and small amounts of RAM that is close to the
processor.
• Dynamic RAM (DRAM): is usually external to the SOC.
DRAM is placed in the same package as the
processor/SOC. But, it is a costly in operation, not
common.
• Mass storage. When mass storage is used as part of
the paging virtual memory system. Access to
mass storage even for SSD-based media requires
thousands of CPU cycles.

An embedded Processor require followings to operate:
• A memory subsystem for initial instruction storage
and random access memory.
• An interrupt controller to gather, prioritize, and
control generation of interrupts to the processor.
• A timer; multitasking operating systems (non-
cooperative) typically rely on at least one timer
interrupt to trigger the operating system scheduler.
• Access to I/O devices, such as graphics controllers,
network interfaces, and mouse/keypads.

• The processor sits at the center of the
platform and interacts with all the other
devices on the platform.
• The locations of the devices are presented
through the memory map.

System Memory Map
• The memory map is a list of physical addresses
of all the resources on the platform, such as
the DRAM memory, the interrupt controllers,
and I/O devices.
• System memory map is generated from
processor’s point of view and can be viewed
from other devices’ point of view
• Two distinct address spaces:
– Memory Space
– Input/output Space•

System Memory Map
• Memory Space
–Primary address space, covers DRAM and
I/O
–It occupies the entire physical address space
of the processor
–MOV Instruction
• Input/output Space
–I/O space is far smaller (only 64 kB) and can
only be accessed via IN/OUT instructions.
•

System Memory Map
• When the processor generates a read or write,
the address is decoded by the system memory
address decoders and is eventually routed to
the appropriate physical device to complete
the transaction.
• Memory Address Space:
– Main memory address range
– Memory Mapped I/O (MMIO)

System Memory Map (Intel)
•

System Memory Map
• A register in the SOC is called TOLM indicates
the top of local memory.
MIMO (Sub-category):
• Fixed Address Memory Mapped Address:
There are a number of hard coded address
ranges.
– The address in this range decodes to the flash
device (where BIOS/firmware is stored), timers,
interrupt controllers, and some other incidental
control functions.

System Memory Map
MIMO (Sub-category):
• PCIe BUS Range: represents a range of MMIO
addressed that will all be directed to the
PCI/PCIe bus on the system.
– The devices that appear on the PCIe bus have
configurable address decoders known as Base
Address Registers (BARs).
– The devices are discovered and configured using
BARs and PCIe
•

System Memory Map
• The address map (within the SOC) is usually
static
• All devices are assigned an address at the time
of SOC design
• Simplify the hardware design

Embedded Platform Architecture - I

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