Xilinx virtex 7 fpga - Semester Presentation at NUST SEECS

1. Xilinx Virtex 7 FPGA
Hassaam Ali Khan
Saad Ahmed
Muzaffar Khan
Zeeshan Akram

2.  Introduction
 Capabilities
 Key Features
 Usage and Motivation
 Pros and Cons
 Q & A
 Comparison with PowerPC
Agenda

3.  Configurable (Programmable) General Logic Blocks
 Configurable Interconnects
 Plus Special Purpose Blocks (Embedded Processors)
 Configured (multiple times) to perform variety of tasks (HEP)
What’s an FPGA?
Simple Logic Block ‘Islands’ in a ‘Sea’ of Interconnects 10,000 … 100,000+ (Massively Parallel HEP)

4.  The top performance FPGA family by Xilinx
 Leading High-End Industry standard FPGA
 Currently the highest capacity PLD
 Highest capability devices enabled by stacked silicon interconnect
(SSI) technology.
 Optimized for highest system performance and capacity with a 2X
improvement in system performance
Xilinx Virtex 7 FPGA

5.  Industry dynamics are driving the need for systems that consume
much less power
 Insatiable bandwidth requirements call for higher system-level
performance
 Competitive pressure is forcing customers to explore new options
for performance/ cost tradeoffs
 Companies are struggling to increase productivity without
sacrificing innovation and differentiation
 Companies are struggling to break through multi-chip partitioning
barriers to prototype complex ASICs
Today’s Market Challenges

6.  Cutting power consumption in half, allowing FPGAs to be used in
new applications and providing more “useable performance”
 Setting new benchmarks for system-level performance in terms of
logic density, I/O bandwidth, and signal processing
 Replacing ASICs and ASSPs in high capacity, high-bandwidth
systems
 Providing unmatched performance per dollar
 Offering a scalable optimized architecture that reduces development
time and fosters innovation and differentiation
Capabilities :
Addressing The Programmable Imperative

7. 7 Series FPGA Families
Logic Cells
Block RAM
DSP Slices
Peak DSP Perf.
Transceivers
Transceiver
Performance
Memory Performance
I/O Pins
I/O Voltages
Lowest Power
and Cost
Industry’s Best
Price/Performance
Industry’s Highest
System PerformanceMaximum Capability

8. 7 Series FPGA Families

9. Vertix-7 FGPA Feature Summary

10.  SSI technology enables multiple super logic regions (SLRs) to be
combined on a passive interposer layer, using proven manufacturing
and assembly techniques from industry leaders, to create a single
FPGA with more than ten thousand inter-SLR connections,
providing ultra-high bandwidth connectivity with low latency and
low power consumption.
SSI Technology

12. Virtex-7 Devices
 The Virtex-7 family has several devices
 Virtex-7: General logic
 Virtex-7XT: Rich DSP and block RAM, higher serial
bandwidth
 Virtex-7HT: Highest serial bandwidth
Virtex-7XTVirtex-7 Virtex-7HT
•High Logic Density
•High-Speed Serial
Connectivity
•High Logic Density
•Ultra High-Speed Serial
Connectivity
•High Logic Density
•High-Speed Serial
Connectivity
•Enhanced DSP
Logic
Block RAM
DSP
Parallel I/O
Serial I/O

13.  SSI Technology: Enables Super Logic Regions (SLRs)
Key Features: SSI Technology
 Largest Virtex-7 device is almost three times the size of
the largest Virtex-6 device
 Growth is higher than Moore’s Law dictates
 Enabled by Stacked Silicon Interconnect (SSI) technology
 Multiple FPGA die on a silicon
interposer
 Each die is referred to as a
Super Logic Region (SLR)
 Vast quantity of interconnect
between adjacent SLRs are
provided by the interposer
65% 130% 163%

14. Value Deliverables
Programmable System Integration •Up to 2M logic cells
Increased System Performance
•Up to 2.8 Tb/s total serial bandwidth with up to
68Mb BRAM, DDR3-1866
BOM Cost Reduction •Up to 40% lower cost than multi-chip solution,
Total Power Reduction
•Up to 70% lower power than multi-chip
solution
Accelerated Design Productivity
•Scalable optimized architecture for migration in
sub-families

15. Key Features: Significant Power Reduction
 50% lower total power
 65% lower static power enabled by 28nm High-Performance
architecture
 25%+ lower dynamic power via architectural evolution
 30% lower I/O power with
enhanced capability
 System design flexibility
 50% lower power budget
OR
 Take advantage of additional
usable performance and capacity
at the previous power budget
50% Lower
Power
Increase Usable
Performance
and Capacity
O
R

16. Key Features: Architecture Alignment
 Common elements enable easy IP reuse for quick design
portability across all 7 series families
– Design scalability from low-cost to high-performance
– Expanded eco-system support
– FPGA comprises columns of different
resources
Clocking, I/O, BRAM, DSP, HSSIO
Artix™-7 FPGA
Kintex™-7 FPGA
Virtex®-7 FPGA

17.  Input/Output: High data rate transfer and Wide voltage ranges
 XADC Architecture (Analog-to-Digital Converter)
 Increased number of CLBs (PLBs)
 High Performance-Low Power DSP Slice
Key Features

18.  ASIC Prototyping
 Portable Radar Systems
 High Performance Computing
 Data Acquisition and Monitoring systems
 Defense, Aerospace and Scientific Research applications
 Audio/Video Processing
 Wired and Wireless Communication
 Virtex 7 enables complex ASICs on a single FPGA instead of multi-chip
When we talk about the Xilinx Virtex 7 FPGAs, we are actually talking about the
cutting-edge of FPGAs!
Usage and Applications

19.  Leading-edge ASIC designs are becoming more expensive and time-
consuming because of the increasing cost of mask sets and the
amount of engineering verification required.
 Getting a device right the first time is imperative.
The Need for FPGAs

20.  Compared to ASICs or ASSPs, FPGAs offer many design advantages,
including:
 Rapid prototyping
 Shorter time to market
 The ability to re-program in the field for debugging
 Lower NRE costs
 Long product life cycle to mitigate obsolescence risk

21. FPGA Design
Advantage Benefit
Faster time-to-market No layout, masks or other manufacturing steps
are needed
No upfront non-recurring expenses (NRE) Costs typically associated with an ASIC design
Simpler design cycle Due to software that handles much of the
routing, placement, and timing
More predictable project cycle Due to elimination of potential re-spins, wafer
capacities, etc.
Field reprogramability A new bitstream can be uploaded remotely

22.  Provides a highly versatile “on-the-go” programmable computing
solution
 Configures and optimized for a particular task
 Excellent tool for rapid ASIC prototyping
 Due to ever exceeding costs of ASIC manufacturing and designing,
rapidly becoming the industry standard practice for designing
embedded systems
 Virtex-7 is very powerful and resourceful
 High Performance – Low Power Consumption
 Highest industry standard Logic Density enabled by SSI Technology
 Scalable Architecture – suitable for migration within 7 series
 Wide ranging application
Conclusions

23. ?
Q & A

24.  PowerPC is only a microprocessor architecture – A
PowerPC microprocessor can be designed on an Virtex-7
FPGA!
 Xilinx Virtex 7 FPGAs are much more than just processors.
Comparison with PowerPC

25.  Much versatile in applications and a complete stand alone
device with input/output ports, DSP units, PLDs, ADCs,
Transceivers, interfaces etc. Processor is just one part of the
whole setup
 PowerPC is a microprocessor architecture and only
provides the “software” part of a system design-The
hardware cannot be optimized for a specific purpose-
performance
Comparison with PowerPC