IDT offers a wide portfolio of fanout buffers and clock distribution devices to distribute clock signals from a single input to multiple outputs. Their buffers are designed for low jitter and skew and support various I/O standards including LVDS, LVPECL, and LVCMOS. IDT provides differential and single-ended fanout buffers as well as zero delay PLL-based buffers. Customers can use these buffers to distribute clocks on boards to reduce costs and simplify clocking architectures. IDT also offers design support and collateral to help customers select and implement fanout buffers.

1. ©2010 Integrated Device Technology, Inc.
IDT Fanout Buffers
Designed for Tight Timing Budgets, Optimized
for Low Skew, Delay and Jitter

2. PAGE 2www.IDT.com
Agenda
● Buffer Introduction
● Differential Fanout Buffer/Divider
● Single-ended Fanout Buffer/Divider
● Zero Delay Buffer
● Application Examples
● Design/Application Support

3. PAGE 3www.IDT.com
Buffer Introduction
● What are buffers?
● Multiple outputs from a single input. Useful building blocks of a clock tree
● IDT has the largest portfolio of buffers in the industry which
includes non-PLL fanout buffers, PLL-based zero delay buffers,
Multiplexers and Dividers
● The family of buffers supports various input and output styles
– LVCMOS/LVTTL, LVPECL, LVDS, HCSL, crystal (inputs only)
● Some buffers can also be level translators with multiple
outputs and single input
● Buffers have low additive jitter and low skew. IDT fan-out
buffers feature fully differential internal architecture—even
devices with single-ended I/Os—reducing jitter caused by
inherent common-mode noise rejection and improving output
skew

4. PAGE 4www.IDT.com
Differential Fanout Buffers
● SiGe technology for best phase noise performance, adding negligible
additive jitter to the output
● Supports LVPECL and LVDS output styles
● Support up to 24 outputs, maximum output frequency 3GHz
● Some with individual OE, or universal OE
● Available in Industrial and Commercial grade
● Example: 853S006

5. PAGE 5www.IDT.com
Differential Fanout Buffer
8535I-31
8535I-01
• Input: 2 LVCMOS reference clock
• Output: 4 differential LVPECL
• Selectable CLK0 or CLK1 inputs, for
multiple frequency fanout applications
• Low additive jitter, 0.05ps (typ)
• Low output skew, 30ps (typ)
• Input: 1 LVCMOS, 1 crystal
• Output: 4 differential LVPECL
• Selectable CLK0 or CLK1 inputs (ref
clock or crystal), for multiple frequency
fanout applications
• Low additive jitter, 0.05ps (typ)
• Low output skew, 30ps (typ)
FEATURES/BENEFITS

6. PAGE 6www.IDT.com
Differential Fanout Buffer/Divider
854105I
879S216I-02
• Fanout buffer and level translator
• 1 LVCMOS input to 4 LVDS outputs
• Each output can be enabled/disabled
by individual OE pins
• Low additive jitter, 0.16ps (typ)
• Fanout buffer and divider
• Two differential inputs for multiple input
frequencies
• Divider can support multiple divider
values, selectable by F_SEL pins
FEATURES/BENEFITS

7. PAGE 7www.IDT.com
Single-ended Fanout Buffer/Divider
8L3010I
• 2 differential inputs, 1 crystal input
• 10 LVCMOS/LVTTL outputs
• Synchronous output enable to avoid
clock glitch
• Multiple input styles for flexibility
• Low additive jitter, 0.24ps (typ)
• Low skew, 50ps (max)
FEATURES/BENEFITS

8. PAGE 8www.IDT.com
Single-ended Fanout Buffer/Divider
87004I-03
• Fanout buffer/divider
• 2 selectable LVCMOS inputs
• Two banks of two LVCMOS outputs
• Output enable pins for each bank
• Low skew, 40ps (typ)
FEATURES/BENEFITS

9. PAGE 9www.IDT.com
Zero Delay Buffers
● Zero Delay buffers are PLL-based buffers for zero propagation delay
between input and output
● Supports various input and output styles
o Single-ended, differential and crystal (input only)
● Maximum output frequency 1GHz
8735I-218705I

10. PAGE 10www.IDT.com
Application Example
8535I-01
25MHz
Processor Core
Processor Core
FPGA
1GE PHY/Switch
87004I-03
Sync E Recovered 125MHz
62.5MHz Ref FPGA
62.5MHz Ref Modem/Processor
62.5MHz Ref Modem/Processor
82V3399
19.44MHz
1pps
19.44MHz 156.25MHz
Modem Plug-in board
Main board in Carrier Ethernet Switch

11. PAGE 11www.IDT.com
Example of Cost savings
Before
● Broadcom Switch and PHYs
5675
5695 5695
5464 5464 5464 5464 5464 5464Quad
PHYs
5673 5673
10GE Port 10GE Port
HiGig Stacking Ports
24 port RJ45
25Mhz Diff
Crystals Osc
25Mhz crystals
10G Multilayer
Switch
Gigabit
Ethernet
Switch
8-port Switch Fabric

12. PAGE 12www.IDT.com
Example of Cost savings
After
● 1 Buffer and 1 crystal replaces 8 crystals: BOM and board space
● All frequencies track together over time
5675
5695 5695
5464 5464 5464 5464 5464 5464Quad
PHYs
5673 5673
10GE Port 10GE Port
HiGig Stacking Ports
24 port RJ45
25Mhz Diff Clocks
25Mhz SE Clocks
ICS8538-26
10G Multilayer
Switch
Gigabit
Ethernet
Switch
8-port Switch Fabric

13. PAGE 13www.IDT.com
Fanout Buffer Flyer

14. PAGE 14www.IDT.com
Applications Support
• Prompt and effective customer support with technical
issues.
• Simulation models, IBIS and HSPICE
• Layout and Schematics Review prior to tape out
• Evaluation boards
• Application notes
Email Hotline:
TSD-Applications@IDT.com OR clocks@idt.com

15. ©2010 Integrated Device Technology, Inc.
Thank You for Choosing
IDT Timing Products!

16. PAGE 16www.IDT.com
Transcript
● Thank you for joining us for an overview of IDT's Fanout Buffers. My name is Vik Chaudhry. I'm Marketing Manager for IDT's timing products.
● Here's the agenda for this presentation. We'll start with a brief introduction of buffers and clock distribution devices, then I'll show you some examples of differential and
single-ended buffers. We'll discuss zero delay buffers, and then some examples of how these devices are used in actual circuits.
● Buffers are one of the most important building blocks of a clock tree. Typically, they have one or two inputs, and multiple outputs. IDT has a very large portfolio of
buffers. That includes Non-PLL buffers, PLL-based delay zero buffers, buffers with multiplexes, and dividers. IDT has about 450 such devices that supports various
versions of inputs and output styles. In many cases, buffers can also be used as level translators to convert one signal level to another. IDT buffers are designed for low-
additive phase jitter and low skew in mind. Many of them have differential architecture internally for better use of common mode projection ratio.
● The first set of buffers are ones with differential outputs. Differential signals are becoming very popular these days with high speed applications. Various differential levels,
such as LVDS, LVPECL, HCSL are supported by IDT buffers. We offer parts that have up to 24 different outputs and which go up to 3GHz in speed. These parts are
available in both industrial as well as commercial temperature ranges. As I mentioned earlier, these parts are designed for very low additive phase noise in mind. You will
find that additive phase noise is listed in the EC tables at the back of the data sheets, and in many cases, you can also see a phase noise plot in the back of the data
sheets, too. Here is an example of 853S006 device which has one input and six outputs. And in this slide you also see the additive phase noise for this device.
● Here are some more examples of differential buffers. One important thing to note is that in these cases, one, the input level is single-ended, so the device acts as a level
translator. Second, that these devices have marks built into them. In one case we have two single-ended signals coming in. In the other case we have LVCMOS input and
a crystal input. Also worth noting is that all output signals are synchronized with the enabled signal, so they are all phase aligned.
● 854105 is another example of a simple, one to four buffer which has individual output enabled pins. 879S216, as you can see on the bottom of the screen, has a MUX,
divider, and fanout buffer, all combined into one flexible device. Such devices can not only provide the fanout, but in some cases, they can build the whole clock tree for a
customer.
● Now, let's consider some single-ended buffers. In this example we have a differential signal, or a crystal input coming in that is fanned out to ten single-ended LVCMOS
signals. Typically, the differential inputs can accept either LVDS, LVPECL, and HCSL or HSTL levels.
● This is an example of a very flexible device, where one, we have a MUX at the input stage, two we have two sets of dividers that are independent of each other, and
three, there are two sets of fanout buffers for each of the banks that enable signal for each bank. So as you can see, there are various flavors of fanout buffers available
in IDT's portfolio.
●
● We also have zero delay buffers in our portfolio. A zero delay buffer is a PLL-based device that provides an output that is in phase alignment with the input signal. In this
category of devices, we have parts with multiple outputs, different levels of inputs and outputs, and different divider ratios. Designers like these types of devices when
they want really tight control over timing of their board.
● This slide shows different applications of the fanout buffer. Typically, we see clocks fanout to different phys, processors and cores, on a typical board. In some applications
designers want these clocks to be synchronized for timing. In the second case a zero delay buffer is used to divide the clock and then distribute it over the board.
● Buffers can sometimes help designers reduce the cost and the total BoM of their boards also. In this example, the original board used eight different crystals to clock the
different phys switches, and fabric. With the use of 8538-26, we were able to replace all of the crystals with basically two parts, a crystal, and a fanout buffer. It helped to
reduce the overall cost of the board, and it also reduced the lead times for the crystals that were used on this board.
● As I mentioned earlier, IDT has a very large portfolio of fanout and clock distribution devices. To make it easy to select these parts we have developed collateral that can
be used. This collateral is located on the IDT website under clock and timing products. If you look under fanout buffers and dividers, you will see this collateral available.
This is a very handy tool to expedite selection of parts.
● We also have excellent application support for all the clocks and clock distribution devices. Most of our products include IBIS models. We also have application notes for
various termination schemes, filter recommendations, and we also review schematics. If you have any questions, please feel free to either drop us an email at tsd-
applications@IDT.com or clocks@IDT.com.
● Thank you for choosing IDT timing products.