Progetto e Sviluppo di un Sistema per il Gioco degli Scacchi TridimensionaliMarco Bresciani
Questa Tesi di Laurea presenta le modalità con cui ho progettato e realizzato un'applicazione dotata di intelligenza artificiale in grado di giocare al gioco degli Scacchi Tridimensionali, gioco noto dai telefilm e film di Star Trek (Cfr. [Star Trek]). Le regole cui ho fatto riferimento sono le Federation Standard Rules 5.0 di A. R. Bartmess (Cfr. [Bartmess, 1977], [Bartmess, 2003]).
Partendo da tali regole, ho codificato la notazione algebrica di scrittura delle mosse con una grammatica Extended Bakus-Naur Form (EBNF) e, successivamente, ho ideato un indice di classificazione (che ho chiamato Elo3D) per dare una valutazione al comportamento dei giocatori durante le partite.
La prima parte sviluppata è un'infrastruttura di rete, basata su Remote Method Invocation (RMI), che trasforma l'impalcatura client-server di questa componente del linguaggio Java in una struttura di comunicazione "quasi" punto-punto. Questa consente il gioco sia in locale sia in remoto, in modo assolutamente trasparente per l'utente, fatta salva la conoscenza dell’eventuale indirizzo di rete remoto.
Per l'impostazione di lavoro che ho scelto, l'applicazione fa uso di dati e formati aperti, con un'alta modularità e consentendo una facile espandibilità delle componenti esistenti. A questo scopo ho infatti sviluppato due linguaggi eXtensible Markup Language (XML) per definire i messaggi che le varie componenti l'applicazione si sarebbero scambiati tra loro e per definire una modalità di memorizzazione dello stato di una partita e i dati di un giocatore.
In quest'applicazione ho messo a disposizione diversi algoritmi di Intelligenza Artificiale (IA), tra i quali (e con i quali) ho eseguito numerose partite e confronti per valutarne le prestazioni. Ho sviluppato un'applicazione in grado di utilizzare anche molteplici insiemi di regole di gioco, facilmente selezionabili dall'utente senza alcuna necessità di configurazione o pre-impostazione.
Keynote for my Master Thesis. This work consists in the development of a tool, named Ocelot, which implements different approach for automatic test case generation, using search-based techniques. Ocelot is able to instrument and automatically generate high quality test suites both in terms of coverage and size, for programs written in C language.
Slides used for my Bachelor Degree presentation: the main focus is on SARP, a semi-active replication protocol that I developed and tested for my thsis work.
This thesis examines trends in the clinical workload and staffing of the U.S. Navy Medical Department to determine if its peacetime focus adequately supports medical readiness for wartime. The author analyzes workload data from 1999-2002 which shows an overall decrease in inpatient surgery but not all specialties saw increased outpatient surgery. An examination of end strength from 1990-2002 found few overall changes, but shifts in specialties consistent with an outpatient primary care focus. The evidence suggests an emerging gap between Navy Medicine's peacetime and wartime missions warranting further investigation of impacts on medical readiness.
Progetto e Sviluppo di un Sistema per il Gioco degli Scacchi TridimensionaliMarco Bresciani
Questa Tesi di Laurea presenta le modalità con cui ho progettato e realizzato un'applicazione dotata di intelligenza artificiale in grado di giocare al gioco degli Scacchi Tridimensionali, gioco noto dai telefilm e film di Star Trek (Cfr. [Star Trek]). Le regole cui ho fatto riferimento sono le Federation Standard Rules 5.0 di A. R. Bartmess (Cfr. [Bartmess, 1977], [Bartmess, 2003]).
Partendo da tali regole, ho codificato la notazione algebrica di scrittura delle mosse con una grammatica Extended Bakus-Naur Form (EBNF) e, successivamente, ho ideato un indice di classificazione (che ho chiamato Elo3D) per dare una valutazione al comportamento dei giocatori durante le partite.
La prima parte sviluppata è un'infrastruttura di rete, basata su Remote Method Invocation (RMI), che trasforma l'impalcatura client-server di questa componente del linguaggio Java in una struttura di comunicazione "quasi" punto-punto. Questa consente il gioco sia in locale sia in remoto, in modo assolutamente trasparente per l'utente, fatta salva la conoscenza dell’eventuale indirizzo di rete remoto.
Per l'impostazione di lavoro che ho scelto, l'applicazione fa uso di dati e formati aperti, con un'alta modularità e consentendo una facile espandibilità delle componenti esistenti. A questo scopo ho infatti sviluppato due linguaggi eXtensible Markup Language (XML) per definire i messaggi che le varie componenti l'applicazione si sarebbero scambiati tra loro e per definire una modalità di memorizzazione dello stato di una partita e i dati di un giocatore.
In quest'applicazione ho messo a disposizione diversi algoritmi di Intelligenza Artificiale (IA), tra i quali (e con i quali) ho eseguito numerose partite e confronti per valutarne le prestazioni. Ho sviluppato un'applicazione in grado di utilizzare anche molteplici insiemi di regole di gioco, facilmente selezionabili dall'utente senza alcuna necessità di configurazione o pre-impostazione.
Keynote for my Master Thesis. This work consists in the development of a tool, named Ocelot, which implements different approach for automatic test case generation, using search-based techniques. Ocelot is able to instrument and automatically generate high quality test suites both in terms of coverage and size, for programs written in C language.
Slides used for my Bachelor Degree presentation: the main focus is on SARP, a semi-active replication protocol that I developed and tested for my thsis work.
This thesis examines trends in the clinical workload and staffing of the U.S. Navy Medical Department to determine if its peacetime focus adequately supports medical readiness for wartime. The author analyzes workload data from 1999-2002 which shows an overall decrease in inpatient surgery but not all specialties saw increased outpatient surgery. An examination of end strength from 1990-2002 found few overall changes, but shifts in specialties consistent with an outpatient primary care focus. The evidence suggests an emerging gap between Navy Medicine's peacetime and wartime missions warranting further investigation of impacts on medical readiness.
Dr Jen Rowland facilitated a "Supervising a thesis by publication" workshop for the Faculty of Law at Macquarie University on 10 August 2016 jen.rowland@mq.edu.au
The document describes the development of a situational judgment test (SJT) to assess teamwork skills in medical professionals. Key points:
- Existing teamwork assessments have limitations, so the study aimed to create a low-cost SJT. Researchers developed items based on teamwork examples from medical experts.
- The SJT measures five teamwork dimensions: communication, team structure, mutual support, leadership, and environmental awareness. Items were sorted into dimensions and revised for agreement.
- Data was collected from medical students and professionals to validate the SJT. Results showed the SJT differentiated students and professionals better than an existing teamwork measure.
- Further validation is needed, but the SJT shows potential
Dry Eye and Ocular surface diseases in diabetes mellitusDhwanit Khetwani
RELATION OF DIABETES WITH DRY EYE AND OTHER OCULAR SURFACE DISEASES, MADE FOR THE PURPOSE PROTOCOL PRESENTATION. MADE BY DR DHWANIT KHETWANI OPHTHALMOLOGY RESIDENT
Writing your thesis chapter by chapterRoger Watson
The document provides guidance on writing each chapter of a thesis, outlining the typical structure and content for chapters such as the introduction, literature review, methods, results, discussion, and conclusion. It discusses key elements for each chapter like stating the research question in the introduction, describing the study design and data analysis in the methods, only reporting results without discussion in the results chapter, and relating the findings back to the research aims in the conclusion. The order of writing the chapters is also addressed, with the recommendation to write methods and results first before filling out the other chapters.
This document discusses cryotherapy, a technique that uses extreme cold to destroy abnormal tissue. It provides a brief history of cryotherapy dating back to 1899 when liquefied gases were first used for medical purposes. The document then focuses on the use of cryotherapy in ophthalmology, describing the cellular effects and techniques used. Applications for various ocular pathologies are discussed such as trichiasis, basal cell carcinoma, and retinal tears/detachments. Complications are also addressed.
This document provides an overview of neuro-ophthalmic anatomy and examination. It discusses the anatomy of structures involved in eye movement like the skull base, orbital walls, and cranial nerves. It then covers topics like the neuro-ophthalmic exam approach, evaluating specific symptoms like vision changes and double vision, and testing cranial nerves. Key tests are described including Tensilon testing to help localize lesions. The goal of the neuro-ophthalmic exam is to localize lesions in the visual pathways and identify underlying pathologies.
This document discusses cystoid macular edema (CME), including its pathogenesis, etiology, associated ocular conditions, manifestations, diagnosis and testing. Specifically, it focuses on pseudophakic or Irvine-Gass syndrome CME, which can occur after cataract surgery. The summary discusses how CME results from fluid accumulation in the retina, its appearance on fluorescein angiography, risk factors for pseudophakic CME like vitreous loss during surgery, and how it is diagnosed using techniques like optical coherence tomography.
This presentation talks about the main features of UML class diagrams. The slides contain information about how to use sequence diagrams to represent components' interactions in a software system. UML 2.x featuers are also described, like frames.
The presentation is took from the Software Engineering course I run in the bachelor-level informatics curriculum at the University of Padova.
The design patterns are recurring solutions to common problems in software design.
The design patterns in computer science were formally described for the first time in the book "Design Patterns: Elements of Reusable Object-Oriented Software", whose authors are often called the Gang of Four, GoF or Go4.
A slide about SIFT: an algorithm used in computer graphics to detect features in digital images
Una slide sulle SIFT: un algoritmo usato in computer graphics per trovare dei rappresentanti significativi all'interno delle immagini digitali
BisPy: un pacchetto Python per il calcolo della massima bisimulazione di graf...Francesco Andreuzzi
Tesi triennale per il corso di laurea triennale in Ingegneria Informatica, Università degli Studi di Trieste (Dipartimento di Ingegneria e Architettura).
BisPy: un pacchetto Python per il calcolo della massima bisimulazione di graf...Francesco Andreuzzi
[Versione senza link]
Tesi triennale per il corso di laurea triennale in Ingegneria Informatica, Università degli Studi di Trieste (Dipartimento di Ingegneria e Architettura).
C# is entering its third decade of life. And it is consistently evolving over the years with lot of new features. Let's recap the recent 7.x evolution and what we expect for the 8.0 features.
Relazione Modellazione e Simulazioni Numeriche: PercolazioneRiccardo Melioli
La Teoria della percolazione studia il problema della connettività tra elementi appartenenti ad un sistema, disposti nello spazio secondo una distribuzione de finita a priori. Due elementi si possono de finire connessi se sono
adiacenti(relazione a corta distanza); Un insieme di elementi tra di loro connessi ricorsivamente forma un cluster.
Un'obiettivo della teoria della percolazione è veri care la presenza all'interno
di un sistema di uno o più cluster "Percolanti" ovvero di dimensioni comparabili a quelle del sistema stesso.
1. The document discusses Diopsis940, a microcontroller product from Atmel that features an ARM9 processor and floating point DSP for consumer applications.
2. It provides details on target applications including hands-free phones, high-end car audio, and sound processors. The microcontroller supports complex audio processing algorithms.
3. hArtes, an Atmel division, aims to reduce application development time through tools that streamline the process from conceptual design to implementation using their microcontroller products.
The document proposes a coarse-grain reconfigurable array (CGRA) for accelerating digital signal processing. The CGRA aims to provide an intermediate tradeoff between flexibility and performance compared to FPGAs and ASICs. It consists of an array of processing elements and distributed memory interconnected via programmable switches. Evaluation shows the CGRA achieves 4.8-8X speedup, 24-58% improved energy efficiency, and up to 40% reduced area compared to a Xilinx Virtex-4 FPGA for applications like color space conversion, FIR filtering, and DCT.
This document discusses Altera's FPGA strategy for reconfigurable hardware in industry applications. It defines reconfigurable hardware as an architecture that does not require on-the-fly timing analysis because product qualification is extensively done through temperature and cycle testing without hardware architecture changes. It then shows how programmable solutions have evolved from single CPU and DSP cores to multi-core processors and coarse-grained arrays with FPGAs moving to fine-grained, massively parallel arrays with embedded hard IP blocks. Future trends include challenges of scaling CPUs due to physical limits and the benefits of parallelism through hardware reconfiguration.
The document describes processes in VHDL. It defines a process as a concurrent statement that contains sequential logic. Processes run in parallel and can be conditioned by a sensitivity list or wait statement. Local variables retain their values between executions. It provides an example of a process with a sensitivity list and one with a wait statement. It also summarizes the general structure of a VHDL program and describes different types of process control including if-then-else, case statements, and decoders. Additional topics covered include flip-flops, counters, and finite state machines.
The document discusses requirements for enabling self-adaptivity at both the software and hardware levels. It proposes a layered model with controllers at the application, run-time environment, and hardware levels. A component-based approach is suggested to allow adaptations such as replacing or modifying components. Simulation results demonstrate how controllers at each level can coordinate to meet goals like high throughput while minimizing power usage. Reconfigurable computing platforms need to allow hardware components to be instantiated and interconnected to enable self-adaptation across software and hardware.
The document summarizes research on task scheduling techniques for dynamically reconfigurable systems. It presents (1) an integer linear programming model to formally define the scheduling problem, (2) the Napoleon heuristic scheduler to solve the problem in reasonable time based on the ILP model, and (3) experimental results validating that Napoleon obtains an average 18.6% better schedule length than other algorithms. Future work is outlined to integrate Napoleon into a general design framework and scheduling-aware partitioning flow.
The document summarizes key topics in reconfigurable computing, including motivations for reconfigurable systems, types of flexibility they provide, and challenges in reconfiguration. It discusses design flows to reduce complexity, maximizing reuse of reconfigurable modules to reduce latency, hiding reconfiguration times, and using relocation to further optimize schedules. Areas of reconfiguration and possible implementation scenarios involving relocation are illustrated.
The document discusses an approach for identifying cores for reconfigurable systems driven by specification self-similarity. It involves partitioning a specification graph into subsets of operations that can be mapped to reusable configurable modules. The approach identifies recurrent subgraphs in the specification that are good candidates for these cores. It works in two phases: first identifying isomorphic subgraph templates, and then selecting templates for implementation as reconfigurable modules based on metrics like largest size, most frequent usage, or minimizing communication. Experimental results on encryption benchmarks show the approach can cover a large portion of the specification with a small set of identified templates.
This document summarizes techniques for core allocation and relocation management in self-dynamically reconfigurable architectures. It introduces basic concepts like cores, IP cores, and reconfigurable regions. It then describes proposed 1D and 2D relocation solutions like BiRF and BiRF Square that allow runtime relocation with low overhead. A core allocation manager is introduced to choose core placements optimizing criteria like rejection rate and completion time with low management costs. Evaluation shows the techniques improve metrics like rejection rate and routing costs compared to other approaches.
The document discusses an hardware application platform developed for the hArtes project. It provides heterogeneous computing resources like DSPs, CPUs and FPGAs. Demonstrator applications focus on advanced audio processing for car infotainment and teleconferencing. The platform supports these applications by integrating different components, scaling computational power, and accommodating future additions. It also provides adequate I/O channels for audio signal processing.
The document describes the Janus system, an FPGA-based approach for simulating spin glass systems using Monte Carlo algorithms. The key aspects are:
1) Spin glass systems are computationally challenging to simulate due to the huge number of possible configurations.
2) The Janus system uses FPGAs to implement a large number of parallel update engines that can flip spins and accept/reject changes according to a Metropolis algorithm.
3) Each FPGA processor grid contains 4x4 processors that can communicate with neighbors. This allows simulations to be massively parallelized across the FPGA network.
The document outlines the agenda for the Reconfigurable Computing Italian Meeting held on December 19, 2008 at Politecnico di Milano in Milan, Italy. The agenda included four sessions on trends in reconfigurable computing, the hArtes European project, applicative scenarios, and the High Level Reconfiguration project. Each session included 3-4 presentations on technical topics within the session theme, such as FPGA strategies, multi-core signal processing, evolvable hardware, and runtime core relocation management. The meeting concluded with wishes for a merry Christmas and a happy new year.
This document provides an overview of architectural description languages (ADLs). It discusses that ADLs capture the structure and behavior of processor architectures to enable high-level modeling, analysis, and automatic prototype generation. ADLs can be classified as structural, behavioral, or mixed. Structural ADLs focus on low-level hardware details while behavioral ADLs model instruction sets for compiler generation. The document outlines different ADL types and their applications.
1. Task partitioning for the scheduling on partially dynamically reconfigurable FPGAs Prof. Donatella Sciuto Prof. Fabrizio Ferrandi Ing. Marco Santambrogio Anno Accademico 2005/2006 Politecnico di Milano Massimo Redaelli
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9. Esempio di scheduling Obiettivi Il problema ..Architettura ..Scheduliing ..Temporal ..Time-space ..Esempio Il modello Stato dell’arte Algoritmi Risultati Conclusioni Sviluppi futuri
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