1. SWATI SINGH
House No-174, Village Mirampur Vegia
Post Mandawali, Bijnor Email Id: swatisingh0103gmail.com
Uttar Pradesh – 246749, INDIA Contact No: +919891128875
Career Objective
A challenging career position in the field of VLSI design with a view to utilize and enhanced
the technical and team work skills gained during my professional education and to establish
myself as a professional with a keen, innovative thinking and a diligent attitude
Academic Profile
Industrial Experience
PDK Design Intern at ST MICROELECTRONICS (July-2015 to June-2016)
QA Cell Development for DRC and LVS Test Cases
Automation of DRC Test Cases using SKILL and SHELL Scripting
Formal Quality Check of DRC and Validate DRM and DRC DECK for front end
and back end rules in CMOS and NVM technologies.
Proficient in DRC and LVS and also worked on robust checks like Latch up,
Antenna, Density, and Voltage Management.
Regression on QA Cell for DRC Check to get 100% QA Coverage on DRM.
In depth knowledge of development & validation methodologies for 180nm, 90nm,
65/55nm, 45nm, 40nm, 28nm.
Exposure to functional domains of a Process Design Kit (development and
validation) including, simulation and Physical Verification
DEGREE UNIVERSITY/BOARD INSTITUTE YOP AGGREGATE
M.Tech
(VLSI Design)
BANASTHALI
VIDHYAPITH
Banasthali
Vidhyapith
(RAJ)
June-2016 82%
B.Tech
(ECE)
UPTU Krishna
Engineering
College(GZB)
June-2014 79%
XII CBSE R.R Moraka
Public School,
Najibabad
May-2010 78%
X ISCE Saint Mary’s
School,Najibabd
May-2008 81%

2. Creation of Dummy Cells to get Exposure of Virtuoso (XL/GXL) functionality and
features to verify DRC and LVS check as a part of physical verification and
simulations of the circuits like inverter and oscillator to verify their functionality.
Intricately involved in providing support to designers for PDK related issues and
Enhancements
Academic Projects
High Efficiency Multijunction Tandem Solar Cell (10 Months)
Goal was to make energy efficient tandem solar cell. Practically we achieved 40 % of
efficiency on ground/simulators. But using tandem configuration
(InGaP/GaAs/AlGaAs) we were able to achieve 44%. My part was to perform
predictive simulations for Tandem solar cell with different parameters (Doping
Content, Illumination) to achieve high efficiency
Self Automated Secured Parking System (10 Months)
It is an embedded project mainly using 8051 Microcontroller. My part in the project
was to code security system (C language) to prevent parking system from theft.
Security system consists of several identification checks of the driver in case parking
receipt is lost while retrieving the vehicle from the parking system
Implementation of 2nd
Order BI-QUAD Filter (6 Weeks)
A biquad filter is a linear filter that can be tweaked for different frequencies.
MultiSim was used for designing and simulation of the circuit. Simulated circuit was
verified on hardware with the help of Oscilloscope
Technical Skill Set
Specialization VLSI Design
Hardware Description Language VHDL, Verilog
Programming Language C (Intermediate)
Designing Tools Cadence Virtuoso Schematic Editor (L,
GXL)
Cadence Virtuoso Layout Editor (L,
GXL)
Calibre RVE,nmLVS,nmDRC
Custom Deginer, Star –RCXT
Silvaco, Xilinx ISE v 14.7, Multisim v 13
Scripting Languages Unix Shell, SKILL
Operating System Windows 7/8/10, UNIX

3. Workshops
Attended Workshop for FPGA based Verilog design.
Training
Internship on Base Transmitting Station implementation and commissioning at Indus
Towers Pvt. Ltd.
Co-Curricular Activities
Worked as a volunteer in a Tech-Week held at STMicroelectronics
Worked as a student coordinator in College Tech-Fest.
Worked as a student coordinator in blood donation camp organized by rotary club.
Won 1st position in Table Tennis Doubles at college level Sports competitions.
Served at National Service Scheme(NSS)
Declaration
I hereby solemnly declare that the information furnished above are true and correct to the
best of my knowledge and belief.
References
 Available as per request