Rishabh Bansal is a technical leader at STMicroelectronics in Noida, India with over 7 years of experience developing automation tools using technologies like TCL, Perl, C-Shell and Linux. He has led projects to develop a regression testing tool, reporting and analysis tool, and unified validation tool. Rishabh holds a B.E. in Electronics and Communication from Thapar University with a 9.1 CGPA. He has received several achievements and awards for his work. His skills include databases, programming languages, operating systems, EDA tools and he aims to continue exhibiting his professional competency.

1. CURRICULUM VITAE
RISHABH BANSAL
#140, Sheetal Colony, Back Side Chacha Mkt,
Hira Mahal, Nabha (Punjab)-147201
Mob : +91-9911927100
E-mail ID: er.rishabh.bansal@gmail.com
OBJECTIVE
A challenging career that will enable me to exhibit my professional competency to the zenith and will enable
me to expose my talent to the max, to reach the heights of success.
WORK EXPERIENCE
 Technical Leader at STMicroelectronics, GNoida July 2015 – Till Date
 Sr. Design Engineer at STMicroelectronics, GNoida May 2013 - Jun 2015
 Design Engineer at STMicroelectronics, GNoida May 2011 - Apr 2013
My Projects and responsibilities in ST majorly include the development of different varieties of
Automation Tools that are used to validate/verify the whole set of IPs for ST:
Current Project:
o Currently working on the development of Regression Suite Tool that will automatically check
the correctness of a big validation suite environment
 Technology – TCL, Perl, C-Shell on Linux
 I am working as a Project Lead with a team of 3 more people.
 This project has been started from the scratch which will include all the phases like
specification building, architecture building, feasibility analysis, coding, documentation,
reporting till the deployment to all the product groups.
Previous projects and responsibilities:
o Worked in the development of a Reporting & Analyzer Tool which is the single point node for
analyzing all kind of KPI parameters.
 Technology – PostgreSQL, Perl, C-Shell on Linux
 I worked as the Project Lead leading a team of 3 more people for the back-end part of the
project, which included the perl programming and interaction with the PostgreSQL
Database. The back-end flow was completely automated which
 started from “Extracting the data from the run area CSVs”
 till the “Dumping the data into the Database”
and was highly optimized to reduce the run time.
o Developed a Unified Validation Tool which provides the environment for automatic validation
of the IPs and runs the complete set of checks automatically.
 Technology – TCL, Perl, C-Shell on Linux
 I worked as a major contributor and as a Project Lead with a team of 2 more people in the
above project.
 This is a completely automated (batch mode) tool, with no user intervention required till the
final report generation. This tool is the single point node for all kind of validations of all types of
IPs at global ST level.
 Developed this tool right from the scratch, which included all the phases like specification
building, architecture building, feasibility analysis, coding, documentation, reporting till the
deployment to all the product groups.

2. o Developed a utility called CDL Parser, which parses the .CDL file (present in the library / design)
from the top hierarchy till the lowest level and extracts the whole information about the
terminal connections, power/ground information etc. of all the signal pins of a cell.
 Technology – TCL, C-Shell on Linux
o To develop and deploy high quality validation and verification solution to CCDS product groups
and ST divisions and to understand and support all ST teams on CAD view content and specs.
o Anticipation of CAD views requirements and enhancement of the validation solutions
accordingly for improvement in performance as well as cycle time of the validation cycle.
o Certification of Libraries / IPs using RTL to GDS flow.
o Synthesizing the netlist, running the PNR on the design and finally verifying the design by
signoff flow (Timing Analysis, DRC and LVS)
 Assistant Software Engineer at TCS, Noida Sep 2010 - Apr 2011
My Projects and Responsibities in TCS:
o Training at TCS – 3 months
 Trained in Initial Learning Program (ILP) at TCS, Gandhinagar (Gujarat). Became aware of
basic concepts of programming languages like C, C++, Java, Mainframe (COBOL)
o Worked on Mainframe environment on COBOL & DBSQL languages.
 Writing the codes related to running the queries and extracting and editing the
information of the claims required by our client.
PROFESSIONAL ACHIEVEMENTS
 Nominated as Best Performer in year 2014 and 2013 in STMicroelectronics.
 Nominated as the Best Task traversal force at site level in year 2013 in STMicroelectronics
 Recognized and awarded by TRnD Department Head of STMicroelectronics in year 2012.
 Presented a poster on Automatic Validation Techniques in tech-week at STMicroelectronics
 Received multiple “Appreciation Notes” from whole of our customer base, for providing timely and
high quality solutions.
TECHNICAL SKILLS
Skill Type Skill Name
Database PostgreSQL
Languages SQL, TCL, Perl, Shell, Skill, C, Assembly
OS Linux, Unix, Windows, DOS
Others Data Structures, MS Office, Keil
EDA Tools Vituoso, Encounter,PrimeTime, Calibre
ACADAMICS
EDUCATION:
Exam Passed Institute / Board Year of Completion CGPA / %
B.E., Electronics and
Communication
Thapar University,
Patiala, Punjab
2010 9.10 / 91%
Class XII PSEB 2006 80.89
Class X CBSE 2004 91.80

3. PROJECTS :
 Project on “Electronic Seed Counter”
o The device to count the number of seeds to perform various tests and experiments in seed Analysis Labs. This data
was then extrapolated for the bulk of seeds. This automated many agriculture related analysis and tasks.
 Microcontroller 8051 based project password authentication project.
o It included the interfacing of all components in a kit (LED’s, LCD display, DIP switches and buzzer).The user has to
enter a password twice for authentication of the first one.
TRAININGS:
 6 month Industrial training Cadence Electronic Systems, Ambala Jan 2009 - May 2009
 6 week training in Thapar University June 2008 - July 2008
o PCB design and Fabrication
o Orcad 9.2 (Capture CIS, PSpice A/D, Layout Plus)
o 8051 Microcontrollers (Architecture, Programming & Hardware Interfacing)
o Programming in Assembly & C with Keil & UMPS
 6 week training in campus connect program by Infosys Jan 2008 - Feb 2008
o www.campusconnect.infosys.com , including Analysis of Algorithms,
Computer Hardware and System Software Concepts, Client Server
Concepts, Internet &Web Technologies, User Interface Design,
System Development Methodology, RDBMS, Programming Fundamentals, OOPS.
ACADAMIC ACHIEVEMENTS
 Ranked among top 10 in the batch in ECED, Thapar University.
 Secured 2nd Rank [91.8%] in 10th class in the Region.
 Was awarded meritorious award in 10th and 10+2.
 IIT- JEE [2006] qualified.
 AIEEE rank – 87 (State) / 3947 (AIR)
 Punjab CET - 49
 GATE-2010 qualified.
EXTRA CURRICULAR ACTIVITIES
 Member of cultural committee for organizing STMicroelectronics-TRnD day.
 Participation as Flute performer in cultural events in Thapar University and ST-TRnD Day.
 Active Member of Project Committee of IETE Students forum [formally ECE CLUB]
 Designed a Step-Climber ROBOT in Aranya Tech-Fest.
 Was a member ARANYA Discipline committee.
 Active Member of NSS.
 Attended the IETE workshops on: MATLAB, ORCAD & PCB Design, LABVIEW.
PERSONAL DETAILS
Name Rishabh Bansal
D.O.B. 02-Jan-1989
Father’s Name Mr. Sunil Bansal
Languages Known English, Hindi, Punjabi
I hereby declare that the particulars given herein are true and complete to the best of my knowledge and belief.
RISHABH BANSAL