Engineering Resume - Masters Student at Carnegie Mellon University graduating in December 2019. Looking for Hardware Opportunities in Electrical and Computer Engineering Domain.

1. Shubhankar Anil Pawade
spawade@andrew.cmu.edu 412-320-9137 www.linkedin.com/in/shubhankarpawade
EDUCATION
Carnegie Mellon University Pittsburgh, PA
Master of Science in Electrical and Computer Engineering December 2019
GPA: 4/4
Selected Coursework: Foundations of Computer Systems, Introduction to Embedded systems, ULSI Technology
Current Coursework: How to write fast code, Wireless Sensor Networks, Introduction to Hardware Security
Birla Institute of Technology and Science, Pilani Goa, India
Bachelor of Engineering (Honors) in Electronics and Instrumentation May 2018
GPA: 9.04/10.0
Selected Coursework: Embedded Systems Design, VLSI Architecture, Analog and Digital VLSI Design, Analog Electronics
SKILLS
Programming Languages – Advanced: C, Verilog, System Verilog; Intermediate: Python; Beginner: Java
Application Software – MATLAB, Cadence, Eagle
PROFESSIONAL EXPERIENCE
NVIDIA Graphics Pvt. Ltd. Bangalore, India
GPU Fullchip Verification Intern July-December 2017
• Developed an audio-controller transactor for performance analysis of GPU units and reducing time consumption of existing
test cases by 300% using Verilog
• Aided in development of reset checker for validation of proper functioning of all reset signals in system
• Assisted in memory management unit verification by resolving bugs for GPU fullchip using System Verilog test cases
ACADEMIC PROJECTS
Carnegie Mellon University Pittsburgh, PA
Developed a real-time kernel capable of admission control, task scheduling and synchronization Fall 2018
• Implemented context swap with IRQ interrupts by storing context in TCB and scheduled tasks through rate monotonic
scheduling
• Added support for Mutexes and Highest Locker Priority (HLP)
Developed loadable kernel modules (LKMs) to interact with motor and communicate over network Fall 2018
• Built LKMs to interface with encoders and DC motor on a raspberry pi
• Used kernel modules to build user-space application to control position of wheel using a PID controller and communicate
between two Pi’s over ethernet
Designed dynamic storage allocator for C programs and a cache simulator Fall 2018
• Designed efficient malloc package by improving space utilization and throughput through techniques- coalescing,
segregated free lists and FIFO next fit algorithm
• Implemented a cache simulator for a multicore system with an MSI cache coherence protocol
Birla Institute of Technology and Science, Pilani Goa, India
16-bit CISC and RISC Processor Spring 2018
• Designed a 5-stage pipelined CISC and RISC processor with dynamic detection of data and control hazards in Verilog
• Implemented instructions with forwarding and stalling mechanism and various addressing modes for CISC processor
Wireless Advanced Shopping Store System using ARMv7 Processor and RFID Technology Spring 2018
• Developed a cashier-less shopping system using ARMv7 processor with an item detection mechanism implemented through
RFID technology
• Constructed a central wireless inventory management system employing TCP protocol for data transmission via STM32 WiFi
modules
Low Power Cache Design with Cadence Implementation Fall 2016
• Analysed sources of energy dissipation and degrees of freedom in low-power design space, and energy reduction
techniques for Cache architecture
• Implemented structural modifications to SRAM cell to promote lesser energy consumption and estimated an improvement
of 10% evaluated through Cadence simulation