The document provides an overview of Reduced Instruction Set Computer (RISC) architecture, covering its introduction, characteristics, and a comparison with Complex Instruction Set Computer (CISC) architecture. It discusses challenges such as the need for more instructions, increased memory usage, and higher manufacturing costs associated with RISC processors. Additionally, it mentions future trends and includes a list of references for further reading.

1. Name: Sampad Kar
Student Code: BWU/BTA/22/225
Group: D
Section: D2
Course: Computer Organization And
Architecture
Course Code: PCC-CSM301
SESSION: 2023-24

2. Reduced Instruction Set Computer

3. CONTENTS
• Introduction to RISC
• Characteristics of RISC Architecture
• Contrasting RISC with CISC
• Challenges and Criticisms
• Future Trends in RISC
• references

4. Introduction to RISC

6. Characteristics of RISC Architecture

8. Contrasting RISC with CISC

10. Challenges and Criticisms

11. •More instructions required: RISC
processors require more instructions to
perform complex tasks than CISC
processors.
•Increased memory usage: RISC processors
require more memory to store the
additional instructions needed to perform
complex tasks.
•Higher cost: Developing and manufacturing
RISC processors can be more expensive than
CISC processors.

12. Future Trends in RISC

14. References

15. 1.https://chat.openai.com/
2.https://www.geeksforgeeks.org
/
3.https://www.codingninjas.com/
4.https://www.tutorialspoint.co
m/
5.https://byjus.com/
6.https://www.arm.com/