Quantum Technology Innovation Network: Cryogenic Electronics

CRYOGENIC ELECTRONICS –
WELCOME
WINFRIED K. HENSINGER
UNIVERSITY OF SUSSEX AND UNIVERSAL QUANTUM

UK National QT Programme, 10 years, £1 billion
• Four Quantum Technology Hubs
(Sensing, Imaging, Communications, Computing & Simulation)
• Skills and Training programme
• Industrial Strategy Challenge Fund for Industry-led Innovation
• National Quantum Computing Centre
• Strategic Partnerships and International participation
• 10-year Quantum Strategy led by UK Government

2019 – 2024 The QCS Hub
• The UK National Quantum Computing & Simulation Hub
• Five-year research and technology programme with £25m
funding, following on from the 2014-2019 NQIT Hub
• Objective: to create a quantum information economy in the UK
• Focus on QC&S technologies, both near-term (NISQC) and long-
term (UFTQC)
• 17 participating universities, 43 Co-Investigators, led by Oxford
• 28 companies and organisations offering support
• Supporting the UK National Centre for Quantum Computing

QCS Hub Partners
Academic partners Industrial partners
Airbus Defence & Space
BP
BT
Cambridge Quantum Computing Limited
Creotech Instruments SA
D Wave Systems
Defence Science & Tech Lab
Element Six
Fraunhofer Institute
GlaxoSmithKline
Gooch & Housego
Heilbronn Institute for Mathematical Research
IQE Ltd
Johnson Matthey
M Squared Lasers
National Cyber Security Centre
National Physical Laboratory
Oxford Instruments Ltd
Oxford Quantum Circuits
Oxford Sciences Innovation
QinetiQ
Quantum Machines
Quantum Motion
QxBranch
Rigetti & Co
Rolls-Royce
The Alan Turing Institute
Trakm8 Ltd

Connecting for Positive Change
KTN connects ideas, people and
communities to drive innovation that
changes lives.

The goals of this workshop
• Cryogenic electronics is of critical importance in many fields including quantum
technologies, astronomy and particle physics
• This event is designed to bring scientists, engineers and industry across all relevant
disciplines together to advance the integration of electronics at cryogenic
temperatures and combine resources to solve common challenges.
• With this meeting, we hope to progress towards demonstrating the relevance and
market size of cryogenic electronics.
• We present a state-of-the-art picture for all relevant stakeholders and welcome
foundries and industry stakeholders interested in further engagement with this
technology.

Structure of the meeting
• Recent advances in cryogenics- Prof Richard Haley – University of Lancaster
• User Area talks:
• Explain application area and what actually matters
• List types of cryogenic electronics required
• Explain specifications required for this particular user area
• Technology talks:
• Explain the state of the art for a particular cryogenic technology
• Describe different technology solutions
• Give an outlook of what is possible

User areas:
• Quantum computing with superconducting qubits – Dr Peter Leek, University of
Oxford
• Quantum computing with trapped ions – Dr Sebastian Weidt, University of Sussex
and Universal Quantum
• Quantum computing with solid state spin qubits – Prof John Morton, Quantum
Motion
• Particle physics - Prof Edward Daw, University of Sheffield
• Terahertz imaging - Dr Simon Doyle, University of Cardiff
• Applications for single photon detectors – Prof Robert Hadfield

Technology talks:
• Single photon detectors - Prof Robert Hadfield, University of Glasgow
• Field programmable gate arrays - Prof David Riley, University of Sydney
• Interconnected multiplexers – Dr Thomas Ohki, Raytheon BNN
• Cryogenic CMOS – Prof Eduardo Charbon, École Polytechnique Fédérale de Lausanne
• Amplifiers – Jonathan Williams, National Physical Laboratory
• Millikelvin electronics – Dr Edward Laird, University of Lancaster
• Signal generation and control - Oleg Mukhanov, SeeQC
• Digital to analogue converters – Mr Michael Sieberer, Infineon

House keeping
• We have created slack channels to facilitate discussion during the meeting and
beyond, you can find them here:
https://join.slack.com/t/cryogenicelectronics/shared_invite/zt-io3qt3fo-
8caTGQDdp1~lqVezzg62yg
• This meeting should be viewed as the starting point of an interesting discussion
• Please stick to your allocated time including questions and answers
• Please continue discussion on the dedicated slack channels
• We will paste the location of the slack channels in the zoom chat

Equality and Diversity
• In collaboration with the KTN, we will have a Equality and Diversity session just
before the lunch break
• Najwa Sidqi, a quantum physicist will give a five minute introduction on progress
and strategy in the KTN to promote D&I
• This will be followed by an interactive discussion where we ask speakers and
members of the audience to participate in the discussion to promote D&I in the field
of cryogenic electronics

Quantum Technologies Innovation Network: Cryogenic Electronics
October 2020
Richard P. Haley
Low
Temperature
Ultra
Cryogenics: innovative technology
and fundamental science

Outline
§ Cryogenic platforms – from wet to dry
§ Enabling technologies
• Cooling
• Measurement chain
• Environment
§ Further innovation
• Measurement & control
• New materials
• Shielding
• Colder?
Quantum Technology Centre
Clean room and nanofabrication
Molecular Beam Epitaxy
Ultra low temperatures
IsoLab

Cryogenic Platforms
- from wet to dry
“Wet” helium:
• Expert knowledge
• Specialist Infrastructure
• Cryogen supply chain
• Labour intensive
“Dry” cryogen free:
• Push a button on your phone…

Enabling technologies
- “Moore’s Law” for Cooling
Commercial
State-of-the-art

- Cooling
Reduce thermal fluctuations
Potential gains:
• Longer qubit coherence times.
• Larger quantum annealer systems.
• Improved quantum sensor S/N.
• Improved metrology standards.
• New collective behaviours emerge
(eg. superconductivity in new materials).
• Other new phenomena.
BUT it can have consequences for
control and measurement.

- Measurement chain
Cold metal of
refrigerator (𝑇!"#)
Phonons (𝑇!)
Electrons (𝑇")
Cryogenic electronics,
wiring & filtering
(𝐦𝐊 𝐭𝐨 K)
DEVICE
Environment Measurement
& control
Cooled wires (~ 𝑇!"#)
Room temperature
electronics (300 K)
Noise and heating go hand-in-hand
Need to keep devices “cold and clean”

- Environment
Isolate devices from as much external
influence as possible…
• Thermal noise.
• Instrumental noise.
• Environmental EM noise.
• Vibration.
• Power.
• People.
… then pollute it with measurement noise as
carefully as possible to do something useful!
(Or try to discover what signals appear after
after everything else is accounted for.)

Further innovation
- Measurement & control
Need new methods for:
• Device control
• Signal generation
• Signal amplification
• Signal conversion
Need to explore:
• Multiplexing
• Cryo-CMOS
• Miniaturisation
• On/Off-chip?
Need to think about:
• Heat sinking & load
• Noise load & filtering
• Connectors
• Industry standards?

Further innovation
- some more open questions
New materials
• “New” semiconductors
• Graphene
• Other 2D
G-SQUID
Environment (not buildings)
• Superconducting shields
• Active shielding
• Immersion

Further innovation
- go colder, easier?
Adiabatic demagnetisation
Bath of nuclear spins cool
electrons as the magnetic
field is reduced.
Demag material can be on-chip.
CBT device – thermometer & noise-meter
~1 mK for
1,000s of
seconds
NOT TO SCALE
CBT islands
ALD dielectric
Sputtered metalisation
1
1.5
2
2.5
3
3.5
4
5
6
7
8
10
12
14
16
20
24
28
32
1000 2000 3000 4000
Te(mK)
Dry Fridge - Single stage demag
Dry Fridge - Optimised 3 stage demag
Wet Fridge - Single stage demag
Wet Fridge - Optimised 2 stage demag
0
1
2
3
4
5
6
7
0 1000 2000 3000 4000 5000
B(T)
Time (s)
Ren
Rep
RK
RWF
Phonons
Tp , Cp
Electrons
Te , Ce
Nuclear spins
Tn , Cn
Substrate
Oﬀ-chip
wiring
˙Qpar
(a) (b)
On-chip conductor

Facilities available at
Aalto University
Basel University
CNRS Grenoble
Heidelberg University
Lancaster University
Royal Holloway UL
SAS Košice
TU Vienna
8 EMP Institutions
3 Technology Partners
6 Industrial Partners
www.emplatform.eu

Aalto
University
Heidelberg
University
Basel
University
Technical
University
Vienna
CNRS
Genoble
Lancaster
University
Slovak
Academy
of Sciences
Royal
Holloway
Physicalisch
Technische
Bundesanstalt
Technical Research
Centre of Finland
Chalmers
Technical
University
Commercial Partners Technology PartnersInstitutions
European Microkelvin Platform

Low
Temperature
Ultra
Thank you!

Become a User:www.emplatform.eu
Available Cryostats / Sample Environment:
• 15 Microkelvin demagnetisation refrigerators
• 30 dilution refrigerators (dry & wet)
• Rotating cryostats, high frequencies,
strong magnetic fields, clean rooms, …
User Access to EMP
• Access to EMP facilities free of charge
• Travel and local expenses are covered
• Logistical and technical support
About EMP
• Provide access to low temperatures
across communities
• Drive forward inter-related areas of quantum materials, nanoscience,
and quantum technology
• Generate knowledge, applications, and commercial opportunities

Superconducting Qubits
Peter Leek

QCS Cryo-Electronics 2020 — Peter Leek — Superconducting Qubits /13
Outline
2
1. Physics primer on superconducting qubits
2. State of development of quantum computers
3. Cryogenic/microwave control platform for SQs

Basic physics of linear electric circuits
3
C L R
Typical values for
µm-mm-scale circuits
C ⇠ 1 pF
L ⇠ 1 nH
!/2⇡ ⇠ 5 GHz
V = Q/C V = IRV = L
dI
dt
=
1
L
d
dt
! = 1/
p
LC
LC resonator
d2
dt2
+ p
LC
= 0
Frequency
Magnetic ﬂux 
Electric charge
Position
Momentum

How do we make circuits quantum?
4
kBT < ~! —> use high frequencies [~10 GHz] 
—> use low temperatures [~10 mK]
• We need to get to the ‘ground state’ / remove thermal excitations
—> superconductors 
—> good microwave engineering
• We need low dissipation (high Q) circuits for quantum coherence
ˆH = ~!(ˆn +
1
2
)

How do we make qubits?
5
• Linear resonator
• Equally spaced levels
• Not a qubit!
• Nonlinear resonator
• Unequally spaced levels
• Works as a qubit (e.g. lowest two levels)
Josephson junction
100-nm-scale 
overlap between 
superconducting 
electrodes 
(fabrication critical!)
Qubit
0
1

Building more complex circuits
6
• Resonator coupled to qubit provides mechanism for readout
• Resonator (and good packaging engineering) protect the qubit
from the environment (enabling high coherence)
Qubit
0
1
Coupling
‘Circuit QED’

Examples of real circuits
7
5 mm
Error detection
Z0Z2
| 〉 = |000〉+ |111〉
Initialize Recover
| 〉
Repeat
Qubits
Measurement
200 μm
Control
b
c
0
2
4
QA QB
0 00
1 10
0 11
1 01
Data qubitMeasurement qubit
Repetition code (1D): protects from X errors
a
Surface code (2D): protects from X and Z errors
ˆ ˆ
Z2Z4
ˆ ˆ
ZAZB
ˆ ˆ
Ψ
Ψ
Figure 1 | Repetition code: device and algorithm. a, The repetition code is a
one-dimensional (1D) variant of the surface code, and is able to protect against ^X
(bit-flip) errors. The code is implemented using an alternating pattern of data
and measurement qubits. b, Optical micrograph of the superconducting
quantum device, consisting of nine Xmon21
transmon qubits with individual
control and measurement, with a nearest-neighbour coupling scheme. c, The
repetition code algorithm uses repeated entangling and measurement operations
which detect bit-flips, using the parity scheme on the right. Using the output
from the measurement qubits during the repetition code for error detection,
a
Data error
Measurement error
Data
error
b
Error propagation in quantum circuit
De
e
Data error
datameasurements
Time
Error connectivity graph
Figure 2 | Error propagation and identification. a, The quantum cir
three cycles of the repetition code, and examples of errors. Errors prop
horizontally in time, and vertically through entangling gates. Different
lead to different detection patterns: an error on a measurement qubit (
detected in two subsequent rounds. Data qubit errors (purple, red, blue
detected on neighbouring measurement qubits in the same or next cycle
errors after the last round (blue) are detected by constructing the final se
of ^Z^Z eigenvalues from the data qubit measurements. b, The connectivi
graph for the quantum circuit above, showing measurements and possib
patterns of detection events (grey), see main text for details. The exampl
detection events and their connections are highlighted, and the correspo
detected errors are shown on the right, which when applied, will recover
input data qubit state.
UCSB: Kelly et al., Nature 519, 66 (2015)
Spring et al., PR Appl. 14, 024051 (2020) Stehli et al., APL 117, 124005 (2020)

Current status in SQ quantum computing
8
53 qubits
1Q errors ~ 0.2%
2Q errors ~ 0.6%
T1, T2 ~ 10-20 µs
25
1Q error
map
Google, Nature 574, 505 (2019)
IBM has 10+ devices online
Best device has 28 qubits
1Q errors < 0.5%
2Q errors < 2%
T1, T2 ~ 50-150 µs
Many other commercial and
academic activities, huge scope for
innovation e.g. active research on
new qubits, circuit designs,
couplers, gates, control methods…
Good recent review: 
Superconducting Qubits: Current State of Play 
Kjaergaard et al., Annu. Rev. CMP 11, 369 (2020)

UK Superconducting circuit scene
9
Commercial ac+vity
Mar+n Weides
Philip Meeson
Oleg Astaﬁev
Paul Warburton
Eran Ginossar
Peter Leek
Yuri Pashkin
Academic research groups
Malcolm Connolly
Sebas+an de Graaf
Tobias Lindstrom

Cryogenic/microwave platform
10
Dilution refrigerator platform
~10 mK temperatures
Large volume, cooling power,
wiring and component density
Precision microwave control
Many-channel precision analog control
electronics and signal conditioning. Some
room temperature, some cryogenic

Basic control setup for superconducting qubits
11
Joseph M. Rahamim 3.1. CONTROL AND MEASUREMENT SETUP
Amplifier
Circulator
Band-pass filter
Attenuator
Microwave switch
ADC
Voltage source
VDC
IQ Mixer
Microwave source
NbTi-NbTi
DCloom
-20dB-20dB-20dB
VDC
EMT
DAC R
-30dB
DAC Q
Approx. plate
temperature
J. Rahamim, DPhil thesis, Oxford (2019)

News from the lab in Oxford
12
Coaxial
qubit
Readout
resonator
Control
Line
Readout
Line
Substrate
b ca
a 0 akx
32
44
f(GHz)
5 mm
4 qubits (uncoupled)
1Q errors ~ 0.02%
T1, T2 ~ 100-150 µs
Very low control and
readout crosstalk
Paper in preparation
Modelling enclosures for large scale.. circuits
Spring et al., PR Appl. 14, 024051 (2020)
..coaxial circuit QED with out-of-plane wiring
Rahamim et al., APL 14, 024051 (2020)

Acknowledgements
13
Mustafa Bakr
Giulio Campanaro
Shuxiang Cao
Vivek Chidambaram
Simone Fasciati
Boris Shteynas
Peter Spring
Takahiro Tsunoda
Brian Vlastakis
James Wills
Martina Esposito*
Salha Jebari*
Einar Magnusson*
Riccardo Manenti*
Matthias Mergenthaler*
Ani Nersisyan*
Andrew Patterson*
Michael Peterer*
Joseph Rahamim*
Kitti Ratter*
Giovana Tancredi*
*alumni

Superconducting Single-Photon Detectors
Robert Hadfield
Cryogenic Electronics
QCS QT Hub & KTN
Online Event
29th October 2020

The University of Glasgow, UK
James WattLord Kelvin
Past
Founded 1451:
World’s 4th oldest English-speaking
University
Famous alumni:
Robert Stirling, Lord Kelvin, James Watt
Present
The James Watt Nanofabrication Centre
http://www.jwnc.gla.ac.uk
The QUANTIC Quantum Technology hub
http://www.quantic.ac.uk
(one of four national QT hubs launched in
2015, renewed in 2019)
Stirling

Quantum Sensors Group
@QuantumSensors
Robert Hadfield ● Cryogenic Electronics ● 29th October 2020

Superconducting Quantum
Technologies @Glasgow
Dr Alessandro Casaburi
Superconducting detectors & readout
Professor Martin Weides
Quantum Circuits
Dr Kaveh Definazari
Hybrid quantum devices

Superconducting single-photon detectors
Robert Hadfield
Superconducting nanowire single-photon
detector: concept & evolution
Application example:
single photon LIDAR
Advances in cryogenics for SNSPDs
Overview

What is a photon?
• Einstein: light is comprised of quantised
electromagnetic energy
E = hv= hc/λ
• Energy ( E) inversely proportional to
wavelength (λ)

InGaAs SPADs
Detectors
Wavelength
Photomultipliers IR PMTs
Si SPADs
Superconducting detectors
Photon-counting technology
FPA solid body model
ROIC
GmAPD
PDA
MLA
Ceramic interposer
Housing
Lid
TEC
Hadfield Nat. Photon. 3 696 (2009)

Key Properties
• Wide spectral range (UV – mid IR)
• Operates at 4 K (not mK)
• Free running (no gating required)
• High single photon detection efficiency
• Low dark counts
• Low timing jitter
• Short recovery time
A rapidly improving
technology!
Original Concept: Gol’tsman et al Applied Physics Letters 79 705 (2001)
Topical Review: Natarajan et al Superconductor Science & Technology 25 063001 (2012) Open Access
News & Views: Hadfield Superfast Photon Counting Nature Photonics 14 201 (2020)
Superconducting nanowire
single photon detector

Superconducting nanowire
single photon detectors
Development Trends
Near unity efficiency
Erotokritou et al. SUST 31 125012 (2018)
Ultra-low timing jitter
Korzh et al. Nat. Photon. 14 250 (2020)
Mid infrared sensitivity
Taylor et al Optics Express 27 8147 (2019)
Prabhakar et al Sci. Adv. 6 eaay5195 (2020)
Large arrays & readout
Wollman et al. Optics Express 11 247 (2019)
Miki Applied Physics Letters 122 262611 (2018)

Russia Scontel
UK Chase Cryogenic Research
NL Single Quantum
Switz. ID Quantique
China Photon Technologies
USA PhotonSpot
USA Quantum Opus
Commercialization of SNSPDs

SNSPD Applications
Quantum Key Distribution
Loop-hole free Bell test Optical Quantum Computing
Fault testing for Integrated Circuits
Singlet oxygen luminescence dosimetry
Single photon source characterization
Single photon LIDAR
Deep space communications
Infrared astronomy
Fluorescence Spectroscopy
Optical neuromorphic computing
Fibre Raman Temperature Sensing
Single plasmon detection
Dark Matter
detection
Quantum repeaters
Quantum memory
Entangled photon sources
Single photon OTDR
Ion Trap Quantum Computing

~3K
Closed-Cycle
Refrigerator
Laser Source
λ = 1560 nm
TCSPC Module TCSPC Card
SNSPD
Fibre Splitter
APD Trigger
Detector
10%
Start
Scanning
Transceiver
90%
Computer
80mm Aperture, 500mm Focal Length
Uncooperative
Target
Stop
Laser:
<250 μW Average Power
50 MHz Repetition rate
~1 ps Pulse width
50 MHz
Time-of-flight single photon
depth imaging
Key Collaborator: Gerald Buller, Heriot-Watt University, UK

Imaging and Remote Sensing
Key collaborator: Gerald Buller
McCarthy et al. Optics Express 21 8904 (2013)
SNSPDs have allowed us to move to 1550 nm
wavelength, enabling eye real-time safe depth
imaging over kilometre distances.

Imaging and Remote Sensing
Key collaborator: Gerald Buller
Taylor et al. CLEO 2020 SM2M.6 Free Online
Recent improvements in SNSPD timing resolution
are an exciting prospect for this application.
40
30
20
10
0
-10
-20
mm
30 m range, λ=1.55 μm Timing Jitter=~13 ps => millimetre depth resolution

Mid infrared photon
counting with SNSPDs
Optical Parametric Oscillator source
1-4 µm (Chromacity, UK)
First SNSPD jitter, efficiency and
LIDAR tests at λ = 2.3 µm
SDE=1.5%
300 ps
FWHM
jitter
System detection efficiency @2.3 µm T=2.5 K

Mid infrared photon counting
LIDAR with SNSPDs
First SNSPD photon counting LIDAR
measurements at λ = 2.3 µm
Taylor et al Optics Express 27 8147 (2019)

• Based on SHI RDK 101D cold head and
CNA 11C compressor
• Weight of cold head/compressor 50kg
• Fits easily into standard 19” rack
• Air cooled
• 100 mW cooling power at 4.2 K
• 1 kW from 13 A plug
• Commercially available
(under £20k for cold head + compressor)
Practical cooling for SNSPDs

• Cooling technology developed by Rutherford
Appleton Laboratory UK for Planck Space
Telescope (launched May 2009)
• Combined Stirling/Joule Thompson mechanism
• Weight of cold head/compressor 5kg
• 3 mW cooling power at 4.2 K
• 120 W from a battery
• Able to withstand 3000 g vibration at launch
• Bespoke item
Development Plan:
2016: single photon detector prototype
demonstration (QUANTIC)
2019: redesign for simplified manufacture (ERC)
2024: commercial mass production (funding?)
Practical cooling for SNSPDs

UK Quantum Showcase November 2016

See also: Nature Photonics Research Highlight, Physics World,
Laser Focus World, NanoWerk etc.

Robert Hadfield
Conclusions
• Superconducting nanowire single photon detectors (SNSPDs) are the leading
technology for infrared photon counting.
• SNSPDs boost a range of emerging applications, including infrared single
photon LIDAR.
• As we scale up SNSPDs to large arrays and cameras, cryogenic readout
electronics and multiplexing is critical.
• Reducing the size, weight and power of SNSPD systems is a priority for wider
adoption. We have demonstrated a compact 4 K cooling platform for SNSPDs.

Robert Hadfield
Collaborators
Sponsors

Cryogenics in particle physics
Ed Daw, The University of Shefﬁeld
ADMX
iment
sent.
ions with
(460-860
mplifiers.
sioning
or
gion is
8
Typical run cadence when data taking starts!
2!
-  Inject broad swept RF signal to record cavity
response. Record state data (temperature
sensors, hall sensors, pressure, etc.).!
-  Integrate for ~ 80 seconds (ﬁnal integration time
based on results from cold commissioning).!
-  Move tuning rod to shift TM010 & TM020 modes
( ~ 1 kHz at a time).!
-  Every few days adjust critical coupling of TM010
& TM020 antennas.!
!
-  Anticipated scan rate ~100 MHz (0.5 μeV) every
3 months!
1
[for UK
quantum
electronics
one-day
meeting]

Broad view
2
Particle physics
Accelerator Non accelerator
Superconducting
magnets
Dark matter
searches
Low energy
standard
model
testsParticle
(eg WIMPs)
Wave
(eg axions)High energy
particle
families
(standard
model)
High mass
Low mass
Superconducting
magnets
Ultra-low-noise
electronics
kinematic detectors

Dark Matter and
Axions / ALPs
3
Most of the matter in the universe…
…is probably dark matter
CANDIDATES
Particle-like: eg, WIMPs.
some activity in ultra-cold
liquid helium as a detector.
Wave-like: e.g., axions.
very light, may be detectable
by conversion to RF/UHF
photons in a cryogenically
cooled resonant cavity.
Photon signal at the
yocto-watt (10-24 W) level

Resonant detectors
for halo axions
4
~Ea = g ~B
@a
@t
~B

Quantum electronics of todays
most sensitive axion detector
5
300 K
4 K
1 K
100 mK
300 mK
weak
port
(2)
cavity
bypass
(3)
output
(1) hot
load
cavity
MSA
HFET
DC
block
50 Ω
A
low pass
filter
S1
C1
C2
S2
S3
(C1 C2
LNF LNC A
0.085
NbTiNbTi085 1
300 K
4 K
1 K
100 mK
250 mK
weak port
(2)
cavity
bypass
(3)
output
(1)
hot load
cavity
JPA
HFET
pump
(4)
50 Ω
C1
C2
A
C3
S1
(C1 (C1 C3
c ⌘ 2⇡R2
I0C/ 0
I V
300 K
4 K
1 K
100 mK
300 mK
weak
port
(2)
cavity
bypass
(3)
output
(1) hot
load
cavity
MSA
HFET
DC
block
50 Ω
A
low pass
filter
S1
C1
C2
S2
S3
(C1 C2
LNF LNC A
0.085
NbTiNbTi085 1
300 K
4 K
1 K
100 mK
250 mK
weak port
(2)
cavity
bypass
(3)
output
(1)
hot load
cavity
JPA
HFET
pump
(4)
50 Ω
C1
C2
A
C3
S1
(C1 (C1 C3
c ⌘ 2⇡R2
I0C/ 0
I V
R
V
I
+
+
a ⇡ (n ± 1/4) 0
V /@ a
. L ⇡ 1.5
50 ⌦
/2 ⇡
/2 !0
! = !0( in + end)/2⇡
x ( x/2) = iZx/Z0 Zx
Z0
Wet cryogenics + dil fridge, 150mK base temperature

Possible next steps
6
• Colder. 10mK with dry ‘quantum computing’ style fridge.
• Larger. 1m magnet bore
• Quieter. Next-generation JPAs, TWPAs, Qubits, bolometers.
• More. Resonances, that is….Replace ‘classical’ cavity
resonance with a feedback circuit. 100 parallel axion searches
GC
GW
H(s)
A
Cold Warm
50
50
Resonant filter
Attenuator
show that using existing amplifier technology it is possible nevertheless to152
maintain a good signal-to-noise ratio for mode oscillations around the feed-153
back loop. Figure 4 shows a more realistic arrangement of amplification154
stages as implemented in a representative axion search. This noise budget is155
approximate; in practice the a detailed noise model of the electronics must156
be constructed to understand the spectral content of the noise background,157
especially in the vicinity of sharp features such as high Q resonances. The
150 mK
20 dB
MSA HEMT
20dB
HEMT
20dB
Digital
Signal
Processing
Attenuator
150 mK 2.5K 2.5K 100 K
Cryogenic Room Temperature
150 mK 300 K
150 mK
50
50
A B C D E
F
G
Room
Temp
Amps
0dB, 5V full scale
noise: 1 =5V/29
130 dB
70dB
Figure 4: A schematic of the practical implementation of feedback electronics, showing
ultra-low-noise receiver electronics common to this proposal and more conventional cavity
searches, as well as the feedback path to and from the capacitor, operated far below
cut-o↵, threaded by a large static magnetic field. MSA and HEMT are acronyms for
‘microwave squid amplifier’ and ‘high electron mobility transistor’, respectively. The noise
performance of MSAs, critical to these searches, are discussed in [20, 21]. HEMT amplifiers
Cold!
• All-cryogenic version!
FPGA

Summary
7
•Bleeding edge quantum electronics is becoming crucial
for some non-accelerator particle physics experiments.
•Activity in the UK through the new ‘Quantum Sensors for
the Hidden Sector’ initiative (qshs.shef.ac.uk)
•Aim at a UK based axion / axion-like particle facility
including a 1m bore magnet with a 10mK insert.
Collaboration of Shefﬁeld, Lancaster, Cambridge, RHUL,
Oxford, UCL, NPL, Liverpool
•Collaboration with ADMX
•(If dark matter isn’t your thing), maybe an ultra cold
Johnson-quiet vacuum space instrumented with ﬁeld
sensors at or below the standard quantum limit is
interesting anyway. Probing states close to the vacuum
state might unearth surprising things, as well as axions.
•Realising this future is all about the technology.

Quantum Technology Innovation Network: Cryogenic Electronics
From Astronomy to Security
The Combined Output of STFC funded activity in Cryogenics,
Detector Development and Quasi-Optical Components
Dr Simon Doyle – Cardiff University

STFC Knowledge Exchange 2020Quantum Technology Innovation Network: Cryogenic Electronics
Scope of talk
• Detector Technology – Why use Kinetic Inductance Detectors?
• Optical filtering at mm and THz frequencies
• Cryogenics – Simple and compact solutions for continuous cooling
• Current imaging systems developed at Cardiff
• Future systems for security

Motivation for superconducting detector development - Astronomy
• Semi-conductor technology Limited to wavelengths of order 200um (1.5 THz)
• Heterodyne receivers are typically noisy and not practical for large format imaging arrays
• Bolometers have sensitivity but poor multiplexing ratios
• Cryogenic detectors bring significant increase in sensitivity at mm and THz wavelengths
3

Lumped Element Kinetic Inductance Detectors (LEKIDs)

Kinetic Inductance Detectors – Simple Multiplexing
e applies to the LEKID but is achieved by varying the value of the capacitor
resonator. This idea is demonstrated in ﬁgure 1.3.
3: Multiplexed LEKID schematic. Here the resonant frequency of each resonant
s varied by varying the value of the capacitor. This makes it possible to multiplex
EKID devices onto a single feedline
relevant superconductivity and microwave theory for the operation of a
ice are quite complex and will be studied in detail throughout the following
.

Filters & Meta-Material
Band selection – How much out-of-band
power do we need to reject?
• Considering thermal power only:
• Total power through a window 35cm in diameter.
𝑃 = 𝜎𝑇! 𝐴 ≈ 44𝑊
• In band power on a horn couple detector over a
typical 50GHz bandwidth
𝑃 = 2𝐾" 𝑇∆𝜐 = 40𝑝𝑊
• 1800 detectors
#!"!
##$ %&$'
=
!!$
%&''×!')$
≈ 6×10&

Filters & Meta-Materials
• A technology unique to Cardiff’s Astronomy Instrumentation Group
• Enables exquisite out-of-band radiation rejection
• Crucial to achieving the sensitivity required for passive imaging.

Sub-K Cooler Technology – Continuous sorption coolers
A B
• Continuous version of a sorption cooler developed with Chase Cryogenics
through an IPS program. Temperature range ≈ 250 – 350 mK
Klemncic et al., Rev. Sci. Inst., 2016

Sub-K Cooler Technology – Miniature Dilution Units
• Developed with Chase Cryogenics
• Temperature range < 100 mK

Mexico UK Camera for Astronomy (MUSCAT)
• A 1500 pixel LEKID based mm wave camera for the LMT
• Large volume cooled with continuous cooling (Sorption and MDR)
• Scheduled for deployment within next few weeks (Covid permitting)

Mexico UK Camera for Astronomy (MUSCAT)
• First-generation MUSCAT: 1,500 1.1-mm LEKIDs
• Hex-packed across the focal plane with 1𝐹𝜆 spacing
• Horn-coupled with anti-reflection layer
• Polarisation insensitive detectors

Security Imaging
• Many materials transparent at mm wavelengths
• Rapid imaging required photon noise limited detectors – KIDs ✓
• Commercially deployable system needs to be:
• Cryogen free with simple infrastructure – PTC and Continuous sorption Cooler ✓
• Cryogenically simple and cost effective – LNAs are only active readout components ✓
• Simple to operate – System is automated (push button on→ 250mK) ✓

Security Imaging
• A proof of concept camera was deployed at Cardiff Airport in December 2018.
• The system was combined with AI for threat detection.

Security Imaging
• Person scanner easily adapted to truck scanning.
• Soft sided trucks are transparent to mm waves.

Moving forward
• Investment and research funding required to develop a system
optimized for air passenger security screening:
• Will develop continuous cooling system
• Will develop new scanning optics
• Will develop new readout electronics
• Dual colour detector arrays
• Ultimate aim - to have a robust system that can be certified
and deployed in air-passenger screening (ECAC and TSA)

Conclusion
• Simple Cryogenics THz and mm imaging systems have been
demonstrated for both Science based and Industrial application
• Cryogenic detectors have clear advantages in speed and sensitivity
• Such systems are made possible with simple and scalable detector
LEKID arrays that require minimal cryogenic readout electronics and
standard microwave warm electronics
• These systems can work from cryogen free platforms with continuous
sub-K cooling.
• Security imaging systems are a good example of research feeding
advances in industry
Any questions?

INTRODUCTION TO THE AFTERNOON
SESSION

What have we learnt so far?
User talks
• Superconducting qubits
• Trapped ions
• Solid state qubits
• Applications of single photon detectors
• Cryogenic electronics in particle physics
• Terahertz imaging
Technical overview on
• Cryogenics
• FPGAs
• Interconnected multiplexers
• Single photon detectors

What next?
Technical overview on
• Cryogenic CMOS
• Cryogenic signal generation and control
• Millikelvin electronics
• Cryogenic digital to analogue converters

Things to do
• Identify whether there are common challenges in the different user areas!
• Is any of the technologies explained relevant for your user area?
• Can we learn from each other?
• Should we work together in order to be faster, to make it cheaper?
• Consider tension of open access university research and the commercial interests of companies involved.
• How does that work with IP?

Please engage in discussion
• Make use of the question time after each talk, don’t be shy!
• Make use of the slack channels for much more detailed discussion:
https://join.slack.com/t/cryogenicelectronics/shared_invite/zt-io3qt3fo-8caTGQDdp1~lqVezzg62yg

Cryogenic CMOS
for Quantum Systems
Edoardo Charbon
EPFL, Lausanne, Switzerland
Quantum Technology Innovation
Network: Cryogenic Electronics
October 29th, 2020

Acknowledgements
© Edoardo Charbon 2020 22
aqualab © 2020 Edoardo Charbon
http://aqua.epfl.ch
TU Delft
Lieven Vandersypen
Menno Veldhorst
Giordano Scappucci
Xiao Xue
Andrea Corna
and many more
Intel
Stefano Pellerano
Sushil Subramanian
Charles Jeon
Farhana Sheikh
Brando Perez
Esdras Juarez Hernandez
… and many more

Semiconductor quantum dots
Superconducting circuits
Impurities in diamond or silicon
Semiconductor-superconductor hybrids
Source:L.Vandersypen,2017
Solid-state Qubit Implementations
4© 2020 Edoardo Charbon

The Power of Superposition
© 2020 Edoardo Charbon
1 qubit…........................................................................2 states
2 qubits.........................................................................4 states
N qubits........................................................................2N states
40 qubits: 1012 parallel operations
300 qubits: more than the atoms in the universe
5

But, Qubits are Fragile
• Environment can cause decoherence due to
dephasing and relaxation
• Fidelity
y
z
x
|0ñ
|1ñ
y
z
x
|0ñ
|1ñ
Dephasing Relaxation

Interfacing Qubits with Classical World
• Carrier frequency: 100 MHz – 15 GHz, 70 GHz
• Pulses: 10 – 100 ns
[DiCarlo]
[L.Vandersypen]
Control
Read-out
Quantum bits (qubits)
Quantum
processor
(≪ 1 K)
Classical
controller
© 2020 Edoardo Charbon 7

Interfacing Qubits with Classical World
• Carrier frequency: 2 – 20 GHz
• Pulses: 10 – 100 ns
• Readout techniques for spin qubits: ESR, EDSR
Control
Read-out
Quantum bits (qubits)
8
Quantum
processor
(≪ 1 K)
ESR: Electron spin resonance – EDSR: Electric dipole spin resonance

Qubit Transition from |0> to |1>
© Jeroen van Dijk

Qubit Fidelity
• State-of-the-art spin qubits: fidelity < 99.9%
• Target: 99.99% (four 9’s)
– This translates to a SNR > 44 dB for a bandwidth of 25 MHz
J. v.Dijk et al., PRA 2019

Quantum Computing Stack
© H. Homulle 2016
11
In this talk

A Real-life Quantum Computer
4 K
20 mK
300 K
x 8 qubitsx 8 qubits
77 K
13

Today’s Solution
Image: Google Bristlecone. Taken from: J.C. Bardin et al.,
“An Introduction to Quantum Computing for RFIC
Engineers” , RFIC Symposium 2019

Proposed Solution
• Proposed solution
– Electronics at 4 K
– Only connections to 4 K to 20 mK are needed
• Ultimate solution
– Qubits at 4 K
– Monolithic integration
T = 20 mK T = 4 K T = 300 K
Electronic
Readout
& control
T = 20 mK T = 4 K
Electronic
Read-out
& control
T = 300 K
[Ristè et al. 2014-15]
5-qubit computer

Electronic Readout & Control
20-100mK
1-4K
300K
ADC
ADC
DAC
DAC
MUX DEMUX
Quantum
Processor
T Sensors Bias / References
TDC
Digital
control
(ASIC/
FPGA)
OPTICAL GUIDE APD
E. Charbon et al., IEDM 2016

Cooling Power Issue
Courtesy: Oxford instruments
20 mK
100 mK
4 K
70 K
300 K
Dilution refrigerator
T(K)

Scalability Issue
• Noise budget…...........................................< 0.1nV/√Hz
• Power budget (for scalability)…................. << 2mW/qubit
• Physical dimensions (for scalability)…....... 30nm
• Bandwidth (for multiplexing)…..................1-12GHz
• Kick-back avoidance

The Right Technology
Device
Lowest useable
temperature
Limit
Si BJT 100 K Low gain
Ge BJT 20 K Carrier freeze-out
SiGe HBT 4 K (or lower?) ?
Si JFET 40 K Carrier freeze-out
III-V MESFET 4K (or lower?) Lower freeze-out?
CMOS (>160nm) 4 K Non-idealities
CMOS (<40nm) 40 mK ?
Most used

CMOS at Cryogenic Temperatures
ID
VDS
VGS
FabioSebastiano,QuantumWeek,Oct.12,2020
NMOS
PMOS
• Mismatch increases
• Leakage drastically reduces
• Substrate become floating

Designing for Cryogenic Operation

1. Digital Circuits
2. Radio-Frequency Circuits
20-100mK
1-4K
300K
ADC
ADC
DAC
DAC
MUX DEMUX
Quantum
Processor
TDC
Digital
control
(ASIC/
FPGA)
OPTICAL GUIDE APD

Lowerbound in Digital Design
"!!,#$% ≈ 2
&'
(
ln 2 =36mV
!!" = !#
#
$
%
$!"%$#$
&'% 1 − %
%
$&"
'% ; !# = )#*()
#
$
+ − 1 ,*
+
,
CMOS circuits operate in subthreshold wherever this equation holds
n is the sub-threshold slope (SS) factor and ,* = .//1,
The net effect in sub-threshold regimes is a decrease of leakage currents by
orders of magnitude, implying a significant increase in the ION/IOFF ratio
24

Latchup
Latch-up has been found to be unpredictable in deep-cryogenic
operation. Latch-up immunity typically improves at temperatures
lower than RT, thanks to lower well and substrate resistance and to
higher base-emitter voltages and lower current gain of parasitic
bipolar transistors. However, shallow level impact ionization (SLII),
a mechanism for carrier generation, emerges below 50 K
25

Recommendations
A)create extensive substrate contacts and well-taps, so as to minimize the
chance of latch-up at 4.2 K;
B)resize the transistors, so as to reduce INWE and thus maximize VTH
modulation;
C)add secondary power rails to enable forward back-biasing, so as to
compensate for an increase of VTH at 4.2, in addition use low-VTH
transistors;
D)minimize the length of transistors (in contrast to conventional RT sub-
threshold standard cell design, where the opposite is generally done);
E) when useful, make the layout aware of mismatch by increasing the overall
height of the cells.
26

Example
D-Flip-flop optimized for 4K (40nm CMOS)

CooLib
• Compare ‘CooLib’ cells to foundry supplied std. cells of
TSMC40LP process
• Contains commonly
encountered digital circuits
– i.e. unsigned multiplier
• Four versions per circuit
– Static ‘CooLib’
– Domino ‘CooLib’
– TSMC40LP, restricted
– TSMC40LP, unrestricted
• One ‘true’ domino logic
implementation

Dynamic vs. Static Power at Cryo
A. Schriek, F. Sebastiano, E. Charbon, Solid-State Circuit Letters 2020

FOMs
PDP: power-delay product
EDP: energy-delay product
A. Schriek, F. Sebastiano, E. Charbon, Solid-State Circuit Letters 2020

‘CooLib’ RISC-V Implementation
FEATURES
• RISC-V (picorv32, open-source)
implemented using ‘CooLib’
• 8 Kb single-port SRAM from TSMC
• SRAM operates at nominal
voltage, core at lower voltage
• Interfacing by ‘CooLib’
level-shifters
• UART interface for serial in/output
• JTAG interface for SRAM
write/read
First Fully functional µP at 4K
A. Schriek, F. Sebastiano, E. Charbon, subm. paper 2020

1. Digital Circuits
2. Radio-Frequency Circuits
- Circulator
- PLL
- Mixer
- Qubit controller
20-100mK
1-4K
300K
ADC
ADC
DAC
DAC
MUX DEMUX
Quantum
Processor
TDC
Digital
control
(ASIC/
FPGA)
OPTICAL GUIDE APD

Qubit Controller: The Problem at Hand
2 GHz
Q1 Q32
...
Q2
2…20 GHz
37
Time domain Frequency domain

Qubit Controller
Ø Lower Speed DAC + Mixer
DAC
DAC
Q
I
LOI
LOQ
SRAM
fs = 2.5GHz
Digital
Analog: noise/linearity specifications known + feasible
2 GHz
Q1 Q32
...
Q2
2…20 GHz
38

Specifications
• Target fidelity: 99.99% for 1…10 MHz operation
Error Source Type Value Contribution
Microwave frequency inaccuracy 35.4 kHz 1-F = 12.5 ppm
(nominally 5…13 GHz) noise 35.4 kHzrms 1-F = 12.5 ppm
Microwave phase Inaccuracy 0.20 ° 1-F = 12.5 ppm
noise 0.20 ° 1-F = 12.5 ppm
Microwave amplitude inaccuracy 38.3 μV 1-F = 12.5 ppm
(nominally 17 mV, -53 dB) noise 38.3 μVrms 1-F = 12.5 ppm
Microwave duration inaccuracy 113 ps 1-F = 12.5 ppm
(nominally 50 ns) noise 113 psrms 1-F = 12.5 ppm +
F = 99.99%
39

Controller Architecture: Horse Ridge
AMPL1,1
AMPL1,2
AMPL1,3
SRAM
Cos(ω1t+Φ1)
AMPL32,1
AMPL32,2
AMPL32,3
LOI
LOQ
8GHz
Q1
6GHz
Q2
Q32
Q1
Q2
Q32
1 1
8GHz
Q1
6GHz
Q2
Q32
Q1
Q2
Q32
1
-1
8GHz
Q1
Q2
Q32
2
7GHz
NCO1
ω1
Register
Sin(ω1t+Φ1)
Φ1
Cos(ω32t+Φ32)
NCO32
ω32
Sin(ω32t+Φ32)
Φ32
SRAM
Register
11
11
Digital Analog
B. Patra, J.v.Dijk et al., ISSCC 2020
40

Controller Implementation
41
2 mm
B. Patra, J.v.Dijk et al., ISSCC 2020

Pulse Shaping

Rabi Experiment
44
B. Patra, J.v.Dijk et al.,
ISSCC 2020
RT measurement Cryo measurement

AllXY sequence
Frequency-Multiplexed Qubit Control
X. Xue, arXiv:2009.14185

2-Qubit Gate
X. Xue, arXiv:2009.14185

Comparison Table
Horse Ridge (ISSCC’20) ISSCC’19 RSI’17 Spin qubit setup
Operating Temperature 3 K 3 K 300 K 300 K
Qubit platform Spin qubits + Transmons Transmons Transmons Spin qubits
Qubit frequency 2 – 20 GHz 4 – 8 GHz < 20 GHz
Channels 128 (32 per TX) 1 4 1
FDMA Yes, SSB No Yes, SSB No
Data Bandwidth 1 GHz 400 MHz 960 MHz 520 MHz
Image & LO leakage
calibration
On chip Off chip Yes
Phase correction Yes No No No
Fidelity (expected) 99.99% - - -
Waveform/Instructions Upto 40960 pts AWG Fixed 22 pts symmetric 16M pts AWG
Instruction set Yes (2048/TX) No Yes Yes
Power / TX Analog: 1.7 mW/qubit *
Digital: 330 mW ‡
Analog < 2 mW/qubit #
Digital: N/A
850 W
Chip area / TX
Technology
4 mm2
22 nm FinFET CMOS
1.6 mm2
28 nm bulk CMOS
Discrete
components
Rack mount
*
including LO/Clock driver; only RF-Low active #
does not mention circuits included
‡ can be reduced with clock gating

In Summa
IEEE Sensors 2016
20-100mK
1-4K
300K
ADC
ADC
DAC
DAC
MUX DEMUX
Quantum
Processor
TDC
Digital
control
(ASIC/
FPGA)
OPTICAL GUIDE APD
IEEEISSCC2017
IEEE ISSCC 2017
IEEE IEDM 2016
IEEE IEDM 2016
49
IEEERFIC2019
IEEE ISSCC 2020
Cryo-Bandgap: BJTs (a), DTMOS (b)
SSC-L 2018, Cryogenics, 2018
IEEE ISSCC 2020

Realizations of 1D Qubit
Arrangements
Jones et al, PRX 8, 021058 (2018) Baart et al, Nat Nano (2017)

Proposals for Scalable Fault-Tolerant
2D Qubit Arrangements

SiMOS QD Qubit Operation at 1.5 Kelvin
1.5 K performance comparable to natSi at 100 mK !
H. Yang et al., arXiv:1902.09126
Courtesy: A. Dzurak

Platforms for the 2D Approach
• Single-shot dispersive readout
could be the core of column
readouts
• Use imaging sensor readout as
inspiration
• Use tunneling barriers as
selectors
• (limited) use of 3D stacking
• Ideally bring qubits to 1-4K,
make them CMOS-compatible
∂
∂
∂
∂
∂
∂
∂
20mK –> 1.5K
4K

Conclusions
• A quantum computer is a new computing paradigm
and as such it holds the promise to handle today’s
intractable problems
• A qubit is fragile and thus needs to be constantly
corrected to extend its coherence and to maintain
fidelity
• Cryogenic electronics for quantum computing ensures
compactness and scalability to much larger quantum
processors

IceQubes: International Workshop on
Cryogenic Electronics for Quantum Systems
June 2021, Neuchâtel - Switzerland

References
• A. Aspect, J. Dalibard, and G. Roger, ‘‘Experimental test of Bell’s inequalities
using time-varying analyzers,’’ Phys. Rev. Lett. 49, 1804–1807 (1982).
• D. Wecker, B. Bauer, B. K. Clark, M. B. Hastings, and M. Troyer, Phys. Rev. A
90, 022305 (2014).
• N.D. Mermin, “Quantum Computer Science: An Introduction,” Cambridge
University Press, 5th
printing, 2016. ISBN 978-0-521-87658-2
• M.A. Nielsen, I.I. Chuang, “Quantum Computation and Quantum
Information”, Cambridge Press, 3rd printing, 2017. ISBN 978-1-107-00217-3
• A. Montanaro, “Quantum Algorithms: an Overview”, npj Quantum
Information 2, 15023 EP (2016), review article.
• E. Charbon, F. Sebastiano, A. Vladimirescu, H. Homulle, S. Visser, L. Song, and
R. M. Incandela, IEEE International Electron Devices Meeting (IEDM) pp.
13.5.1–13.5.4 (2016).
• H. Ball, W. D. Oliver, and M. J. Biercuk, npj Quantum Information 2, 16033 EP
(2016), review article.
• L. Vandersypen, H. Bluhm, J. Clarke, A. Dzurak, R. Ishihara, A. Morello, D.
Reilly, L. Schreiber, and M. Veldhorst, arXiv preprint arXiv:1612.05936 (2016).

References
• H. Homulle, S. Visser, E. Charbon, “A cryogenic 1 GSa/s, soft-core FPGA ADC for quantum
computing applications”, IEEE Transactions on Circuits and Systems I, 63 (11), 1854-1865 (2016).
• H. Homulle, S. Visser, B. Patra, G. Ferrari, E. Prati, C.G. Almudéver, K. Bertels, F. Sebastiano, E.
Charbon, “CryoCMOS hardware technology a classical infrastructure for a scalable quantum
computer”, ACM International Conference on Computing Frontiers, 282-287 (2016).
• L. Song, H. Homulle, E. Charbon, F. Sebastiano, “Characterization of bipolar transistors for
cryogenic temperature sensors in standard CMOS”, IEEE SENSORS, 1-3 (2016).
• F. Sebastiano, H. Homulle, B. Patra, R. Incandela, J. van Dijk, L. Song, M. Babaie, A. Vladimirescu,
and E. Charbon, ACM Design Automation Conference (DAC) pp. 13:1–13:6 (2017).
• E. Charbon, F. Sebastiano, M. Babaie, A. Vladimirescu, M. Shahmohammadi, R.B. Staszewski, H.
Homulle, B. Patra, J.P.G. Van Dijk, R.M. Incandela, L. Song, B. Valizadehpasha, “Cryo-CMOS circuits
and systems for scalable quantum computing”, International Solid-State Circuits Conference
(2017).
• H. Homulle, S. Visser, B. Patra, G. Ferrari, E. Prati, F. Sebastiano, E. Charbon, “A reconfigurable
cryogenic platform for the classical control of quantum processors”, Review of Scientific
Instruments 88 (4), 045103 (2017).
• H. Homulle, E. Charbon, “Performance characterization of Altera and Xilinx 28 nm FPGAs at
cryogenic temperatures”, International Conference on Field Programmable Technology (ICFPT), 25-
31 (2017).
• D.K.L. Oi, A. Ling, G. Vallone, P. Villoresi, S. Greenland, E. Kerr, M. Macdonald, H. Weinfurter, H.
Kuiper, E. Charbon, R. Ursin, “CubeSat quantum communications mission”, EPJ Quantum
Technology, 4(1), (2017).

References
• E. Prati, D. Rotta, F. Sebastiano, E. Charbon, “From the Quantum Moore's Law toward Silicon
Based Universal Quantum Computing”, IEEE International Conference on Rebooting Computing
(ICRC), 1-4 (2017).
• H. Homulle, S. Visser, B. Patra, E. Charbon, ‘’FPGA Design Techniques for Stable Cryogenic
Operation’’, arXiv preprint arXiv:1709.04190 (2017).
• R.M. Incandela, L. Song, H. Homulle, F. Sebastiano, E. Charbon, A. Vladimirescu, “Nanometer
CMOS characterization and compact modeling at deep-cryogenic temperatures”, 47th European
Solid-State Device Research Conference (ESSDERC), 58-61 (2017).
• D. Rotta, F. Sebastiano, E. Charbon, E. Prati, “Quantum information density scaling and qubit
operation time constraints of CMOS silicon-based quantum computer architectures”, npj
Quantum Information 3 (1), 26 (2017).
• C.G. Almudever, N. Khammassi, L. Hutin, M. Vinet, M. Babaie, F. Sebastiano, E. Charbon, K.
Bertels, “Towards a scalable quantum computer”, 13th International Conference on Design &
Technology of Integrated Systems In Nanoscale Era (2018).
• H. Homulle, E. Charbon, “Cryogenic low-dropout voltage regulators for stable low-temperature
electronics”, Cryogenics 95, 11-17 (2018).
• R.M. Incandela, L. Song, H. Homulle, E. Charbon, A. Vladimirescu, F. Sebastiano,
“Characterization and Compact Modeling of Nanometer CMOS Transistors at Deep-Cryogenic
Temperatures”, IEEE Journal of the Electron Devices Society (2018). Doi:
10.1109/JEDS.2018.2821763.

References
• JPG van Dijk, A Vladimirescu, M Babaie, E Charbon, F Sebastiano, “A co-design methodology for
scalable quantum processors and their classical electronic interface”, Design, Automation & Test
in Europe Conference (2018).
• JPG van Dijk, E Kawakami, RN Schouten, M Veldhorst, LMK Vandersypen, M Babaie, E Charbon, F
Sebastiano, “The impact of classical control electronics on qubit fidelity”, arXiv:1803.06176
(2018).
• H Homulle, L Song, E Charbon, F Sebastiano, “The Cryogenic Temperature Behavior of Bipolar,
MOS, and DTMOS Transistors in Standard CMOS”, IEEE Journal of the Electron Devices Society 6
(1), 263-270 (2018).
• H. Homulle, F. Sebastiano, E. Charbon, “Deep-Cryogenic Voltage References in 40-nm CMOS”,
IEEE Solid-State Circuits Letters, 1(5), 110-113 (2018). Doi: 10.1109/LSSC.2018.2875821.
• B. Patra, R.M. Incandela, J. P. G. van Dijk, H. A. R. Homulle, L. Song, M. Shahmohammadi, R. B.
Staszewski, A. Vladimirescu, M. Babaie, F. Sebastiano, and E. Charbon, “Cryo-CMOS Circuits and
Systems for Quantum Computing Applications”, IEEE Journal of Solid-State Circuits, 53(1), 309-
321 (2018).
• J.P.G. van Dijk, E Charbon, F Sebastiano, “The electronic interface for quantum processors”,
Microprocessors and Microsystems, Jan. 2019.
• J.P.G. van Dijk, E. Kawakami, R.N. Schouten, M. Veldhorst, L.M.K. Vandersypen, M. Babaie, E.
Charbon, and F. Sebastiano, “Impact of Classical Control Electronics on Qubit Fidelity”, Physical
Review Applied, 12, 044054 (2019). Doi: 10.1103/PhysRevApplied.12.044054.

Colder, quieter, faster:
Electronics at millikelvin temperature
Edward Laird
Lancaster University

Why operate electronics below 100 mK?
To suppress thermal fluctuations To reduce decoherence
To exploit quantum materialsTo make quantum-limited sensors
1 GHz ×
𝑘𝑘B
ℎ
= 48 mK
Qubits
Travelling-wave
parametric amplifier from
the Siddiqi group at
Berkeley
(Macklin et al, 2015)
Quasiparticles at an
interface of superfluid 3He
Semiconductor spin qubit device

Nano-force sensors for science and technology
Measuring excitations in superfluids Magnetic resonance microscopy
All force sensors are ultimately limited by thermal fluctuations.

Three challenges of millikelvin electronics
Making the device cold
Controlling a cold device
Measuring a cold device

Challenge 1: making the device cold
Cold metal of
refrigerator (𝑇𝑇𝑚𝑚𝑚𝑚𝑚𝑚)
Phonons (𝑇𝑇𝑝𝑝)
Electrons (𝑇𝑇𝑒𝑒)
Cryogenic electronics,
wiring & filtering
(mK to K)
DEVICE
Parasitic heating Joule heating
Cooled wires (~ 𝑇𝑇𝑚𝑚𝑚𝑚𝑚𝑚)
Room temperature
electronics (300 K)

Challenge 1: making the device cold

Challenge 2: Controlling a cold device

Challenge 3: Measuring a cold device
Details: Wen et al. (2018)
Schupp et al. (2018)
Transistor amplifier

Why do we want low-noise amplifiers?
So that we can measure smaller signals,
with better fidelity, in less time.
The state of the art is superconducting
amplifiers (SQUIDs and parametric
amplifiers).

Quantum devices often have many control parameters that need tuning.
With machine learning, this can be done automatically.
Moon et al., Nature Communications 11 4161 (2020)

Conclusions
What academia can do for industry:
• Testing new cooling technologies in electronics experiments.
• Measuring in very cold and isolated environments.
• Developing artificial intelligence for controlling devices.
What industry can do for the research field:
• Providing experimental technologies at scale, in a reproducible way, and
reliably.
• Making cryogenic electronics more user-friendly and cheaper.

Acknowledgements
Yutian Wen
Natalia Ares
Tian Pei
Felix Schupp
Aquila Mavalankar
Andrew Briggs
Hyungil Moon
Dominic Lennon
(at Oxford)
Saba Khan
Patrick Steger
The ULT group
(at Lancaster)

Cryogenic Digital to Analog Converters (DACs)
Michael Sieberer
29 October, 2020
https://www.piedmons.eu/
- restricted -

Motivation and Introduction
› Applied Cryogenic Electronics
– Not a new idea: G. Ghibaudo, or E. A. Gutierrez-D, 2000/2001
– Original motivation: mobility, leakage (subthreshold swing), thermal noise
– Todays motivation: integrate electronics into existing cryogenic setups
› Cryogenic Electronics for Quantum Computers
– Solid State Qubits: Qubit at ~mK, electronics usually at 4.2 K (liquid Helium)
– Trapped Ions: Experimental setups usually at about 10-20 K
› Infineon’s Access
– Received funding under EU Horizon 2020: https://www.piedmons.eu/
– Focus on developing ion traps in MEMS-technologies to increase # of ions (with UIBK and ETH)
– Cryo-electronics was originally a small part but further projects follow!
22020-10-29 restricted Copyright © Infineon Technologies AG 2020. All rights reserved.

Infineon’s Ion Traps
› Microscopic ion trap
– ion-surface: ~120 μm, ion-ion: ~100 μm
› Low dielectric exposure
› Low capacitance on RF (~10 pF)
P.C. Holz et al.: Two-dimensional linear trap array for quantum information
processing, Advanced Quantum Technologies (2020)

Physical Qubit Transport
› Qubits may be transported by quantum teleportation
› Trapped-ion qubits can also by physically moved
– Adiabatically (bandlimited)
– Hard switching (“Bang-Bang”)
› “Quantum CCD architecture”
J Alonso et al.: Quantum control of the motional states of trapped
ions through fast switching of trapping potentials, New J. Phys. (2013)
L. E. de Clercq: Transport Quantum Logic Gates for Trapped Ions, Thesis (2015)
P.C. Holz et al (2020)

Ion Shuttling
P.C. Holz et al.: Two-dimensional linear trap array for quantum information
processing, Advanced Quantum Technologies (2020)
DC
DC
RF
RF
RF
DC
DC

DC Voltages
V
z

Ion Trap: Integration of Electronics
› Several opportunities
– SPADs, laser diodes, RF oscillators, DACs, Filters, Multiplexers
› System restrictions:
– Cryostat cooling power (~1 W) -> power management
– Long and few connections -> serial data bus (maybe optical) with limited speed
– Magnetic fields, no exposed dielectric, vacuum compatible, thermal stress, …
› Packaging: Electronics in trap, chip-on-chip, separate chips
– Connections to the ion trap

Concept for 1st Demonstrator
Cryogenic
DAC
Chip
CLK
DATA
(optional)
Low Pass
Filter
8x
8x
(optional)
Analog
MUX
(Switching Matrix)
8x
V_out
V_rf,gnd
LC Oscillator
gnd
gndgnd
› Cryogenic DAC chip generates 8 different control voltages
– Output: ±10 V
– Bandwidth: ~100 kHz
– Hard noise limit for 𝑓 > 1 MHz (reference: ~120 nV/√Hz + filtering)!
› These may be externally filtered, if needed
› An analog multiplexing matrix dispatches the voltages to the trap
› Target: Proof of concept by demonstrating adiabatic ion transport

Cryogenic Electronics
› We need ±10 V
– Process of choice: Infineon 130nm bulk process + high
voltage capabilities (BCD)
› Measurements in a cryogenic needle prober
› Original CMOS model is BSIM4
– Adjust parameters for cryogenic temperatures
– Don’t rely too much on the simulator
– Identify critical parameters
› Find a concept that allows temperature independent results
Paul Stampfer: Characterization and modeling of semiconductor devices at
cryogenic temperatures, Master’s Thesis (2020)

Electron Mobility
see e.g.: Tong-Chern Ong, P. K. Ko, Chenming Hu: 50-Å gate-Oxide MOSFET's at 77 K, IEEE Trans. Electron Devices (1987).

Threshold Voltage
› The shift in threshold voltage is significant
› Check headroom in current mirrors and transmission gates
Arnout Beckers, Farzan Jazaeri, Christian Enz: Cryogenic MOSFET Threshold Voltage Model (2019)

Transconductance (𝑔 𝑚)
Yohan Joly: Impact of hump effect on MOSFET mismatch in the sub-
threshold area for low power analog applications, ICSICT (2010)
?
› Also: transistor current gain
› Usually 𝐼 𝐷 is constant
› A good estimate for 𝑔 𝑚 is
𝑔 𝑚
𝐼 𝐷
<
𝑞
𝑛⋅𝑘 𝐵 𝑇
– 38
1
V
at 300 K
– 580
1
V
at 20 K
› Do not rely on precise 𝑔 𝑚!

Noise and Power
› Thermal Noise
– RMS noise: 𝑣 𝑛
2
=
𝑘 𝐵 𝑇
𝐶
– Spectral noise:
𝑣 𝑛
2
Δ𝑓
= 4𝑘 𝐵 𝑇𝑅
– For same SNR: factor of 15 in temperature -> factor of 15 in power?
– e.g. TI DAC 8580: 500 mW @ room temperature
› Flicker Noise?

Matching
› Capacitors and polysilicon resistors do not change their
value significantly – matching is also good
› CMOS current mirror mismatch:
– Simplified:
Δ𝐼 𝐷
𝐼 𝐷
≈
𝑔 𝑚
𝐼 𝐷
⋅ ΔVth
– To limit 𝑔 𝑚/𝐼 𝐷 - use source degeneration!
– Das, Lehmann (2014): “Standard deviation of Vth below the carrier
freeze out temperature increases by a factor of 2 compared to the
room temperature value”
Vs

Current Steering DAC
M. T. Rahman, T. Lehmann: A cryogenic DAC operating down to 4.2 K.
Cryogenics (2016)
› Very fast DAC (~ 100 MHz), 32 mW power dissipation
– Control of AOMs?
– Hyperfine Qubits?
– Zeeman Qubits?
› Source-degeneration to mitigate 𝑉𝑡ℎ-mismatch
› Cell Calibration

Capacitor or Resistor DACs
› Summing amplifier configuration!
› OTA defines bandwidth, spectral noise and power consumption.
› Linearity depends on capacitor and resistor matching
› Good candidate for cryogenic DACs
2R
R R R
R2R 2R
-Vref
+
-
R
OUT

High Voltages (> 5V)
› Core devices have thin gate oxide -> unsuitable for high 𝑉𝑔𝑑
› In many smart power technologies: LDMOS devices
– unreliable @ 16 K?
– Need new devices
› Earlier breakdown of p-n junctions
R. Singh (1993)
Kong et al. 2011
Vdd
High voltage
cascode
Low voltage
gain transistor

Chip-integrated voltage sources for control of trapped ions
J. Stuart et al. (2019)
› R/2R-DAC combined with a high-voltage DAC for ±8 V
› 500 mW power dissipation for 16 DACs, heats ion trap to 70 K

Analog Switches
› Almost impossible to do without a suitable transistor
› Generally need thick gate oxide for switching high voltages
– For 20 V and a critical E-field of 10 MV/cm: 20 nm GOX
› Discrete switch ICs are available (e.g. 74HC4066M)
› Future: integrate switches into ion traps

WRAP UP

Where from here?
• This meeting is the beginning of a process to bring together users of cryo-electronics
and experts in their practical realisation
• Can we identify joint challenges that are valid for multiple user areas?
• Can we join forces where appropriate for the focussed development of cryogenic
electronics?

The discussion is only just starting
• We will provide a copy of the slides and recordings of the talks on slack
• The slack channels will provide a means to continue the discussion:
Please contact celia.yeung@physics.ox.ac.uk for an invitation.
• We may organise further meetings, either as broad as this meeting or focussing on
some of the more detailed challenges
• Our input could be useful in influencing funding policy or may aid kick start
collaborative projects

Only a few days away, the UK National Quantum Technologies Showcase
2020 is set to deliver an exciting array of demonstrations, expert panel
discussions and insider tours of laboratories and factories, and much mre.
At KTN we are proud to deliver this annual fixture in the industry calendar.
With over 70 exhibitors and 700 delegates expected, the event is
representative of the many advances achieved and the strides made in
the commercialisation of quantum technologies in the UK. REGISTER
NOW! (bit.ly/QuantumShowcase)
UK NATIONAL QUANTUM TECHNOLOGIES SHOWCASE 2020
Friday 6 November
SPONSORS:
Delivery partner:

Thank you
• UK Quantum computing & Simulation Hub
• KTN

Thank you
Programme and organising committee:
Martin Weides
Dominic O’Brien
Ziad Melhelm
Jason Smith
Phil Meeson
Robert Hadfield
Anthony Bennett
Winfried Hensinger

Thank you
Event contact KTN:
Poonam Phull

Thank you
User engagement, QCS hub
Rupesh Srivastava

Thank you
Technology associate and User engagement, QCS hub
Celia Yeung
The driving force behind this meeting who put all of it together!

Contact information
Celia Yeung
(celia.yeung@physics.ox.ac.uk)
Winfried Hensinger
(w.k.hensinger@sussex.ac.uk) or (winfried@universalquantum.com)

Quantum Technology Innovation Network: Cryogenic Electronics

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