Leveraging Test Data for Quality Michael Schuldenfrei, Optimal+ CTO GSA Quality Team Meeting December, 2014

1. Michael Schuldenfrei, CTO
Leveraging Test Data
for Quality
GSA Quality Team Meeting
December, 2014

2. © Optimal+ 2014 2
The Need
Shifting from “Defects per Million” to “Defects per Billion”

3. © Optimal+ 2014 3
The Problem
No Problem Found
32%
Fab Process
28%
Test Program
10%
Test Operation
4%
Test Equipment
26%
RMA Source
No Problem Found Fab Process Test Program Test Operation Test Equipment

4. © Optimal+ 2014 4
The Challenge
BIGDATAEXPERTISE
COSTTIME

5. © Optimal+ 2014 5
Big Data – Device DNA
ECID
ECID
ECID
ECID
ECID
WAT
WS1
WS2
WAT
WS1
WS2
WAT
WS1
WS2
WAT
WS1
WS2
WS3
WAT
WS1
WS2
WS3
FT1
Burn in
FT2
Example: One package contains:
5 dice
x ~2 WS operations per die
x ~1.2 iterations per operation
x 3000 parametric measurements
+ 1000 per-site WAT measurements
+ 3000 FT measurements
A DNA consisting ~35K measurements!
An SLT lot with 5000 parts could have 150M historical
measurements from hundreds of wafers & FT lots

6. © Optimal+ 2014 6
Back to Basics
THE QUALITY QUESTION;
IS “GOOD” REALLY GOOD?

7. Outlier Detection
Geographic
Parametric
Escape Prevention
Test program issues
ATE issues
Data Feed Forward
(More intelligent decision making)
Drift
Smart Pairing
© Optimal+ 2014 7
Quality Solutions

8. Outlier Detection
© Optimal+ 2014 – All rights reserved 8

9. Optimal+ 2014 Company Confidential 9
Outlier Detection – Algorithms
D-PAT: Dynamic Part Average Testing
NNR: Nearest Neighbor Residual
Z-PAT: Z-Axis Part Average Testing
GDBN: Good Die in Bad Neighborhood
Zonal: Low yield zone-based detection
Final Test
Post Final-Test operation and Based on Die-ID (ECID etc.)
In real-time at Final-Test operation without Die-ID

10. Optimal+ 2014 Company Confidential 10
Cross-Operation Outlier Detection
Cross-operational quality based on Die ID
Contributing operations
ETEST/PCM/WAT
Wafer Sort
Final-Test
Burn-In
System Level Test
Example: E-Test based bin-switching performed post-Wafer Sort
The ability to identify potential bad devices based on E-test data
geographical analysis
Bin switching occurs post-wafer sort
Requires data-feed-forward within the supply chain

11. Escape Prevention
© Optimal+ 2014 – All rights reserved 11

12. © Optimal+ 2014 12
Escape Prevention – ATE Freeze
A freeze occurs when a tester instrument becomes “stuck”
and repeatedly returns the same or similar result for a
sequence of parts

13. © Optimal+ 2014 13
Escape Prevention – ATE / TP
13
The STDF “PRR.NUM_TESTS” field tells us the number of tests executed on
the part. It should be relatively stable throughout the lot

14. © Optimal+ 2014 14
Escape Prevention – Test Ops
Excessive probing – when operation ignores probe mark spec for a device
and keeps on probing to get the yield

15. © Optimal+ 2014 15
Escape Prevention – Test Program
Human error is one of the main contributors for test escapes
and RMA. Here the PE commented a few blocks in the TP for
debug and forgot to uncomment before production release:
Traditional SBL is design to detect yield issues in which a specific bin count
spikes. However human error can result in a drop to 0 which is missed.
SBL
SBL drop of soft bin 11
from ~3% to 0 following
new TP revision

16. © Optimal+ 2014 16
Escape Prevention – Test Program
Extremely loose test limits may mask real test performance problems
~95 Sigmas
~95 Sigmas

17. Advanced Quality
Solutions
© Optimal+ 2014 – All rights reserved 17

18. Implementations:
Within the same test area (e.g. WS, FT, etc.)
Between test areas (e.g. from WAT to WS to FT)
Within a single subcon
Between multiple subcons (hub and spoke)
Real-time (test program integration)
Offline bin-switching
Example scenarios:
Outlier Detection – drift analysis
Pairing – cherry-picking for power & speed combinations
Test program tuning
SLT / Burn-in reduction
© Optimal+ 2014 18
Data Feed Forward

19. © Optimal+ 2014 19
Data Feed Forward – Drift
Database at subconTester
1. ECID Data
2. FT1 Measurements
Test Program running
FT2 operation
Real-time data!
No test time impact!

20. One or more numeric values
representing the perceived
quality of a part based on:
Wafer geography
(e.g. edge vs. center)
Outlier detection rule inputs
(e.g. GDBN, Z-PAT, D-PAT, etc.)
Number of iterations to PASS
Overall lot/wafer yield
Equipment health during test
Parametric test results from
multiple operations
Etc…
© Optimal+ 2014 20
Quality Index
Quality Index
Lot/Wafer
Yield etc.
Quality
Rule
Inputs
Wafer
Geography

21. © Optimal+ 2014 21
“No Problem Found”
Combinations of chips causing issues:
IC3
IC2
PCB
IC1

22. © Optimal+ 2014 22
Smart Pairing
• New methodology to pair IC’s for
optimal compatibility
• Customer and suppliers agree on
recipe for “Best Match” between
IC’s (e.g. based on power
consumption and speed)
• “Quality Index” created based on
manufacturing and test data to
categorize chips
• Data fed-forward to assembly to
ensure IC’s pre-sorted into
“buckets” based on Quality Index
• MCPs and boards are assembled
with well-matched components
Grade A
Grade B
Grade C
Grade A
Grade B
Grade C

23. Supreme Quality requires a comprehensive
end-to-end approach which takes into
account problems arising from:
• Equipment
• Test Process
• Human Error
• Material
…and much more
© Optimal+ 2014 23
Conclusions

24. Q&A
Optimal+ 2014 Company Confidential 24