This document provides an overview of simulation using GHDL for verifying digital designs. It discusses that simulation is important for detecting errors in a design early to reduce costs. Verification through simulation involves creating test benches to test a design against different input combinations. For large designs, decomposition is used to break them into smaller components that can be simulated more easily. The document advocates for using the open-source GHDL simulator, noting the benefits of understanding and improving open-source software. It provides instructions for installing GHDL on Linux and Windows and discusses using text editors like Vim or Gedit when working with GHDL. Coding best practices like commenting and readability are also mentioned.

1. ∗
Notes on GHDL and Simulation
Dilawar Singh
Email : dilawars@iitb.ac.in
Version 1.0
January 18, 2011
“To leave error unrefuted is to encourage intellectual immorality.“
Karl Marx.
quoted in ’The Poverty Of Theory’ by E. P. Thompson.
The only Western Historian who could
think beyond the nation of Atlantis.
Simulation
An engineer should be able to not only correct an error but also locate them.
Simulation is mostly used for these two puposes. Failure in detecting errors
could be very costly. Later you detect it, costlier it gets. Intel has witnessed it
once. It may be not a matter of life an death but surely it can throw a mid-size
design house out of business. Big corporations can survive but it costs a lot. A
minor FDIV bug in Intel Pentium processor cost $500 million.
After you have implemented your design as per given ’specifications’, first
task is to test whether it is giving what was expected (verification). While
designing, one might have taken clues from on one’s common sense in addition
to what one knows for sure. Simulation protect you from this common sense
(or intuitions), same way mathematics protect natural sciences from common
senses of humans which by the way hardly have anything in common 1 . Studying
social sciences is beset with ills. There is no protection from ’common sense’.
No wonder, two economists seldom agree on anything.
Verification of design (mostly done using Simulation) is a big fraction of
today’s total design activities and consumes about 60-80% time. In VHDL, you
will create ’test benches’2 to test your design against certain set of test inputs.
For all these possible inputs, if output satisfies given ’truth table’ (or behavioral
description) then the design is said to be correct. One should test his/design
for all possible input combinations which is not possible for large enough input
∗ These notes have nothing to do with your course content. Usual disclaimer of ’I am not
responsible for any damages caused etc. etc’ applies.
1 As far as common sense is concerned, it make sense asking whether an electron is a wave
or a particle. For mathematics, this question in itself is absurd. An electron is what its
equation implies, nothing less, yet could be more than that.
2 While using ghdl you have to write test-bench in VHDL only, in Modelsim you have
another option called do files
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2. ports. On top of it, one should be able to catch error as early as possible for
cost grows exponentially with design stages. If design is found faulty at later
stages, you might loose your job (or get transfered if in government job). In any
case, it will be a blot on your claim to be an engineer.
Simulation’s present is bright, future is surely bleak 3 . VLSI has grown up
in size tremendously. A modern chip has many input combinations that one
can possibly be tested in reasonable amount of time even though computer run
faster than Chacha Cahudhary’s brain. To overcome this, what one generally
does is to break a large design into smaller one (decomposition) and simulate
smaller parts. Most of simulation is done for moderate size components like
adder, multiplexer etc.
There have been tremendous growth in the area of formal verification (you
can google it if you like) but you can not do away with simulation, at least
for next 6-7 decades. Reduced Binary decision diagrams (RBDD) and Kripke
Structures are very prominent tools these days. In the past, using formal meth-
ods in practice seemed hopeless, only few crazy people stuck to them. Recently,
industries are trying out formal verification like Z notation to document system
properties more rigorously. Model checking and theorem proving (on certain
structures) are being plugged in to complement more traditional one of simula-
tion.
Making a case for GHDL
Since I am ’lobbying’ for ghdl, it is clear that I am heavily biased and like
electrons under bias my ideas will move in a certain direction i.e. towards
supporting ghdl.
Why ghdl? I can give two arguments, one is solely driven by my love for free
softwares, second is put forward my Prof M. P. Desai in his lecture. Free soft-
wares (as defined by http://www.gnu.org/philosophy/free-sw.html) allow one
to understand how a particular software works by providing you with its source
code. That makes improvement as well as enhancement faster. This is the right
way of making this planet ’smarter’. Another more effective way is by dumbing
down the users by taking away their rights to know that they are using. Adding
a fancy Graphical User Interface (GUI) may not necessarily translates into a
better software. We all have experiences with Microsoft Word!
Second, according to Prof Desai (quoting in spirit, not the exact words),
I’ll prefer giving 5 lacs more to someone who is an expert in free
software rather than spending 10 lacs buying a license of a propriety
softwares given that my job is done. Its like preferring a musi-
cian who is better trained with his instruments over someone who is
backed by costly electronic gadgets.
First argument is a truism given that one is suffering from the mental neces-
sity ’to know’ like Donald E. Knuth; second is also a truism if one works with
(for) people who have the same vision. But most of the time, this is not the
case. Only first rate mind appreciate first rate minds. N’th level mediocrity
3 I’m Done Simulating; Now What? Verification Coverage Analysis and Correctness
Checking of the DECchip 21164 Alpha microprocessor; Michael Kantrowitz, Lisa M. Noack;
See
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3. always support N+1’th level mediocrity. So it should not be surprising to note
that most of the people prefer Madona over Pt. Ravishankar, Daniel Steele over
R. K. Narayanan, T-Shirt over Kurta - I plead guilty (Albert Einstein would
have looked more graceful in Kurta!) and ’some Indian Idol’ over Indian Ocean.
On same lines, Modelsim over ghdl (offense indented!). Bottom line is Your
real skills (with free-softwares) may be grossly undervalued (in pro-
priety softwares driven world). To survive in Industries, it is useful to have
familiarity with ’standard’ tools. Internet is flooded with articles about them.
Installing GHDL
Linux Users
Before using package managers such as synaptic, yast etc make sure proxy vari-
ables are set. On Ubuntu, synaptic is installed by default. Go to (System− >
Administration− > SynapticP ackageM anager), go to the settings− > P ref erances− >
N etwork and set the proxy. Search ghdl and mark for installation. If you prefer
using apt − get utility from command line then make sure to put proxy informa-
tion in /etc/apt/apt.conf file. For example, if my user-name is profc haos and
password is khoonid arinda then my file will look like this.
Acquire::http::proxy "http://prof_chaos:khooni_darinda@netmon.iitb.ac.in:80/";
Acquire::ftp::proxy "http://prof_chaos:khooni_darinda@netmon.iitb.ac.in:80/";
Acquire::https::proxy "http://prof_chaos:khooni_darinda@netmon.iitb.ac.in:80/";
For other linux distribution, please google about it. If you are new to linux, you
may not be able to get things right for first few hours. That suppose to happen,
but don’t let it put you off.
Windows user
Guys! Learn linux if you have not started learning it. As someone has said, “We
learn to live in the world of linux where there is no Gates or Windows”. . For
Modelsim student edition, you have to use windows as expected. In VLSI lab,
it is installed on linux and can be invoked by vsim command from terminal.
Modelsim tutorial is given on its website.
Text Editor
ghdl now have an inbuilt text editor but it may not be available on vlsi lab.
You have to use vim or gedit. vim is the most advanced and simple (as a rule
of thumb, takes quite a lot of practice to learn) text editor. gedit is also a
good editor. Spend some time with vim every week. You can curse me while
learning but you will surely thank me after a year. vim is like a light saber, it
is only effective in the hand of a ’Jedi Knight’. First timer can not do anything
significant with it. vim has a lot of tutorial and free books available on its
website.
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4. Coding
Get into habit of commenting your code properly. Not only because it will be
readable by others but also you can remember what you have done a week ago.
Literate Programming is a school of thought which deals with readability of
codes. Writing readable codes not only recommended but also mandatory these
days. When a team of many people works on a single project, non-readability
consume much more time then it saves.
You make also like to read about subversion (or git). Its a ’version control
system’ which keeps track of what you have done in the past. You can easily
recover any past version of your file. You can use google-code to make your svn
repository or can set up your own local repository on your personal machine.
There are many blogs written about how to do it.
Few words of wisdom
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