SlideShare a Scribd company logo
Number Representation and
Arithmetic
Operations
Number in a computer system is
represented by a string of bits, called a
binary number.
Integers
Consider an n-bit vector
B = bn−1 . . . b1b0 where bi = 0 or 1 for 0 ≤ i ≤ n
− 1.
This vector can represent an unsigned
integer value
V(B) in the range 0 to 2 n − 1, where
V(B) = bn−1 × 2 n-1 +・ ・ ・+b1 × 21 + b0 × 20
 We need to represent both positive and negative
numbers.
 Three systems are used for representing such
numbers:
 Sign-and-magnitude
 1’s-complement
 2’s-complement
 In all three systems, the leftmost bit is 0 for positive
numbers and 1 for negative numbers.
 Positive values have identical representations in all
systems, but negative values have different
representations
 In the sign-and-magnitude system, negative values
are represented by changing the most significant bit
b3 from 0 to 1 in the B vector of the corresponding
positive value.
 For example,
 In 1’s-complement representation, negative values are obtained by
complementing each bit of the corresponding positive number
 Thus, the representation for −3 is obtained by complementing each bit
in the vector 0011 to yield 1100.
 Bit complementing, is done to convert a negative number to the
corresponding positive value.
 Converting either way is referred to as forming the 1’s-complement of a
given number.
 For n-bit numbers, this operation is equivalent to subtracting the
number from 2n − 1.
 In 4-bit numbers we subtract from 24 − 1 = 15, or 1111 in binary.
 For e.g. to represent -3 in 1’s complement system subtract 3 from 15 or
1111
 15-3 =121100 or 1111 or 0011(3) 1100(change 1’s to 0’s and 0’s to
1’s
0011
-------------
• Finally, in the 2’s-complement system, forming
the 2’s-complement of an n-bit number is done
by subtracting the number from 2n.
• Hence, the 2’s complement of a number is
obtained by adding 1 to the 1’s-complement of
that number.
• Note that there are distinct representations for
+0 and −0 in both the sign-and magnitude and
1’s-complement systems, but the 2’s-
complement system has only one
representation for 0.
• For 4-bit numbers, the value −8 is represent
able in the 2’s-complement system but not in
the other systems.
Addition of Unsigned Integers
• Consider Addition of 1-bit numbers.
• The sum of 1 and 1 is the 2-bit vector 10, which represents
the value 2.The sum is 0 and the carry-out is 1.
• In order to add multiple-bit numbers, add bit pairs starting
from the low-order (right) end of the bit vectors,
propagating carries toward the high-order (left) end.
• The carry-out from a bit pair becomes the carry-in to the
next bit pair to the left.
• The carry-in must be added to a bit pair in generating the
sum and carry-out at that position.
• For example, if both bits of a pair are 1 and the carry-in is
1, then the sum is 1 and the carry-out is 1, which
represents the value 3.
Addition of 1 bit numbers
Addition and Subtraction of
Signed Integers
• Three systems are introduced for representing positive
and negative numbers, or, simply, signed numbers.
• These systems differ only in the way they represent
negative values.
•
• The sign-and-magnitude system is the simplest
representation, but it is not much suitable for addition and
subtraction operations.
• The 1’s-complement method is somewhat better.
• The 2’s-complement system is the most efficient method
for performing addition and subtraction operations.
• To understand 2’s-complement arithmetic,
consider addition modulo N (abbreviated as
mod N).
• It’s a graphical device for the description of
addition of unsigned integers
• mod N is a circle with the values 0 through N −
1 marked along its perimeter,
The decimal values 0 through 15 are represented by their 4-bit binary
values 0000 through 1111 around the outside of the circle.
In terms of decimal values, the operation (7 + 5) mod 16 yields the
value 12.
To perform this operation graphically, locate 7 (0111) on the outside
of the circle and then move 5 units in the clockwise direction to arrive
• Similarly, (9 + 14) mod 16 = 7; this is modeled on
the circle by locating 9 (1001) and moving 14
units in the clockwise direction past the zero
position to arrive at the answer 7 (0111).
This graphical technique works for the computation of (a + b) mod 16 for any
unsigned integers a and b
To perform addition, locate a and move b units in the clockwise direction to
arrive at
• Reinterpret the binary vectors outside the circle to
represent the signed integers from −8 through +7 in
the 2’s-complement representation as shown inside
the circle.
• Let us apply the mod 16 addition technique to the
example of adding +7 to −3.
• The 2’s-complement representation for these numbers
is 0111 and 1101, respectively.
• To add these numbers, locate 0111 on the circle . Then
move 1101 (13) steps in the clockwise direction to
arrive at 0100, which yields the correct answer of +4.
• Note that the 2’s-complement representation of −3 is
interpreted as an unsigned value for the number of
steps to move.
Simple addition of signed number
• To add +7 to −3. The 2’s-complement
representation for these numbers is 0111
and 1101, respectively
Rules for addition and subtraction of n bit signed
numbers using 2’s complement
• To add two numbers, add their n-bit
representations, ignoring the carry-out bit from the
most significant bit (MSB) position. The sum will
be the algebraically correct value in 2’s-
complement representation if the actual result is in
the range −2n−1 through+2n−1 − 1.
• To subtract two numbers X and Y , that is, to
perform X − Y, form the 2’s-complement of Y , then
add it to X using the add rule. Again, the result will
be the algebraically correct value in 2’s-
complement representation if the actual result is in
the range −2n−1 through+2n−1 − 1.
examples
• To add ,just do bit by bit addition and ignore
the carry out.
• In all of these 4-bit examples, the answers fall
within the representable range of −8 through
+7.
• When answers do not fall within the
representable range, we say that arithmetic
overflow has occurred.
subtraction
The subtraction operation requires forming the 2’s-complement of the
subtrahend (the bottom value) i.e form the 2’s-complement of a number, form
the bit complement of the number and add 1.
Sign extension
• To represent a value using a larger number of bits
add as many number of sign bits to the left, i.e to
MSB.
• If the value is positive add as many number of zeros
to the left i.e to MSB.
• E.g +4 …..using 4 bits… 0100
Using 8 bits…. 00000100
4 zeros added to MSB
• If the value is negative add as many number of 1’s to
the left
• E.g -4 Using 4 bits… 1100
Using 8 bits….11111100
4 ones added to MSB
• Overflow in Integer Arithmetic
• Using 2’s-complement representation, n bits can
represent values in the range −2n−1 to +2n−1 − 1. For
example, the range of numbers that can be
represented by 4 bits is −8 through +7.
• When the actual result of an arithmetic operation is
outside the representable range, then an arithmetic
overflow has occurred.
• When adding unsigned numbers, a carry-out of 1
from the most significant bit position indicates that
an overflow has occurred.
• This is not always true when adding signed
numbers.
• For example, using 2’s-complement
representation for 4-bit signed numbers, if we
add +7 and +4,
• +7---- 0111
• +4---- 0100
• 1011--- repesentation for
-5
• carry out is 0 an incorrect
result.
• -4------1100
• -6------1010
• 10110 -------incorrect
• carry out is 1 ……
• overflow may occur only if both summands have the
same sign.
• The addition of numbers with different signs cannot
cause overflow because the result is always within the
representable range.
• To detect overflow when adding two numbers in 2’s-
complement representation.
• Examine the signs of the two summands and the
sign of the result.
• When both summands have the same sign, an
overflow has occurred when the sign of the sum is not
the same as the signs of the summands.
• Floating-Point Numbers
• If we use a full word in a 32-bit word length computer to
represent a signed integer in 2’s-complement
representation, the range of values that can be
represented is −231 to +231 − 1. In decimal terms, this
range is somewhat smaller than −1010 to +1010.
• The same 32-bit patterns can also be interpreted as
fractions in the range −1 to +1 −2−31
• Assume that the implied binary point is just to the right
of the sign bit; that is,between bit b31 and bit b30 at the
left end of the 32-bit representation.
• In this case, the magnitude of the smallest fraction
representable is approximately 10−10.
• Neither of these two fixed-point number
representations has a range that is sufficient for
many scientific and engineering calculations.
• To have a binary number representation that can
easily accommodate both very large integers and
very small fractions, a computer must be able to
represent numbers and operate on them in such a
way that the position of the binary point is variable
and is automatically adjusted as computation
proceeds.
• In this case, the binary point is said to float, and
the numbers are called floating-point numbers.
• Since the position of the binary point in a
floating-point number varies, it must be
indicated explicitly in the representation.
• For E.g,
• 6.0247 × 1023
• 3.7291 × 10−27
• −1.0341 × 102
• −7.3000 × 10−14 and so on.
• 5 significant digits of precision.
• The scale factors 1023, 10−27, 102, and 10−14
indicate the actual position of the decimal point
with respect to the significant digits.
• Binary floating-point number can be represented by:
• a sign for the number
• some significant bits
• a signed scale factor exponent for an implied base of 2
• IEEE (Institute of Electrical and Electronics
Engineers)standard for 32-bit floating-point number
representation uses a sign bit, 23 significant bits, and 8
bits for a signed exponent of the scale factor, which has
an implied base of 2.
• In decimal terms, the range of numbers represented is
roughly
• + 10-38 to 10+8 which is adequate for most scientific and
engineering calculations.
• 64-bit representation will be used to accommodate more
significant bits and more bits for the signed exponent,
Character Representation
• The most common encoding scheme for characters is ASCII
(American Standard Code for Information Interchange).
• Alphanumeric characters, operators, punctuation symbols, and
control characters are represented by 7-bit codes.
• It is convenient to use an 8-bit byte to represent and store a
character.
• The code occupies the low-order seven bits. The high-order bit is
usually set to 0.
• The codes for the alphabetic and numeric characters are in
increasing sequential order when interpreted as unsigned binary
numbers. This facilitates sorting operations on alphabetic and
numeric data.
• The low-order four bits of the ASCII codes for the decimal digits 0 to
9 are the first ten values of the binary number system.
• This 4-bit encoding is referred to as the binary-coded decimal (BCD)
code.
module 1_class_numbers.pptx

More Related Content

Similar to module 1_class_numbers.pptx

B.sc cs-ii-u-1.3 digital logic circuits, digital component
B.sc cs-ii-u-1.3 digital logic circuits, digital componentB.sc cs-ii-u-1.3 digital logic circuits, digital component
B.sc cs-ii-u-1.3 digital logic circuits, digital component
Rai University
 
Module 2_Data representations.pdf
Module 2_Data representations.pdfModule 2_Data representations.pdf
Module 2_Data representations.pdf
Aditya kishore saxena
 
Introduction of number system
Introduction of number systemIntroduction of number system
Introduction of number system
AswiniT3
 
De numbers systems vk ppt
De numbers systems vk  pptDe numbers systems vk  ppt
De numbers systems vk ppt
VinodKataria5
 
Counit2
Counit2Counit2
Counit2
Himanshu Dua
 
Number Systems.ppt
Number Systems.pptNumber Systems.ppt
Number Systems.ppt
zorogoh2
 
chapter 2 part 2.pdf
chapter 2 part 2.pdfchapter 2 part 2.pdf
chapter 2 part 2.pdf
Praches1
 
unit-2_DL.pdf
unit-2_DL.pdfunit-2_DL.pdf
unit-2_DL.pdf
ashoksahu64
 
CS304PC:Computer Organization and Architecture Unit- III PDF notes .pdf
CS304PC:Computer Organization and Architecture Unit- III PDF notes .pdfCS304PC:Computer Organization and Architecture Unit- III PDF notes .pdf
CS304PC:Computer Organization and Architecture Unit- III PDF notes .pdf
Asst.prof M.Gokilavani
 
CDS Fundamentals of digital communication system UNIT 1 AND 2.pdf
CDS Fundamentals of digital communication system UNIT 1 AND 2.pdfCDS Fundamentals of digital communication system UNIT 1 AND 2.pdf
CDS Fundamentals of digital communication system UNIT 1 AND 2.pdf
shubhangisonawane6
 
Digital design chap 1
Digital design  chap 1Digital design  chap 1
Digital design chap 1
Mohammad Bappy
 
Arithmatic Ch 10 (4).pdf
Arithmatic Ch 10 (4).pdfArithmatic Ch 10 (4).pdf
Arithmatic Ch 10 (4).pdf
SahilSarda2
 
binary arithmetic rules
binary arithmetic rulesbinary arithmetic rules
binary arithmetic rules
student
 
Data Representation
Data RepresentationData Representation
Data Representation
Education Front
 
Unit 1 data representation and computer arithmetic
Unit 1  data representation and computer arithmeticUnit 1  data representation and computer arithmetic
Unit 1 data representation and computer arithmetic
AmrutaMehata
 
Representation of Negative Numbers
Representation of Negative NumbersRepresentation of Negative Numbers
Representation of Negative Numbers
Forrester High School
 
Chapter 2.1 introduction to number system
Chapter 2.1 introduction to number systemChapter 2.1 introduction to number system
Chapter 2.1 introduction to number system
ISMT College
 
Number system and codes
Number system and codesNumber system and codes
Number system and codes
Abhiraj Bohra
 
Data Representation
Data RepresentationData Representation
Data Representation
Education Front
 

Similar to module 1_class_numbers.pptx (20)

B.sc cs-ii-u-1.3 digital logic circuits, digital component
B.sc cs-ii-u-1.3 digital logic circuits, digital componentB.sc cs-ii-u-1.3 digital logic circuits, digital component
B.sc cs-ii-u-1.3 digital logic circuits, digital component
 
Module 2_Data representations.pdf
Module 2_Data representations.pdfModule 2_Data representations.pdf
Module 2_Data representations.pdf
 
Introduction of number system
Introduction of number systemIntroduction of number system
Introduction of number system
 
De numbers systems vk ppt
De numbers systems vk  pptDe numbers systems vk  ppt
De numbers systems vk ppt
 
Counit2
Counit2Counit2
Counit2
 
Number Systems.ppt
Number Systems.pptNumber Systems.ppt
Number Systems.ppt
 
chapter 2 part 2.pdf
chapter 2 part 2.pdfchapter 2 part 2.pdf
chapter 2 part 2.pdf
 
unit-2_DL.pdf
unit-2_DL.pdfunit-2_DL.pdf
unit-2_DL.pdf
 
CS304PC:Computer Organization and Architecture Unit- III PDF notes .pdf
CS304PC:Computer Organization and Architecture Unit- III PDF notes .pdfCS304PC:Computer Organization and Architecture Unit- III PDF notes .pdf
CS304PC:Computer Organization and Architecture Unit- III PDF notes .pdf
 
CDS Fundamentals of digital communication system UNIT 1 AND 2.pdf
CDS Fundamentals of digital communication system UNIT 1 AND 2.pdfCDS Fundamentals of digital communication system UNIT 1 AND 2.pdf
CDS Fundamentals of digital communication system UNIT 1 AND 2.pdf
 
Digital design chap 1
Digital design  chap 1Digital design  chap 1
Digital design chap 1
 
Arithmatic Ch 10 (4).pdf
Arithmatic Ch 10 (4).pdfArithmatic Ch 10 (4).pdf
Arithmatic Ch 10 (4).pdf
 
binary arithmetic rules
binary arithmetic rulesbinary arithmetic rules
binary arithmetic rules
 
Data Representation
Data RepresentationData Representation
Data Representation
 
Pp02
Pp02Pp02
Pp02
 
Unit 1 data representation and computer arithmetic
Unit 1  data representation and computer arithmeticUnit 1  data representation and computer arithmetic
Unit 1 data representation and computer arithmetic
 
Representation of Negative Numbers
Representation of Negative NumbersRepresentation of Negative Numbers
Representation of Negative Numbers
 
Chapter 2.1 introduction to number system
Chapter 2.1 introduction to number systemChapter 2.1 introduction to number system
Chapter 2.1 introduction to number system
 
Number system and codes
Number system and codesNumber system and codes
Number system and codes
 
Data Representation
Data RepresentationData Representation
Data Representation
 

Recently uploaded

English lab ppt no titlespecENG PPTt.pdf
English lab ppt no titlespecENG PPTt.pdfEnglish lab ppt no titlespecENG PPTt.pdf
English lab ppt no titlespecENG PPTt.pdf
BrazilAccount1
 
Planning Of Procurement o different goods and services
Planning Of Procurement o different goods and servicesPlanning Of Procurement o different goods and services
Planning Of Procurement o different goods and services
JoytuBarua2
 
CME397 Surface Engineering- Professional Elective
CME397 Surface Engineering- Professional ElectiveCME397 Surface Engineering- Professional Elective
CME397 Surface Engineering- Professional Elective
karthi keyan
 
Hybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdf
Hybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdfHybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdf
Hybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdf
fxintegritypublishin
 
Governing Equations for Fundamental Aerodynamics_Anderson2010.pdf
Governing Equations for Fundamental Aerodynamics_Anderson2010.pdfGoverning Equations for Fundamental Aerodynamics_Anderson2010.pdf
Governing Equations for Fundamental Aerodynamics_Anderson2010.pdf
WENKENLI1
 
Recycled Concrete Aggregate in Construction Part III
Recycled Concrete Aggregate in Construction Part IIIRecycled Concrete Aggregate in Construction Part III
Recycled Concrete Aggregate in Construction Part III
Aditya Rajan Patra
 
road safety engineering r s e unit 3.pdf
road safety engineering  r s e unit 3.pdfroad safety engineering  r s e unit 3.pdf
road safety engineering r s e unit 3.pdf
VENKATESHvenky89705
 
DfMAy 2024 - key insights and contributions
DfMAy 2024 - key insights and contributionsDfMAy 2024 - key insights and contributions
DfMAy 2024 - key insights and contributions
gestioneergodomus
 
Final project report on grocery store management system..pdf
Final project report on grocery store management system..pdfFinal project report on grocery store management system..pdf
Final project report on grocery store management system..pdf
Kamal Acharya
 
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
Dr.Costas Sachpazis
 
一比一原版(UofT毕业证)多伦多大学毕业证成绩单如何办理
一比一原版(UofT毕业证)多伦多大学毕业证成绩单如何办理一比一原版(UofT毕业证)多伦多大学毕业证成绩单如何办理
一比一原版(UofT毕业证)多伦多大学毕业证成绩单如何办理
ydteq
 
Railway Signalling Principles Edition 3.pdf
Railway Signalling Principles Edition 3.pdfRailway Signalling Principles Edition 3.pdf
Railway Signalling Principles Edition 3.pdf
TeeVichai
 
6th International Conference on Machine Learning & Applications (CMLA 2024)
6th International Conference on Machine Learning & Applications (CMLA 2024)6th International Conference on Machine Learning & Applications (CMLA 2024)
6th International Conference on Machine Learning & Applications (CMLA 2024)
ClaraZara1
 
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
MdTanvirMahtab2
 
block diagram and signal flow graph representation
block diagram and signal flow graph representationblock diagram and signal flow graph representation
block diagram and signal flow graph representation
Divya Somashekar
 
Nuclear Power Economics and Structuring 2024
Nuclear Power Economics and Structuring 2024Nuclear Power Economics and Structuring 2024
Nuclear Power Economics and Structuring 2024
Massimo Talia
 
Cosmetic shop management system project report.pdf
Cosmetic shop management system project report.pdfCosmetic shop management system project report.pdf
Cosmetic shop management system project report.pdf
Kamal Acharya
 
Hierarchical Digital Twin of a Naval Power System
Hierarchical Digital Twin of a Naval Power SystemHierarchical Digital Twin of a Naval Power System
Hierarchical Digital Twin of a Naval Power System
Kerry Sado
 
一比一原版(IIT毕业证)伊利诺伊理工大学毕业证成绩单专业办理
一比一原版(IIT毕业证)伊利诺伊理工大学毕业证成绩单专业办理一比一原版(IIT毕业证)伊利诺伊理工大学毕业证成绩单专业办理
一比一原版(IIT毕业证)伊利诺伊理工大学毕业证成绩单专业办理
zwunae
 
ML for identifying fraud using open blockchain data.pptx
ML for identifying fraud using open blockchain data.pptxML for identifying fraud using open blockchain data.pptx
ML for identifying fraud using open blockchain data.pptx
Vijay Dialani, PhD
 

Recently uploaded (20)

English lab ppt no titlespecENG PPTt.pdf
English lab ppt no titlespecENG PPTt.pdfEnglish lab ppt no titlespecENG PPTt.pdf
English lab ppt no titlespecENG PPTt.pdf
 
Planning Of Procurement o different goods and services
Planning Of Procurement o different goods and servicesPlanning Of Procurement o different goods and services
Planning Of Procurement o different goods and services
 
CME397 Surface Engineering- Professional Elective
CME397 Surface Engineering- Professional ElectiveCME397 Surface Engineering- Professional Elective
CME397 Surface Engineering- Professional Elective
 
Hybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdf
Hybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdfHybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdf
Hybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdf
 
Governing Equations for Fundamental Aerodynamics_Anderson2010.pdf
Governing Equations for Fundamental Aerodynamics_Anderson2010.pdfGoverning Equations for Fundamental Aerodynamics_Anderson2010.pdf
Governing Equations for Fundamental Aerodynamics_Anderson2010.pdf
 
Recycled Concrete Aggregate in Construction Part III
Recycled Concrete Aggregate in Construction Part IIIRecycled Concrete Aggregate in Construction Part III
Recycled Concrete Aggregate in Construction Part III
 
road safety engineering r s e unit 3.pdf
road safety engineering  r s e unit 3.pdfroad safety engineering  r s e unit 3.pdf
road safety engineering r s e unit 3.pdf
 
DfMAy 2024 - key insights and contributions
DfMAy 2024 - key insights and contributionsDfMAy 2024 - key insights and contributions
DfMAy 2024 - key insights and contributions
 
Final project report on grocery store management system..pdf
Final project report on grocery store management system..pdfFinal project report on grocery store management system..pdf
Final project report on grocery store management system..pdf
 
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
 
一比一原版(UofT毕业证)多伦多大学毕业证成绩单如何办理
一比一原版(UofT毕业证)多伦多大学毕业证成绩单如何办理一比一原版(UofT毕业证)多伦多大学毕业证成绩单如何办理
一比一原版(UofT毕业证)多伦多大学毕业证成绩单如何办理
 
Railway Signalling Principles Edition 3.pdf
Railway Signalling Principles Edition 3.pdfRailway Signalling Principles Edition 3.pdf
Railway Signalling Principles Edition 3.pdf
 
6th International Conference on Machine Learning & Applications (CMLA 2024)
6th International Conference on Machine Learning & Applications (CMLA 2024)6th International Conference on Machine Learning & Applications (CMLA 2024)
6th International Conference on Machine Learning & Applications (CMLA 2024)
 
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
 
block diagram and signal flow graph representation
block diagram and signal flow graph representationblock diagram and signal flow graph representation
block diagram and signal flow graph representation
 
Nuclear Power Economics and Structuring 2024
Nuclear Power Economics and Structuring 2024Nuclear Power Economics and Structuring 2024
Nuclear Power Economics and Structuring 2024
 
Cosmetic shop management system project report.pdf
Cosmetic shop management system project report.pdfCosmetic shop management system project report.pdf
Cosmetic shop management system project report.pdf
 
Hierarchical Digital Twin of a Naval Power System
Hierarchical Digital Twin of a Naval Power SystemHierarchical Digital Twin of a Naval Power System
Hierarchical Digital Twin of a Naval Power System
 
一比一原版(IIT毕业证)伊利诺伊理工大学毕业证成绩单专业办理
一比一原版(IIT毕业证)伊利诺伊理工大学毕业证成绩单专业办理一比一原版(IIT毕业证)伊利诺伊理工大学毕业证成绩单专业办理
一比一原版(IIT毕业证)伊利诺伊理工大学毕业证成绩单专业办理
 
ML for identifying fraud using open blockchain data.pptx
ML for identifying fraud using open blockchain data.pptxML for identifying fraud using open blockchain data.pptx
ML for identifying fraud using open blockchain data.pptx
 

module 1_class_numbers.pptx

  • 2. Number in a computer system is represented by a string of bits, called a binary number. Integers Consider an n-bit vector B = bn−1 . . . b1b0 where bi = 0 or 1 for 0 ≤ i ≤ n − 1. This vector can represent an unsigned integer value V(B) in the range 0 to 2 n − 1, where V(B) = bn−1 × 2 n-1 +・ ・ ・+b1 × 21 + b0 × 20
  • 3.  We need to represent both positive and negative numbers.  Three systems are used for representing such numbers:  Sign-and-magnitude  1’s-complement  2’s-complement  In all three systems, the leftmost bit is 0 for positive numbers and 1 for negative numbers.  Positive values have identical representations in all systems, but negative values have different representations  In the sign-and-magnitude system, negative values are represented by changing the most significant bit b3 from 0 to 1 in the B vector of the corresponding positive value.  For example,
  • 4.
  • 5.  In 1’s-complement representation, negative values are obtained by complementing each bit of the corresponding positive number  Thus, the representation for −3 is obtained by complementing each bit in the vector 0011 to yield 1100.  Bit complementing, is done to convert a negative number to the corresponding positive value.  Converting either way is referred to as forming the 1’s-complement of a given number.  For n-bit numbers, this operation is equivalent to subtracting the number from 2n − 1.  In 4-bit numbers we subtract from 24 − 1 = 15, or 1111 in binary.  For e.g. to represent -3 in 1’s complement system subtract 3 from 15 or 1111  15-3 =121100 or 1111 or 0011(3) 1100(change 1’s to 0’s and 0’s to 1’s 0011 -------------
  • 6. • Finally, in the 2’s-complement system, forming the 2’s-complement of an n-bit number is done by subtracting the number from 2n. • Hence, the 2’s complement of a number is obtained by adding 1 to the 1’s-complement of that number. • Note that there are distinct representations for +0 and −0 in both the sign-and magnitude and 1’s-complement systems, but the 2’s- complement system has only one representation for 0. • For 4-bit numbers, the value −8 is represent able in the 2’s-complement system but not in the other systems.
  • 7. Addition of Unsigned Integers • Consider Addition of 1-bit numbers. • The sum of 1 and 1 is the 2-bit vector 10, which represents the value 2.The sum is 0 and the carry-out is 1. • In order to add multiple-bit numbers, add bit pairs starting from the low-order (right) end of the bit vectors, propagating carries toward the high-order (left) end. • The carry-out from a bit pair becomes the carry-in to the next bit pair to the left. • The carry-in must be added to a bit pair in generating the sum and carry-out at that position. • For example, if both bits of a pair are 1 and the carry-in is 1, then the sum is 1 and the carry-out is 1, which represents the value 3.
  • 8. Addition of 1 bit numbers
  • 9. Addition and Subtraction of Signed Integers • Three systems are introduced for representing positive and negative numbers, or, simply, signed numbers. • These systems differ only in the way they represent negative values. • • The sign-and-magnitude system is the simplest representation, but it is not much suitable for addition and subtraction operations. • The 1’s-complement method is somewhat better. • The 2’s-complement system is the most efficient method for performing addition and subtraction operations.
  • 10. • To understand 2’s-complement arithmetic, consider addition modulo N (abbreviated as mod N). • It’s a graphical device for the description of addition of unsigned integers • mod N is a circle with the values 0 through N − 1 marked along its perimeter,
  • 11. The decimal values 0 through 15 are represented by their 4-bit binary values 0000 through 1111 around the outside of the circle. In terms of decimal values, the operation (7 + 5) mod 16 yields the value 12. To perform this operation graphically, locate 7 (0111) on the outside of the circle and then move 5 units in the clockwise direction to arrive
  • 12. • Similarly, (9 + 14) mod 16 = 7; this is modeled on the circle by locating 9 (1001) and moving 14 units in the clockwise direction past the zero position to arrive at the answer 7 (0111). This graphical technique works for the computation of (a + b) mod 16 for any unsigned integers a and b To perform addition, locate a and move b units in the clockwise direction to arrive at
  • 13. • Reinterpret the binary vectors outside the circle to represent the signed integers from −8 through +7 in the 2’s-complement representation as shown inside the circle. • Let us apply the mod 16 addition technique to the example of adding +7 to −3. • The 2’s-complement representation for these numbers is 0111 and 1101, respectively. • To add these numbers, locate 0111 on the circle . Then move 1101 (13) steps in the clockwise direction to arrive at 0100, which yields the correct answer of +4. • Note that the 2’s-complement representation of −3 is interpreted as an unsigned value for the number of steps to move.
  • 14. Simple addition of signed number • To add +7 to −3. The 2’s-complement representation for these numbers is 0111 and 1101, respectively
  • 15. Rules for addition and subtraction of n bit signed numbers using 2’s complement • To add two numbers, add their n-bit representations, ignoring the carry-out bit from the most significant bit (MSB) position. The sum will be the algebraically correct value in 2’s- complement representation if the actual result is in the range −2n−1 through+2n−1 − 1. • To subtract two numbers X and Y , that is, to perform X − Y, form the 2’s-complement of Y , then add it to X using the add rule. Again, the result will be the algebraically correct value in 2’s- complement representation if the actual result is in the range −2n−1 through+2n−1 − 1.
  • 16. examples • To add ,just do bit by bit addition and ignore the carry out. • In all of these 4-bit examples, the answers fall within the representable range of −8 through +7. • When answers do not fall within the representable range, we say that arithmetic overflow has occurred.
  • 17. subtraction The subtraction operation requires forming the 2’s-complement of the subtrahend (the bottom value) i.e form the 2’s-complement of a number, form the bit complement of the number and add 1.
  • 18. Sign extension • To represent a value using a larger number of bits add as many number of sign bits to the left, i.e to MSB. • If the value is positive add as many number of zeros to the left i.e to MSB. • E.g +4 …..using 4 bits… 0100 Using 8 bits…. 00000100 4 zeros added to MSB • If the value is negative add as many number of 1’s to the left • E.g -4 Using 4 bits… 1100 Using 8 bits….11111100 4 ones added to MSB
  • 19. • Overflow in Integer Arithmetic • Using 2’s-complement representation, n bits can represent values in the range −2n−1 to +2n−1 − 1. For example, the range of numbers that can be represented by 4 bits is −8 through +7. • When the actual result of an arithmetic operation is outside the representable range, then an arithmetic overflow has occurred. • When adding unsigned numbers, a carry-out of 1 from the most significant bit position indicates that an overflow has occurred. • This is not always true when adding signed numbers.
  • 20. • For example, using 2’s-complement representation for 4-bit signed numbers, if we add +7 and +4, • +7---- 0111 • +4---- 0100 • 1011--- repesentation for -5 • carry out is 0 an incorrect result. • -4------1100 • -6------1010 • 10110 -------incorrect • carry out is 1 ……
  • 21. • overflow may occur only if both summands have the same sign. • The addition of numbers with different signs cannot cause overflow because the result is always within the representable range. • To detect overflow when adding two numbers in 2’s- complement representation. • Examine the signs of the two summands and the sign of the result. • When both summands have the same sign, an overflow has occurred when the sign of the sum is not the same as the signs of the summands.
  • 22. • Floating-Point Numbers • If we use a full word in a 32-bit word length computer to represent a signed integer in 2’s-complement representation, the range of values that can be represented is −231 to +231 − 1. In decimal terms, this range is somewhat smaller than −1010 to +1010. • The same 32-bit patterns can also be interpreted as fractions in the range −1 to +1 −2−31 • Assume that the implied binary point is just to the right of the sign bit; that is,between bit b31 and bit b30 at the left end of the 32-bit representation. • In this case, the magnitude of the smallest fraction representable is approximately 10−10.
  • 23. • Neither of these two fixed-point number representations has a range that is sufficient for many scientific and engineering calculations. • To have a binary number representation that can easily accommodate both very large integers and very small fractions, a computer must be able to represent numbers and operate on them in such a way that the position of the binary point is variable and is automatically adjusted as computation proceeds. • In this case, the binary point is said to float, and the numbers are called floating-point numbers.
  • 24. • Since the position of the binary point in a floating-point number varies, it must be indicated explicitly in the representation. • For E.g, • 6.0247 × 1023 • 3.7291 × 10−27 • −1.0341 × 102 • −7.3000 × 10−14 and so on. • 5 significant digits of precision. • The scale factors 1023, 10−27, 102, and 10−14 indicate the actual position of the decimal point with respect to the significant digits.
  • 25. • Binary floating-point number can be represented by: • a sign for the number • some significant bits • a signed scale factor exponent for an implied base of 2 • IEEE (Institute of Electrical and Electronics Engineers)standard for 32-bit floating-point number representation uses a sign bit, 23 significant bits, and 8 bits for a signed exponent of the scale factor, which has an implied base of 2. • In decimal terms, the range of numbers represented is roughly • + 10-38 to 10+8 which is adequate for most scientific and engineering calculations. • 64-bit representation will be used to accommodate more significant bits and more bits for the signed exponent,
  • 26. Character Representation • The most common encoding scheme for characters is ASCII (American Standard Code for Information Interchange). • Alphanumeric characters, operators, punctuation symbols, and control characters are represented by 7-bit codes. • It is convenient to use an 8-bit byte to represent and store a character. • The code occupies the low-order seven bits. The high-order bit is usually set to 0. • The codes for the alphabetic and numeric characters are in increasing sequential order when interpreted as unsigned binary numbers. This facilitates sorting operations on alphabetic and numeric data. • The low-order four bits of the ASCII codes for the decimal digits 0 to 9 are the first ten values of the binary number system. • This 4-bit encoding is referred to as the binary-coded decimal (BCD) code.

Editor's Notes

  1. For example, using 2’s-complement representation for 4-bit signed numbers, if we add +7 and +4, the sum vector is 1011, which is the representation for −5, an incorrect result