Michael Gschwind, Blue Gene/Q: Design for Sustained Multi-Petaflop Computing

© 2012 IBM Corporation
Blue Gene/Q®:
Design for Sustained Multi-
Petaflop Computing
Michael Gschwind
IBM Corp.
This disclosure is provided for informational purposes only and is subject to change, without notice, at the sole discretion of IBM. This information is intended to outline IBM’s
product direction and does not commit IBM to make, offer or deliver any products or technologies which are not currently publicly announced or generally available from IBM.

Michael Gschwind, Blue Gene/Q®: Design for Sustained Multi-Petaflop Computing
International Conference on Supercomputing 2012, San Servolo, Venice
IBM System Design
ƒ Holistic system-level optimization across
hardware and software
– From technology and circuits to
software
– Codesign of technologies for maximum
efficiency
ƒ Innovation across the entire value stack
ƒ Benefit from IBM’s system skills
– Experience in system tuning and
optimization
IBM System Design
software
– Co-design of technologies for maximum
efficiency
optimization

Blue Gene/Q Design Goals
ƒ Provide the platform for the future of
supercomputing
– Order of magnitude improvement in
efficiency
– Build the most scalable, most reliable, most
programmable and fastest supercomputer
ƒ Give programmers the tools to exploit this
platform with groundbreaking applications

Leverage IBM’s technologies for HPC
ƒ High-reliability SOI design
ƒ Power ISA™
ƒ SIMD Vector architecture
ƒ Communication technologies
ƒ Packaging and Cooling
ƒ System-level RAS experience
ƒ Numeric middleware: ESSL, MASSV
ƒ Deep understanding of algorithms and workloads

And Use HPC Innovation to Benefit Commercial Systems
ƒ Multicore SoC
ƒ Fast Networks
ƒ Workload Optimized
ƒ Hybrid Architectures
ƒ Scalability
ƒ High Efficiency

software
efficiency
optimization
The “Walls”– Traditional Obstacles to Design
ƒ Memory Wall
– High bandwidth interfaces
– Exploiting memory level
parallelism
ƒ Power Wall
– Optimize for FLOPS / W
– Improve design efficiency
ƒ Frequency Wall
– Optimize balance between
frequency and parallelism

software
efficiency
optimization
The New “Walls”
ƒ Scalability Wall
ƒ Communication Wall
ƒ Reliability Wall
ƒ Programmer Productivity Wall

Blue Gene/Q Concept
ƒ Avoid scaling of processors into area of diminishing returns
ƒ Scalable, integrated SMP node
ƒ Integrated system-level network
ƒ Familiar environment and new abstractions
ƒ Design with a focus on system-level reliability

System
96 racks @ 20PF/s
Node Card
32 Compute Cards @ 6.5TF/s,
Link Chips, Optics, Torus
Chip
16 cores @
205 GF/s
Compute Card
One chip in SCM
16 GB DDR3 Memory
Rack
32 Node Cards in 2 Midplanes
I/O Drawers
Rack
Peak Performance 209 TF
Sustained
(Linpack)
~170+ TF
Power ~100 kW
Power Efficiency ~1.7 GF/W
System Scaling to Multi-Petaflop

BlueGene/Q Compute chip
ƒ 360 mm² Cu-45 technology (SOI)
– ~ 1.47 B transistors
ƒ 18-way CMP
–16 user + 1 service processors
–plus 1 redundant processor
–all processors are symmetric
–peak performance 204.8
GFLOPS@55W
ƒ Central shared L2 cache: 32 MB
–eDRAM
ƒ Dual memory controller
–16 GB external DDR3 memory
–1.33 Gb/s
–2 * 16 byte-wide interface (+ECC)
ƒ Chip-to-chip networking
–Router logic integrated into BQC
chip.
ƒ External IO
–PCIe Gen2 interface
System-on-a-Chip design - integrates processors,
memory and networking logic into a single chip

BG/Q Processor Unit
ƒ A2 processor core
ƒ Based on PowerEN™ design
ƒ Implements 64-bit Power ISA™
ƒ Optimized for aggregate throughput:
– 4-way simultaneously multi-threaded (SMT)
– 2-way concurrent issue: XU (br/int/l/s) + QPU
ƒ 1.6 GHz @ 0.8V QPU

Quadvector Processing Unit (QPU)
ƒ Power-efficient scalable performance
– 8 floating point ops (FMA) per cycle
– Concurrent load and store to ensure peak
utilization
ƒ 4 double precision pipelines, usable as:
– scalar FPU
– 4-wide FPU SIMD
– 2-wide complex arithmetic SIMD
ƒ QPX Instruction extensions to Power ISA
ƒ Load/store supports a multitude of alignments
ƒ Permute instructions to reorganize vector data
RF
MAD0 MAD3
MAD2
MAD1
RF
RF
RF
Permute
Load
A2
256
64
Putting the Q into Blue Gene/Q:

Quadvector Processing Extensions (QPX)
ƒ New FPU SIMD architecture optimized for Blue
Gene/Q
– Scalable, efficient performance
– Co-design for efficient code generation
ƒ Builds on Blue Gene application insights
– Optimized for scientific applications
ƒ Improved programmer productivity
– Automatic SIMD-ization
– Efficient handling of unaligned data
– Conversions from control flow to dataflow
– Efficient SIMD exceptions handling
QPU
QPX
Programmability Compilability
PowerPC
Compatibility
IEEE
Capability
Efficiency

Beyond SIMD:
Flexible communication between element lanes
from D$
Vector permute Load & replicate Complex numbers

Breaking the control flow limit with data-level parallelism
for (i =0; i< VL; i++)
if (a[i] !=0)
m[i] = b[i]/a[i];
else
m[i] = b[i] * 10;
a’[0] =b[0]/a[0] b’[0]=b[0]*10
s[0]=a[0] != 0
m[0]=s[0]?
a’[0]:b’[0]
a’[1]=b[1]/a[1] b’[1]=b[1]*10
s[1]=a[1] != 0
m[1]=s[1]?
a’[1]:b’[1]
a’[2]=b[2]/a[2] b’[2]=b[2]*10
s[2]=a[2] != 0
m[2]=s[2]?
a’[2]:b’[2]
a’[3]=b[3]/a[3] b’[3]=b[3]*10
s[3]=a[3] != 0
m[3]=s[3]?
a’[3]:b’[3]
Exploit data parallelism
a[0] != 0
m[0]=b[0]/a[0] m[0]=b[0]*10
a[1] != 0
m[1]=b[1]/a[1] m[1]=b[1]*10
a[2] != 0
m[2]=b[2]/a[2] m[2]=b[2]*10
a[3] !=0
m[3]=b[3]/a[3] m[3]=b[3]*10
Long
latency

Exception condition detection in data-parallel code
b’[0]=b[0]*10
s[0]=a[0] != 0
m[0]=s[0]?
t’[0]:b’[0]
b’[1]=b[1]*10
s[1]=a[1] != 0
m[1]=s[1]?
t’[1]:b’[1]
b’[2]=b[2]*10;
s[2]=a[2] != 0
m[2]=s[2]?
t’[2]:b’[2]
b’[3]=b[3]*10;
s[3]=a[3] != 0
m[3]=s[3]?
t’[3]:b’[3]
t’[0] =b[0]*t[0] t’[1]=b[1]*t[1] t’[3]=b[3]*t[3]
t’[2]=b[2]*t[2]
qvfcmpgt qS, qA, qB
qvre qT, qA t[0] =1/a[0] t[1]=1/a[1] t[2]=1/a[2] t[3]=1/a[3]
qvfmul qT’, qB, qT
qvfmul qB’, qB, q10_0
qvfsel qM, qS, qT’,qB’
qvstfdx qM, rA, rB store m[0] store m[1] store m[2] store m[3]

store m[0] store m[1] store m[2] store m[3]
b’[0]=b[0]*10
s[0]=a[0] != 0
m[0]=s[0]?
t’[0]:b’[0]
b’[1]=b[1]*10
s[1]=a[1] != 0
m[1]=s[1]?
t’[1]:b’[1]
b’[2]=b[2]*10;
s[2]=a[2] != 0
m[2]=s[2]?
t’[2]:b’[2]
b’[3]=b[3]*10;
s[3]=a[3] != 0
m[3]=s[3]?
t’[3]:b’[3]
t’[0] =b[0]*t[0] t’[1]=b[1]*t[1] t’[3]=b[3]*t[3]
t’[2]=b[2]*t[2]
qvfcmpgt qS, qA, qB
qvstfdx qM, rA, rB store & indicate
m[0]
store & indicate
m[1]
Store & indicate
m[2]
store & indicate
m[3]
qvsfdxi qM, rA, rB

b’[0]=b[0]*10
s[0]=a[0] != 0
m[0]=s[0]?
t’[0]:b’[0]
b’[1]=b[1]*10
s[1]=a[1] != 0
m[1]=s[1]?
t’[1]:b’[1]
b’[2]=b[2]*10;
s[2]=a[2] != 0
m[2]=s[2]?
t’[2]:b’[2]
b’[3]=b[3]*10;
s[3]=a[3] != 0
m[3]=s[3]?
t’[3]:b’[3]
t’[0] =b[0]*t[0] t’[1]=b[1]*t[1] t’[3]=b[3]*t[3]
t’[2]=b[2]*t[2]
qvfcmpgt qS, qA, qB
qvstfdxi qM, rA, rB store & indicate
m[0]
store & indicate
m[1]
store & indicate
m[2]
store & indicate
m[3]

b’[0]=b[0]*10
s[0]=a[0] != 0
m[0]=s[0]?
t’[0]:b’[0]
b’[1]=b[1]*10
s[1]=a[1] != 0
m[1]=s[1]?
t’[1]:b’[1]
b’[2]=b[2]*10;
s[2]=a[2] != 0
m[2]=s[2]?
t’[2]:b’[2]
b’[3]=b[3]*10;
s[3]=a[3] != 0
m[3]=s[3]?
t’[3]:b’[3]
t’[0] =b[0]*t[0] t’[1]=b[1]*t[1] t’[3]=b[3]*t[3]
t’[2]=b[2]*t[2]
qvfcmpgt qS, qA, qB
qvstfdxi qM, rA, rB store & indicate
m[0]
store & indicate
m[1]
store & indicate
m[2]
Store & indicate
m[3]

Scalability innovations for thread-level communication
ƒ Atomic operations
– Faster OpenMP work hand off
ÎReduced messaging latency
ƒ Wake-up unit
ÎImprove latency and reduce contention

Scalability innovation to enable speculation:
breaking data dependences with cache multi-versioning
ƒ Multi-versioned data
– Tracked by score board in L2 cache
ƒ Transactional Memory:
– Load/store conflicts detected and resolved by SW
ƒ Speculative Execution:
– Load/store conflicts detected and resolved based
on original program ordering
Single MPI
Task
User defined parallelism
User defined
transaction start
User defined
transaction
end
parallelization completion
synchronization point
Hardware
detected
dependency
conflict
rollback
Single MPI
Task
User defined parallelism
User defined
transaction start
User defined
transaction
end
parallelization completion
synchronization point
Hardware
detected
dependency
conflict
rollback

Scalability with the 17th core
ƒ Common IO Client Interface
– Asynchronous I/O completion hand-off
ƒ Application Agents: privileged application
processing
– Messaging assist, e.g., MPI pacing thread
– Performance and trace helpers
ƒ RAS Event handling and interrupt off-load
– Reduce O/S noise and jitter
(not to scale)

Interconnect Innovations for MPI Scaling
ƒ Integrated 5D torus
– High nearest neighbor bandwidth
• measured ~1.75 GB/s per link
– Simple partitioning
ƒ 10 links
– Hardware assisted collective and
barrier
– FP addition support in network
ƒ Hardware latency
– Nearest: 80ns
– Farthest: 3μs (96-rack 20PF
system)

Communication Innovations for MPI Scaling:
High-Performance, application-level RDMA messaging acceleration
ƒ Dedicated accelerators for MPI
ƒ 32 MEs offload packet operations
ƒ Accessible from problem state applications
Slave port master ports
Crossbar Switch
DCRs
Interrupts &
UPC events
Global
Barrier
Control &
Status
…
rMEs
…
iMEs
Injection Control &
Arbitration
IC SRAM MC SRAM
Reception Control
RC SRAM RPUT
SRAM
MU
To Central
Global Barrier
Logic in ND
To ND Injection
FIFOs
To ND
Reception
FIFOs

Design for Reliability: Blue Gene Compute Chip
ƒ DDR3, L2 cache, network, all major arrays
and buses: ECC protected
ƒ Stacked / DICE latches for critical state
holding latches
ƒ Register files and minor buses: parity
protected, with recovery
FMA
PRM
recovery
Copy 0
Copy 1
US7,512,772

Co-Design for Reliability and Serviceability
ƒ Avoid “silent hangs” by catching and reporting
failure indications (“machine checks”)
ƒ Firmware operates from on-chip BeDRAM with
minimal resources
– Machine check vectors point to BeDRAM
ƒ Hardware provides on-chip 256K BeDRAM (“Boot
eDRAM”)
– Node firmware can continue to operate in the
presence of L2, DDR interface and memory
failure
– Minimize requirements to report node failure

Packaging and Cooling for Reliability
ƒ Water cooled node board
– Very stable, low temperature environment for
ASICs, DRAM, power supplies, optics
ƒ Node Board integrates
– 32 compute cards
– 8 link ASICs
• drive 4D links using 10Gb/s optical
transceivers
ƒ Compute Cards
– Memory soldered to card for reliability
ƒ Hot pluggable front-end power supplies

Blue Gene/Q Compute Card
ƒ Basic FRU of a BlueGene/Q system
ƒ Compute Card has 1 BQC chip + 72 SDRAMs (16GB DDR3)
ƒ Two heat sink options: water-cooled Æ “Compute Node” / air-cooled Æ “IO Node”
ƒ Connectors carry power supplies, JTAG etc, and 176 HSS signals (4 and 5 Gbps)

Height 2095.5 mm (82.5 inches)
Width 1219.2 mm (48 inches)
Depth 1321 mm (52 inches)
Weight
1520 kg (3350 lbs)
(including water)
I/O enclosure with 4 drawers
177 kg (390 lbs)
Packaging and Cooling
Water cooled node board w/ 32 compute cards

Cabled Rack

Rack Water Cooling

Blue Gene Rack Group

Argonne Mira

Blue Gene/Q Sequoia System

Programmability: emphasis on general purpose applicability

Messaging Software Architecture
ƒ BG/Q Messaging is based on the optimized Parallel Active Message Interface (PAMI) open
source library
ƒ Multiple program models may coexist within a task (e.g. MPI + GA/ARMCI)
ƒ Direct access to PAMI and baremetal SPI interfaces is allowed
Other
Paradigms*
SPI
Message Layer Core (C++)
pt2pt protocols
ARMCI
MPICH
Converse/Charm++
PAMI API (C)
Network Hardware (DMA, Collective Network, Global Interrupt Network)
Application
Global
Arrays
High-Level
API
collective protocols
Low-Level
API
UPC*
DMA Device Collective Device GI Device Shmem Device

Application Performance:
Speedup from Blue Gene/P to Blue Gene/Q
ƒ Q/P ratio indicates performance
increase per node
–using the same number of cores
on both BG/P and BG/Q
–2x-4x more total threads on BG/Q
ƒ Applications expected to benefit from
tuning over system life
–Improved vectorization and SIMD
exploitation
–Tuning to network topologies
*Linpack (tuned) performance is ~82.5% of peak performance on BG/Q
Application Q/P ratio
Ported Applications
DNS3D 16.9
FLASH 5.9
GFMC 10.5
GTC 11.2
HELD-SUAREZ 8.2
MILC 6.1
NAMD 5.5
NEK 7.4
Geometric Mean 8.4
Tuned Applications
GROMACS 15
GADGET 16
GENE 11
OCTOPUS 11
Geometric Mean 13
Linpack 173 TF/s*

A Vision for Applying Supercomputers
ƒ Traditional usage for science discoveries
ƒ For advances in drug discovery and understanding life sciences
Materials Science
Molecular Dynamics
Life Sciences: Sequencing
Life Sciences: In-Silico
Trials, Drug Discovery
Biological Modeling
Brain Science

Fraud Prevention
Telecom
Environment
Law Enforcement
Health Care Traffic Control
For a Smarter, Greener Planet
Energy

Up to
10,000
Times
larger
Up to 10,000
times faster
Traditional Data
Warehouse and
Business Intelligence
Data
Scale
Data
Scale
yr mo wk day hr min sec … ms μs
Exa
Peta
Tera
Giga
Mega
Kilo
Decision Frequency
Occasional Frequent Real-time
Data in Motion
Data
at
Rest
For improved business results with Advanced Business
Analytics for new “Big Data”
Telco Promotions
100,000 records/sec, 6B/day
10 ms/decision
270TB for Deep Analytics

And for Answering All Questions
Answer with
Confidence
In <300
Milliseconds
Final
Merging /
Ranking
Deep
Answer
Scorers
Deep
Answer
Scorers
Deep
Answer
Scorers
Deep
Evidence
Scorers
Supporting
Evidence
Retrieval
Supporting
Evidence
Retrieval
Supporting
Evidence
Retrieval
Supporting
Evidence
Retrieval
Shallow
Answer
Scorers
Shallow
Answer
Scorers
Shallow
Answer
Scorers
Shallow
Scoring &
Filtering
Primary
Search
Primary
Search
Primary
Search
Search &
Candidate
Generation
100’s of
Hits 10k’s of
Hits Statistical
Models
1,000s of
Candidates
100s of
Candidates
10Ks Pieces
of Evidence
100K
Scores
Huge volumes
of text
for knowledge
100’s of millions
of facts
refine interpretation
Clue/
Category
Analysis
Dist.
Search

New Era of High Performance Computing
“Physics
Driven”
“Data
Driven”
ÆTechnology becomes affordable and pervasive
ÆBroad adoption across a variety of industries
ÆUsage for modeling, simulation, predictive analysis
workloads
ÆDelivered via Clusters, Grids, and Cloud
Supercomputers
Science, Research & Government
BlueGene/Q, Power 775, iDataPlex
Business Analyt.
Financial Services
Digital Media
Analytics / Big Data /
Cloud deployment

16.32 PFLOP (81.08% eff) on 2012-06-08
jobid: 24760 size=98304 end=2012-06-08 09:55:38.726489 /bgsys/apps/linpack//BURN_R0-RB-96K.2012_0607_1042 PASS
16324.751 TF (81.08%)
stdout[0]: ================================================================================
stdout[0]: T/V N NB P Q Time Gflops
stdout[0]: --------------------------------------------------------------------------------
stdout[0]: WR16L2L4 12681215 256 384 1024 83280.78786813750048168 1.63247519148838781e+07
stdout[0]: --VVV--VVV--VVV--VVV--VVV--VVV--VVV--VVV--VVV--VVV--VVV--VVV--VVV--VVV--VVV-
stdout[0]: Max aggregated wall time rfact . . . : 10.29742211375065608
stdout[0]: + Max aggregated wall time pfact . . : 6.47944774470261109
stdout[0]: + Max aggregated wall time mxswp . . : 4.23286864816418529
stdout[0]: + Max aggregated wall time laswp . . : 2011.12352745312227853
stdout[0]: Max aggregated wall time up tr sv . : 69.15868747876083944
stdout[0]: Max aggregated wall time dgemm . . . : 75943.87711409496841952
stdout[0]: Max aggregated wall time dtrsm . . . : 466.78703577646933809
stdout[0]: --------------------------------------------------------------------------------
stdout[0]: ||Ax-b||_oo/(eps*(||A||_oo*||x||_oo+||b||_oo)*N)= 0.0005574431767873 ...... PASSED
stdout[0]: RAMP ended at 1
stdout[0]: ================================================================================
stdout[0]:
stdout[0]: Finished 1 tests with the following results:
stdout[0]: 1 tests completed and passed residual checks,
stdout[0]: 0 tests completed and failed residual checks,
stdout[0]: 0 tests skipped because of illegal input values.
stdout[0]: --------------------------------------------------------------------------------
stdout[0]:
stdout[0]: End of Tests.
stdout[0]: ================================================================================
Blue Gene/Q®: The World’s Fastest Supercomputer

0.0001
0.001
0.01
0.1
1
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100
1000
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1000000
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Rmax
Performance
(TFlops)
Over the long haul IBM has demonstrated continued leadership in various
TOP500 metrics, even as the performance continues it’s relentless growth.
Total Aggregate Performance # 1
# 10 # 500
Source:
www.top500.org
Blue Square Markers Indicate IBM Leadership
16.33 PF
Top500 Performance Trends

Blue Gene/Q is the most energy-efficient supercomputer (*)
# Site Vendor Processor kWatts Mflops/w
1 DOE/NNSA/LLNL IBM BlueGene/Q, Power BQC 16C 1.60GHz 41.1 2100.88
2 IBM Thomas J. Watson Research Center IBM BlueGene/Q, Power BQC 16C 1.60GHz 41.1 2100.88
3 DOE/SC/Argonne National Laboratory IBM BlueGene/Q, Power BQC 16C 1.60GHz 82.2 2100.86
4 DOE/SC/Argonne National Laboratory IBM BlueGene/Q, Power BQC 16C 1.60GHz 82.2 2100.86
5 Rensselaer Polytechnic Institute IBM BlueGene/Q, Power BQC 16C 1.60GHz 82.2 2100.86
6 University of Rochester IBM BlueGene/Q, Power BQC 16C 1.60GHz 82.2 2100.86
7 IBM Thomas J. Watson Research Center IBM BlueGene/Q, Power BQC 16C 1.60GHz 82.2 2100.86
8 University of Edinburgh IBM BlueGene/Q, Power BQC 16C 1.60GHz 493.1 2099.56
9 Daresbury Laboratory (S&T Fac. Council) IBM BlueGene/Q, Power BQC 16C 1.60GHz 575.3 2099.50
10 Forschungszentrum Juelich (FZJ) IBM BlueGene/Q, Power BQC 16C 1.60GHz 657.5 2099.46
11 CINECA IBM BlueGene/Q, Power BQC 16C 1.60GHz 821.9 2099.39
12 High Energy Accelerator Research Org. /KEK IBM BlueGene/Q, Power BQC 16C 1.60GHz 246.6 2099.14
13 EDF R&D IBM BlueGene/Q, Power BQC 16C 1.60GHz 328.8 2099.14
14 IDRIS/GENCI IBM BlueGene/Q, Power BQC 16C 1.60GHz 328.8 2099.14
15 Victorian Life Sciences Computation Initiative IBM BlueGene/Q, Power BQC 16C 1.60GHz 328.8 2099.14
16 IBM - Rochester IBM BlueGene/Q, Power BQC 16C 1.60GHz 164.4 2099.14
17 IBM - Rochester IBM BlueGene/Q, Power BQC 16C 1.60GHz 164.4 2099.14
18 DOE/NNSA/LLNL IBM BlueGene/Q, Power BQC 16C 1.60GHz 164.4 2099.14
19 DOE/SC/Argonne National Laboratory IBM BlueGene/Q, Power BQC 16C 1.60GHz 3945 2069.04
20 DOE/NNSA/LLNL IBM BlueGene/Q, Power BQC 16C 1.60GHz 7890 2069.04
Source: www.green500.org
*as measured by Green500,
6/2011, 11/2011 and 6/2012

•Ultra-scalability for breakthrough science, broad range of HPC applicability
•Address traditional walls for computer systems
•Address new walls on the path to ultrascalable exa-scale computing
•Low power, small footprint, low total cost of ownership (TCO)
•High reliability, 10-100X better MTBF/TF, low maintenance requirements
•New, even higher performing 256B quad-vector SIMD with 8 FLOPS per cycle
•Low latency, high performance inter-processor communications
•Open source and standards-based programming environment
Blue Gene/Q® is designed to overcome hurdles

Thank you!

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06/28/2012
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All performance information was determined in a controlled environment. Actual results may vary. Performance information
is provided “AS IS” and no warranties or guarantees are expressed or implied by IBM.
IBM does not warrant that the information offered herein will meet your requirements or those of your distributors or
customers. IBM provides this information “AS IS” without warranty. IBM disclaim all warranties, express or implied,
including the implied warranties of noninfringement, merchantability and fitness for a particular purpose or
noninfringement.

Disclaimer
References in this publication to IBM products or services do not imply that IBM intends to make them
available in every country in which IBM operates. Consult your local IBM business contact for information
on the products, features, and services available in your area.
Blue Gene, Blue Gene/Q and PowerEN are trademarks or registered trademarks of IBM Corporation in the
United States, other countries or both.
PowerISA and Power Architecture are trademarks or registered trademarks in the United States, other
countries, or both, licensed through Power.org
Linux is a registered trademark of Linus Torvalds.
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UNIX is a registered trademark in the United States and other countries, licensed exclusively through The
Open Group.
Other trademarks and registered trademarks are the properties of their respective companies.
Photographs shown are of engineering prototypes. Changes may be incorporated in production models.
This equipment is subject to all applicable FCC rules and will comply with them upon delivery.
IBM makes no representations or warranties, expressed or implied, regarding non-IBM products and
services.

Michael Gschwind, Blue Gene/Q: Design for Sustained Multi-Petaflop Computing

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Michael Gschwind, Blue Gene/Q: Design for Sustained Multi-Petaflop Computing