This ppt belongs to Computer Architecture and Organizations.

1. UNIT-III Central Processing Unit
Introduction & different types of Addressing Modes,
Program control, RISC and CISC architecture, Difference
between RISC and CISC,Introduction to Interrupt . Stack
Organization:
Memory Stack and Register

2. Introduction to Addressing Modes and Program Control
• Addressing Modes refer to the different ways in which an operand
(data) can be specified or accessed in a computer system during the
execution of an instruction. These modes are used by the processor to
determine how the data required for an instruction is located and
fetched. The effectiveness and speed of a CPU depend largely on the
types of addressing modes it supports.

3. • Program Control refers to the mechanisms and instructions used to
change the flow of execution in a program. It governs the sequence in
which instructions are executed, allowing for conditional branching,
looping, and function calls. Program control involves control flow
instructions such as jumps, branches, and procedure calls, among
others.

4. Types of Addressing Modes
Immediate Addressing Mode
•The operand is specified directly within the instruction itself, meaning the value is part of the
instruction.
•Example: MOV R1, #5 (where #5 is the immediate value that is loaded into register R1).
•Advantage: Fast access as the operand is already provided in the instruction.
•Disadvantage: Limited flexibility (you can't specify large data values)

5. Register Addressing Mode
•The operand is located in a register, and the instruction specifies the register.
•Example: MOV R1, R2 (where the value in register R2 is moved to register R1).
•Advantage: Fast as registers are the fastest form of storage.
•Disadvantage: Limited number of registers available.

6. Direct Addressing Mode
•The instruction specifies the memory address where the operand is stored.
•Example: MOV R1, [1000] (where the value stored at memory address 1000 is loaded into
register R1).
•Advantage: Simple and effective for accessing data at a fixed memory location.
•Disadvantage: The memory address must be known in advance and is fixed.

7. •Indirect Addressing Mode
•The operand’s memory address is specified indirectly by a
register or memory location. This allows more flexibility since
the actual memory address can change.
•Example: MOV R1, [R2] (where R2 contains the address of the
operand).
•Advantage: Provides flexibility, allowing access to dynamic
memory locations.
•Disadvantage: It requires extra memory accesses, which can
be slower.

8. Indexed Addressing Mode
•The operand’s address is calculated by adding an index value (often a register) to a
base address.
•Example: MOV R1, [1000 + R2] (where 1000 is a base address and R2 is the index value).
•Advantage: Enables access to arrays or tables.
•Disadvantage: The calculation of the effective address can introduce overhead.

9. •Base-Register Addressing Mode
•A combination of base and offset is used to calculate
the operand's address. The base address is held in a
register, and an offset value is added.
•Example: MOV R1, [BX + 10] (where BX is the base
register, and 10 is the offset).
•Advantage: Used in systems with dynamic memory
addressing and supports flexible memory layouts like
arrays.
•Disadvantage: Adds complexity to address
calculation.

10. Relative Addressing Mode
•The operand's address is determined by the current program counter (PC) and an offset.
•Example: A branch instruction like BEQ target might use relative addressing, where target is the offset
from the current instruction address.
•Advantage: Useful for implementing program flow control (e.g., branching or jumping).
•Disadvantage: Typically used only for control flow instructions.

11. Register Indirect Addressing Mode
•The instruction specifies a register containing the address of the operand.
•Example: MOV R1, [R2] (where R2 contains the address of the operand).
•Advantage: Allows for flexible and dynamic memory access.
•Disadvantage: Requires one more level of indirection, which can affect
performance

12. Program Control
• Program control is a critical aspect of the CPU's functionality as it
determines the order in which instructions are executed. Several
types of instructions enable program control:

13. Unconditional Branch (Jump)
•A jump instruction causes the program to branch to a specified address without
any condition.
•Example: JMP 2000 (The program jumps to the instruction at memory address
2000).

14. Conditional Branch (Jump)
•These instructions allow the program to branch to a specific
address only if a certain condition is met, such as equality, zero, or
carry.
•Example: JE 3000 (Jump to address 3000 if the zero flag is set).

15. Call and Return Instructions
•Call: A procedure or function call, where the current
address is saved, and execution moves to a new
location.
•Return: Used to return control back to the calling
function.
•Example: CALL FUNC1 and RET.

16. Interrupts and Traps
• Interrupts are events that cause the CPU to pause its current
execution to handle a different event or process.
• Traps are similar to interrupts but are typically software-generated for
handling errors or system calls.

17. Halt (Stop)
•The HALT instruction stops the program execution and
prevents any further instructions from being executed.

18. • addressing modes and program control are essential components in
the execution of instructions in a computer system. Addressing modes
define how the operands are accessed, while program control dictates
how and when control shifts within the program. Together, they allow
for more efficient and flexible execution of code.

19. RISC vs. CISC Architecture
• RISC (Reduced Instruction Set Computer) and CISC (Complex
Instruction Set Computer) are two different types of processor
architectures that define how the CPU executes instructions.

20. RISC Architecture
• Simple Instructions: RISC processors have a smaller set of simple
instructions. Each instruction is designed to do a very basic task.
• Faster Execution: Since the instructions are simple, they can execute
very quickly, often in just one clock cycle.
• More Instructions: To complete a task, RISC systems may need to use
more instructions compared to CISC, but each one is fast.
• Examples: ARM processors, used in smartphones and tablets, are a
popular example of RISC.

22. Key Points of RISC:
• Fewer, simpler instructions.
• Executes instructions in one cycle (mostly).
• More instructions may be needed for complex tasks.
• Focus on speed and efficiency.

23. CISC Architecture
• Complex Instructions: CISC processors have a larger set of more
complex instructions. Each instruction can do multiple tasks at once.
• Slower Execution: Since the instructions are more complicated, they
often take more than one clock cycle to execute.
• Fewer Instructions: To complete a task, CISC systems usually need
fewer instructions, but each one takes longer.
• Examples: Intel x86 processors (found in most desktop and laptop
computers) are examples of CISC.

25. Key Points of CISC:
• More, complex instructions.
• Some instructions can do multiple tasks at once.
• Executes instructions in more than one cycle.
• Focus on reducing the number of instructions.

26. Feature RISC CISC
Instruction Set
Small, simple
instructions
Large, complex
instructions
Execution Speed Fast (mostly one cycle
per instruction)
Slower (multiple cycles
per instruction)
Code Size Larger code (more
instructions)
Smaller code (fewer
instructions)
Example Processors ARM, MIPS, SPARC Intel x86, AMD

27. Conclusion:
• RISC is focused on speed and efficiency, using simple instructions that
can be executed quickly.
• CISC focuses on reducing the number of instructions needed, using
more complex instructions to do more work in fewer steps, but at the
cost of speed.