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Ha, Stephanie
December 1, 2008
EXPERIMENT 20: DESIGN OF SYNCHRONOUS COUNTERS POST-LAB
Summary
In this experiment, a synchronous counter was constructed based on the state diagram
presented in the Figure 20-1 in the data section. From Table 20-1, the Karnaugh maps (Figure
20-2) for each flip-flop were obtained after determining the inputs of each flip-flop.
From Figure 20-2, the circuit was constructed based on these equations. Figure 20-3
illustrates a schematic of the circuit where flip-flop C is the most significant. In constructing the
circuit, it was determined that ‘011’ went to the next state of ‘000’ instead of ‘010’.
From the previous experiment, the circuit was then debugged to find that QB was not
working properly. Each flip-flop was tested with a logic indicator to verify its output. It was
found that KB was not working properly: it was connected to QC’ (pin14) instead of QC (pin15).
Making the appropriate change, the circuit worked properly.
The next state for unused states 5 and 7 can be determined through various methods. One
method is from the previous experiment where the sequence can be determined to set and reset
the value to state 5 and state 7 and then use a pushbutton switch to reset these values. Another is
to use Table 20-2, Table 20-3, and Figure 20-3 to determine the input of each flip from its K-
map.
Data
Figure 20-1: Required Sequence for Circuit
1
Table 20-2: State Table and Flip-Flop for Circuit
Present State Next State Flip-Flops
qC qB qA QC QB QA JC KC JB KB JA KA
0 0 0 0 0 1 0 x 0 x 1 x
0 0 1 0 1 1 0 x 1 x x 0
0 1 1 0 1 0 0 x x 0 x 1
0 1 0 1 1 0 1 x x 0 0 x
1 1 0 1 0 0 x 0 x 1 0 x
1 0 0 0 0 0 x 1 x 0 0 x
1 0 1 x x x x x x x x x
1 1 1 x x x x x x x x x
*Note: Highlighted areas indicate unused state
Figure 20-2: Karnaugh Maps for JK Flip-Flops
Figure 20-3: Schematic for Circuit from equations in Figure 20-2
Review Questions
1. Complete the design for the sequential counter in Figure 20-3 by constructing Karnaugh
maps for the B and A flip-flops. Read the maps. As a check, you can compare your result
with the circuit drawn in Figure 19-1.
2
State Diagram for Fig. 20-3
State Table and Excitation Table for Flip-Flops
Present State Next State Flip-Flops
qD qC qB qA QD QC QB QA JD KD JC KC JB KB JA KA
0 0 0 1 0 0 1 1 0 x 0 x 1 x x 0
0 0 1 1 0 0 1 0 0 x 0 x x 0 x 1
0 0 1 0 0 1 1 0 0 x 1 x x 0 0 x
0 1 1 0 0 1 0 0 0 x x 0 x 1 0 x
0 1 0 0 1 1 0 0 1 x x 0 0 x 0 x
1 1 0 0 1 0 0 0 x 0 x 1 0 x 0 x
1 0 0 0 1 0 0 1 x 0 0 x 0 x 1 x
1 0 0 1 0 0 0 1 x 1 0 x 0 x 0 x
Karnaugh Maps for Fig. 20-3 (D + C Flip-Flops)
3
2. Describe the logic necessary to add a seven-segment display to the circuit you designed in
this experiment to enable the display to show the state of the counter.
a. Connect seven-segment display, MAN72 to seven-segment to BCD decoder or 7447A
(from previous experiment). Connect flip-flops to inputs of 7447A (DCBA) with C being
the most significant.
3. Assume you wanted to make the sequential circuit you designed in this experiment start in
state 5 if a reset pushbutton is pressed. Describe how you would modify the circuit to
incorporate this feature.
a. Derive the K-map for state 5Connect clocks C and A together to push button switch,
leaving B grounded to obtain a clock of ‘101’. Leave all other connections as it is.
4. Assume you wanted to change the circuit from this experiment to be able to reverse the
sequence. How would you go about this?
a. Start all over again (repeat process) by reversing the state diagram for the circuit in the
experiment.
i. State Diagram
4
ii. State table
Present State Next State Flip-Flops
qC qB qA QC QB QA JC KC JB KB JA KA
0 0 0 1 0 0 1 x 0 x 0 x
1 0 0 1 1 0 x 0 1 x 0 x
1 1 0 0 1 0 x 1 x 0 0 x
0 1 0 0 1 1 0 x x 0 1 x
0 1 1 0 0 1 0 x x 1 x 0
0 0 1 0 0 0 0 x 0 x x 1
iii. K-Maps
iv. Construct circuit based on K-map (not shown)
5
ii. State table
Present State Next State Flip-Flops
qC qB qA QC QB QA JC KC JB KB JA KA
0 0 0 1 0 0 1 x 0 x 0 x
1 0 0 1 1 0 x 0 1 x 0 x
1 1 0 0 1 0 x 1 x 0 0 x
0 1 0 0 1 1 0 x x 0 1 x
0 1 1 0 0 1 0 x x 1 x 0
0 0 1 0 0 0 0 x 0 x x 1
iii. K-Maps
iv. Construct circuit based on K-map (not shown)
5

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[EXPERIMENT20] DeSIGN OF SYNCHRONOUS COUNTERS

  • 1. Ha, Stephanie December 1, 2008 EXPERIMENT 20: DESIGN OF SYNCHRONOUS COUNTERS POST-LAB Summary In this experiment, a synchronous counter was constructed based on the state diagram presented in the Figure 20-1 in the data section. From Table 20-1, the Karnaugh maps (Figure 20-2) for each flip-flop were obtained after determining the inputs of each flip-flop. From Figure 20-2, the circuit was constructed based on these equations. Figure 20-3 illustrates a schematic of the circuit where flip-flop C is the most significant. In constructing the circuit, it was determined that ‘011’ went to the next state of ‘000’ instead of ‘010’. From the previous experiment, the circuit was then debugged to find that QB was not working properly. Each flip-flop was tested with a logic indicator to verify its output. It was found that KB was not working properly: it was connected to QC’ (pin14) instead of QC (pin15). Making the appropriate change, the circuit worked properly. The next state for unused states 5 and 7 can be determined through various methods. One method is from the previous experiment where the sequence can be determined to set and reset the value to state 5 and state 7 and then use a pushbutton switch to reset these values. Another is to use Table 20-2, Table 20-3, and Figure 20-3 to determine the input of each flip from its K- map. Data Figure 20-1: Required Sequence for Circuit 1
  • 2. Table 20-2: State Table and Flip-Flop for Circuit Present State Next State Flip-Flops qC qB qA QC QB QA JC KC JB KB JA KA 0 0 0 0 0 1 0 x 0 x 1 x 0 0 1 0 1 1 0 x 1 x x 0 0 1 1 0 1 0 0 x x 0 x 1 0 1 0 1 1 0 1 x x 0 0 x 1 1 0 1 0 0 x 0 x 1 0 x 1 0 0 0 0 0 x 1 x 0 0 x 1 0 1 x x x x x x x x x 1 1 1 x x x x x x x x x *Note: Highlighted areas indicate unused state Figure 20-2: Karnaugh Maps for JK Flip-Flops Figure 20-3: Schematic for Circuit from equations in Figure 20-2 Review Questions 1. Complete the design for the sequential counter in Figure 20-3 by constructing Karnaugh maps for the B and A flip-flops. Read the maps. As a check, you can compare your result with the circuit drawn in Figure 19-1. 2
  • 3. State Diagram for Fig. 20-3 State Table and Excitation Table for Flip-Flops Present State Next State Flip-Flops qD qC qB qA QD QC QB QA JD KD JC KC JB KB JA KA 0 0 0 1 0 0 1 1 0 x 0 x 1 x x 0 0 0 1 1 0 0 1 0 0 x 0 x x 0 x 1 0 0 1 0 0 1 1 0 0 x 1 x x 0 0 x 0 1 1 0 0 1 0 0 0 x x 0 x 1 0 x 0 1 0 0 1 1 0 0 1 x x 0 0 x 0 x 1 1 0 0 1 0 0 0 x 0 x 1 0 x 0 x 1 0 0 0 1 0 0 1 x 0 0 x 0 x 1 x 1 0 0 1 0 0 0 1 x 1 0 x 0 x 0 x Karnaugh Maps for Fig. 20-3 (D + C Flip-Flops) 3
  • 4. 2. Describe the logic necessary to add a seven-segment display to the circuit you designed in this experiment to enable the display to show the state of the counter. a. Connect seven-segment display, MAN72 to seven-segment to BCD decoder or 7447A (from previous experiment). Connect flip-flops to inputs of 7447A (DCBA) with C being the most significant. 3. Assume you wanted to make the sequential circuit you designed in this experiment start in state 5 if a reset pushbutton is pressed. Describe how you would modify the circuit to incorporate this feature. a. Derive the K-map for state 5Connect clocks C and A together to push button switch, leaving B grounded to obtain a clock of ‘101’. Leave all other connections as it is. 4. Assume you wanted to change the circuit from this experiment to be able to reverse the sequence. How would you go about this? a. Start all over again (repeat process) by reversing the state diagram for the circuit in the experiment. i. State Diagram 4
  • 5. ii. State table Present State Next State Flip-Flops qC qB qA QC QB QA JC KC JB KB JA KA 0 0 0 1 0 0 1 x 0 x 0 x 1 0 0 1 1 0 x 0 1 x 0 x 1 1 0 0 1 0 x 1 x 0 0 x 0 1 0 0 1 1 0 x x 0 1 x 0 1 1 0 0 1 0 x x 1 x 0 0 0 1 0 0 0 0 x 0 x x 1 iii. K-Maps iv. Construct circuit based on K-map (not shown) 5
  • 6. ii. State table Present State Next State Flip-Flops qC qB qA QC QB QA JC KC JB KB JA KA 0 0 0 1 0 0 1 x 0 x 0 x 1 0 0 1 1 0 x 0 1 x 0 x 1 1 0 0 1 0 x 1 x 0 0 x 0 1 0 0 1 1 0 x x 0 1 x 0 1 1 0 0 1 0 x x 1 x 0 0 0 1 0 0 0 0 x 0 x x 1 iii. K-Maps iv. Construct circuit based on K-map (not shown) 5