The document describes different types of digital voltmeters (DVMs). It discusses the key advantages of DVMs over analog meters like eliminating observational errors and increasing measurement speed. It then describes three common types of DVMs: ramp type DVMs measure the time for a ramp voltage to change levels and count pulses, integrating DVMs use voltage integration techniques to generate pulse frequencies proportional to input voltage, and successive approximation DVMs use a successive approximation register and digital-to-analog converter to iteratively match the input voltage through a binary search process.

1. Digital Voltmeter (DVM)
• A DVM displays the value of ac or dc voltage being measured directly as discrete
numerals in the decimal number system
• Numerical readout of DVM is advantageous since it eliminates observational errors
(e.g., parallax & approximation errors) committed by operators
• The use of DVMs increases the speed with which readings can be taken
• Also the output of DVMs can be fed to memory devices for storage & future
computations
• On account of developments in IC technology, the size, the power requirements, & the
cost of DVM has been reduced
• Because of its small size, the portability of DVM has been increased
• In fact, for the same accuracy, a DVM is now less costly than its analog counterpart.

2. Types of DVMs
• Some of the most usually used DVMs are:
(i) Ramp Type DVM, (ii) Integrating Type DVM, & (iii) Successive Approximation Type
DVM
(i) Ramp Type DVM:
• The operating principle of a ramp type DVM is to measure the time that a linear ramp
voltage takes to change from the level of input voltage to 0 voltage (or vice versa)
• The time interval is measured with an electronic time interval counter & the count is
displayed as a number
• At the start of measurement, a negative-going ramp voltage (as shown in fig. 28.41) is
initiated but a positive-going ramp may also be used
• The ramp value is continuously compared with the voltage being measured (unknown
voltage)
• At the instant, the value of ramp voltage is equal to that of unknown voltage, a coincidence
circuit (input comparator), generates a pulse which opens a gate

3. • The ramp voltage continues to decrease till it reaches ground level (zero volts), at which
instant another comparator (called ground comparator) generates a pulse & closes the
gate
• The time elapsed between opening & closing the gate is ‘t’ as indicated in fig. (28.41)
• During this time interval, pulses from a clock pulse generator pass through the gate and
are counted & displayed
• The decimal number displayed by the readout is a measure of the value of the input
voltage
• The sample gate multivibrator determines the rate at which the measurement cycles are
initiated
• The sample gate circuit provides an initiating pulse for the ramp generator to start its next
ramp voltage
• At the same time, it sends a pulse to the counters which set all of them to 0, which
momentarily removes the digital display of the readout
Ramp Type DVM (-contd.)

4. Ramp Type DVM (-contd.)

5. Integrating Type DVM
• Integrating type DVM measures the true average value of the input voltage over a fixed
measuring period
• This voltmeter employs an integration technique that uses a voltage to frequency
conversion
• The voltage to frequency (V/F) converter functions as a feedback control system that
governs the rate of pulse generation in proportion to the magnitude of input voltage
• Actually when we use the voltage to frequency conversion technique, a train of pulses
(whose frequency depends upon the voltage being measured), is generated
• Then the number of pulses appearing in a definite interval of time is counted
• Since the frequency of these pulses is a function of unknown voltage, the number of
pulses counted in that period of time is an indication of the input (unknown) voltage
• The heart of this technique is the operational amplifier acting as an integrator

6. Integrating Type DVM (-contd.)
• Output voltage of integrator is given by
• Thus if a constant input voltage Ei is applied, an output voltage Eo is produced which
rises at a uniform rate and has a polarity opposite to that input voltage
• In other words, it is clear from the above relationship, that for a constant input voltage
the integrator produces a ramp output voltage of an opposite polarity
• Let us examine fig. (28.43), here the graphs showing relationships between input
voltages of three different values and their respective output voltages are shown
• It is clear that the polarity of the output voltage is opposite to that of the input voltage,
not only that, the greater the input voltage the sharper is the rate of rising (or slope) of
the output voltage
• The basic block diagram of a typical integrating type of DVM is shown in fig. (28.44)
t
.
RC
E
-
dt
E
RC
1
-
E i
i
o  


7. Integrating Type DVM (-contd.)
• The unknown voltage (Ei) is applied to the input of the integrator, and the output voltage
(Eo) starts to rise
• The slope of Eo is determined by the value of Ei
• This voltage is fed to a level detector and when Eo reaches a certain reference level, the
detector sends a pulse to the pulse generator gate
• The level detector is a device similar to a voltage comparator, in which the output voltage
from integrator Eo is compared with the fixed voltage of an internal reference source, and
when Eo reaches that level, the detector produces an output pulse
• It is evident that the greater the value of input voltage Ei, the sharper will be the slope of
output voltage Eo, and the quicker Eo will reach its reference level
• The output pulse of the level detector opens the pulse generator gate, permitting pulses
from a fixed frequency clock oscillator to pass through the pulse generator

8. Integrating Type DVM (-contd.)
• The pulse generator is a device such as a Schmitt trigger, that produces an output pulse
of fixed amplitude and width for every pulse it receives
• This output pulse (whose polarity is opposite to that of Ei and has a greater amplitude) is
fed back to the input of the integrator, & the net input to the integrator is now of the
reversed polarity as in fig. (28.45)
• As a result of this reversed input, the output Eo drops back to its original level
• Since, Eo is now below the reference level detector, there is no output from the detector
to the pulse generator gate & the gate gets closed
• Thus, no more pulses from the clock oscillator pass through to trigger the pulse generator
• When the output voltage pulse from the pulse generator has passed, Ei is restored to its
original value

9. Integrating Type DVM (-contd.)

10. Integrating Type DVM (-contd.)

11. Successive Approximation Type DVM
• The block diagram of the successive approximation DVM is shown in fig. (5.10)
• When the start pulse activates the control circuit, the SAR is cleared (i.e., the output of
SAR is 00000000) and the Vout of the D/A converter is 0
• Now, if Vin > Vout, the comparator output is +ve
• During the first clock pulse, the control circuit sets the D7 to 1; Vout jumps to Vref /2 and
SAR output is 10000000
• If Vout > Vin , the comparator output is –ve and the control circuit resets D7
• However, if Vin > Vout , the comparator output is +ve and the control circuit keeps D7 set
• Similarly, the rest of the bits beginning from D7 to D0 are set & tested
• Hence, the measurement is completed in 8-clock pulses
• At the beginning of the measurement cycle, a start pulse is applied to the start/stop
multivibrator, which sets 1 in the MSB and 0 in all other bits of the SAR (i.e., the reading
would be 10000000)

12. Successive Approximation Type DVM
• The ring counter then advances one count, shifting a 1 in the second MSB of the SAR
and its reading becomes 11000000
• This causes the DAC to increase its output by Vref /4 (i.e.,Vout=Vref/2+Vref /4), and again it
is compared with Vin
• In this case, Vout > Vin , the comparator produces an output that causes the control circuit
to reset the second MSB of SAR to 0
• The DAC output (Vout) then returns to its previous value of Vref/2 and awaits another input
from SAR
• When the ring counter advances by 1, the third MSB is set to 1 and the Vout rises by Vref
/8 (i.e.,Vout=Vref/2+Vref /8)
• The measurement cycle, thus proceeds through a series of successive approximations
• Finally, when the ring counter reaches its final count, the measurement cycle stops & the
digital output of the SAR represents the final approximation of the unknown input voltage
(Vin)

13. Successive Approximation Type DVM (-contd.)

14. Successive Approximation Type DVM (-contd.)