1. TECHNICAL REPORT
ON
DESIGN AND IMPLEMENTATION OF QPSK
MODULATOR USING DIGITAL SUBCARRIER
Submitted in partial fulfillment of requirements for the award of the
degree of M.Tech(VLSI)
In
Electronics & Communication Engineering
GONGADI NAGARAJU
126H1D5705
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
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2. Certificate
This is to certify that technical seminar entitled DESIGN AND
IMPLEMENTATION OF QPSK MODULATOR USING DIGITAL
SUBCARRIER had done by G.Nagaraju bearing roll no 126H1D5705 in the
department of ECE of NRI institute of Technology in partial fulfilment of M.Tech I
sem for the academic year 2012-2013
Head of the Department
P Sivarama Prasad
Associate Professor
Department of ECE
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3. INDEX
ABSTRACT
1.0 Introduction
1.1 Analysis of modulation
1.2 Purpose of Modulation
1.2.1 Ease of radiation
1.2.2 Simultaneous Transmission of Several signals
1.3 Analogue Modulation Methods
1.4 Digital Modulation Methods
2.0 Analysis of Quadrature Phase Shift Keying
2.1 Phase shift keying
2.2 QPSK Modulation
3.0 Block Diagram Of Digitally Implemented QPSK Modulator
3.1 LVDS Data with Line Receiver
3.2 FPGA
3.3 DAC
3.4 Smoothing Filter
3.5 Bipolar Converter
3.6 Sub Carrier Generation Using FPGA
4.0 Simulation Results
4.1 Specifications
4.2 Flow diagram of MATLAB Simulation
4.3 MATLAB Simulation Results
5.0 Hardware Realization
6.0 Acknowledgement
7.0 Conclusion
8.0 References
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4. ABSTRACT
The digitally implemented QPSK modulator is developed for satellite communication
for future satellite missions. As we know that for space application power and
bandwidth are most important parameters.The size of PCB and component count are
also important parameters. To reduce these all parameters we design new approach.
The new approach also minimizes the component count and hence reduces the PCB
size. In this modulator summation, orthogonal sub-carrier generation and mixing of
subcarrier with data are all digitally implemented inside the FPGA. Earlier, each of
these functions were being implemented by external analog components which are
frequency and temperature sensitive. So the components count was also more and
leading to bigger PCB size. Therefore we design this new concept to remove all
limitations of today’s modulator circuits which are used in on board processing
system. Digital approach for implementation of QPSK Modulation is attempted here.
Realization of hardware blocks like CCITT V.35 Scrambler, Differential Encoder, ½
rate Convolutional Encoder, Sine and Cosine subcarrier generation, assignment of
symbols with respect to I and Q data, their additions to obtain QPSK stream are
digitally implemented inside an FPGA using suitable high frequency sampler.
Exhaustive simulation and characterization are done to freeze design parameters.
Only at the last end, the digital QPSK stream is converted to analog using 10 bit
Digital to Analog Converter. Finally, the modulated signal obtained from D/A
Converter is suitably translated to required carrier frequency.
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5. 1.0 INTRODUCTION
In satellite communication , modulation is necessary to transfer the information
between satellite and the earth. There are basically two types of modulation technique
:ANALOG MODULATION and DIGITAL MODULATION. From these two
modulation technique digital modulation technique have several advantages over
analog modulation technique like less interference, greater fidelity, robust, high S/N
ratio etc. So in satellite communication generally digital modulation is used .In digital
modulation technique, there are several types of modulation techniques are present
like ASK(Analog shift Keying), FSK(Frequency Shift Keying) ,PSK(Phase Shift
Keying) etc. All these have own advantages and disadvantages. In satellite
communication power, bandwidth and size of circuit are very important parameter.
These parameter must be maintained for on board processing system in satellite
communication. Now in satellite communication power is severally limited. For the
satellite communication FSK is not generally used as it would require very high
bandwidth to modulate our data resulting in very low bandwidth efficiency. Higher
constellation QAM also can't be used in satellite communication as that would require
very high C/N ratio. The choice is between QPSK and BPSK. The advantage of
BPSK is that it requires the lowest C/N ratio. The drawback is that the data rate
achieved using BPSK is very low. QPSK is basically two BPSK links operating on
the same radio channel with their carriers in phase quadrature. Therefore the BER of a
QPSK remains the same as BPSK. At the same time the data rate is doubled. MSK is
also one type of PSK technique, but for this we require complex circuit and higher
bandwidth than QPSK . Our project demands high data rate without losing much on
bandwidth and power. Because of these tradeoffs we decided on using QPSK
modulation scheme for application of satellite communication. Now today in satellite
communication for on board processing system QPSK modulator is used but in this
modulator analog components are used like local oscillator, mixer, 90° phase shifter.
All these components are frequency and temperature sensitive. Also the no of
components are higher so size of PCB require for this modulator is comparatively
high. So after few years the performances of these components are degrade. And
ultimately this effects on the performance of QPSK modulator and this degrades the
performance of satellite communication. So our aim to design such a modulator
circuit which eliminates all these limitations of today’s modulator circuit used in
satellite communication. Here we design completely digital QPSK modulator. In our
circuit we eliminate the use of local oscillator, mixer, 90° phase shifter. The functions
of all these components are performed by FPGA. Here carrier is digitally generated
using LUT(Look Up Table). Now FPGA is digital component which is frequency and
temperature insensitive. So the performance of this modulator can not degrade as time
passes. And also the number of components are reduced and ultimately size of PCB is
reduced. So all the limitations of today’s modulator which are used in satellite
communication are eliminated.
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6. 1.1 Analysis of Modulation
Base band signals produced by various information sources are not always
suitable for direct transmission over a given channel. This signals are usually further
modified to facilitate transmission. This conversion process in known as modulation.
In this process the baseband signal is used to modify some parameter of a high
frequency carrier signal.
A carrier is a sinusoid of high frequency, and one of its parameters - such as
amplitude, frequency or phase – is varied in proportion to the base band signal.
Accordingly, we have amplitude, frequency modulation or phase modulation.
1.2 Purposes of Modulation
1.2.1 Ease of Radiation:
For efficient radiation of electromagnetic energy, the radiating antenna should be on
the order of one-tenth or more the wavelength of the signal radiated. For many
baseband signals, the wavelengths are too large for reasonable antenna dimensions.
For example, the power in a speech signal is concentrated at frequencies in the range
of 100 to 300Hz. The corresponding wave length is 100 to 3000km. This large
wavelength would necessitate an impracticably huge antenna. So to avoid this
problem, we modulate the signal with a high frequency carrier to translate the signal
spectrum to the region of carrier frequencies that corresponds to a much smaller
wavelength. For example, a 1 MHz carrier frequency corresponds to the wave length
of only 300m and requires an antenna of size 30m.
1.2.2 Simultaneous Transmission of Several Signals:
In the case of several radio stations broadcasting audio baseband signals
directly, without any modification they would interfere with each other because the
spectra of all the signals occupy more or less the same bandwidth. Thus it would be
possible to broadcast from only one radio or television station at a time which is a
waste because the channel bandwidth may be larger than that of the signal. One way
to solve this problem is to use modulation. We can use various audio signals to
modulate different carrier frequencies, thus translating each signal to a different
frequency range. If the various carriers are chosen sufficiently far apart in frequency,
the spectra of the modulated signals will not overlap and thus will not interfere with
each other. The method of transmitting several signals simultaneously is known as
Frequency Division Multiplexing. Here the bandwidth of the channel is shared by
various signals without any overlapping.
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7. 1.3 Analog modulation methods
In analog modulation, the modulation is applied continuously in response to
the analog information signal. Common analog modulation techniques are:
Angular modulation
Phase modulation (PM)
Frequency modulation (FM)
Amplitude modulation (AM)
Double-sideband modulation (DSB)
Double-sideband modulation with unsuppressed carrier (DSB-WC)
Double-sideband suppressed-carrier transmission (DSB-SC)
Double-sideband reduced carrier transmission (DSB-RC)
Single-sideband modulation (SSB)
1.4 Digital Modulation Methods
In digital modulation, an analog carrier signal is modulated by a digital bit
stream. Digital modulation methods can be considered as digital-to-analog
conversion, and the corresponding demodulation or detection as analog-to-digital
conversion. The changes in the carrier signal are chosen from a finite number of
alternative symbols. There are four types of basic digital modulation schemes. These
are:
Amplitude-Shift Keying (ASK)
Frequency-Shift Keying (FSK)
Phase-Shift Keying (PSK)
Quadrature amplitude modulation (QAM)
The most common digital modulation techniques are:
 Phase-shift keying (PSK)
 Frequency-shift keying (FSK) (see also audio frequency-shift keying)
 Amplitude-shift keying (ASK) and its most common form, (OOK)
 Quadrature amplitude modulation(QAM) a combination of PSK and
Polar modulation like QAM a combination of PSK and ASK
 Continuous phase modulation (CPM) Minimum-shift keying (MSK)
 Gaussian minimum-shift keying (GMSK)
 Orthogonal Frequency division multiplexing (OFDM) modulation.
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8. 2.0 ANALYSIS OF QUADRATURE PHASE SHIFT KEYING
(QPSK)
2.1 Phase-Shift Keying
Phase-shift keying or PSK is a digital modulation scheme that conveys data by
changing, or modulating, the phase of a reference signal or the carrier wave .
Every digital modulation scheme uses a finite number of distinct signals to
represent digital data. PSK uses a finite number of phases; each assigned a unique
pattern of binary digits. Usually, each phase encodes an equal number of bits. Each
pattern of bits forms the symbol that is represented by the particular phase. The
demodulator is designed specifically for the symbol-set used by the modulator and it
determines the phase of the received signal and maps it back to the symbol it
represents. Thus it recovers the original data. This requires the receiver to be able to
compare the phase of the received signal to a reference signal.
Alternatively, instead of using the bit patterns to set the phase of the wave, it can
instead be used to change it by a specified amount. The demodulator then determines
the changes in the phase of the received signal rather than the phase itself. Since this
scheme depends on the difference between successive phases, it is termed differential
phase-shift keying (DPSK). DPSK can be significantly simpler to implement than
ordinary PSK since there is no need for the demodulator to have a copy of the
reference signal to determine the exact phase of the received signal. In exchange, it
produces more erroneous demodulations. The exact requirements of the particular
scenario under consideration determine which scheme is used.
In PSK, the constellation points chosen are usually positioned with uniform
angular spacing around a circle. This gives maximum phase-separation between
adjacent points and thus the best immunity to corruption. They are positioned on a
circle so that they can all be transmitted with the same energy. In this way, the module
of the complex numbers they represent will be the same and thus so will the
amplitudes needed for the cosine and sine waves. Two common examples are Binary
Phase-Shift Keying (BPSK) which uses two phases, and Quadrature Phase-Shift
Keying (QPSK) which uses four phases, although any number of phases may be used.
Since the data to be conveyed are usually binary, the PSK scheme is usually designed
with the number of constellation points being a power of 2 i.e. 4, 8 or 16.
2.2 QPSK Modulation
Since the early days of electronics, as advances in technology were taking
place, the boundaries of both local and global communication began eroding,
resulting in a world that is smaller and hence more easily accessible for the sharing of
knowledge and information. The pioneering work by Bell and Marconi formed the
cornerstone of the information age exists today and paved the way for the future of
telecommunications.
Traditionally, local communications was done over wires, as this presented a cost-
effective way of ensuring a reliable transfer of information. For long-distance
communications, transmission of information over radio waves was needed. Although
this was convenient from a hardware standpoint, radio-waves transmission raised
doubts over the corruption of the information and was often dependent on high-power
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9. transmitters to overcome weather conditions, large buildings, and interference from
other source of electromagnetic.
Quadrature phase-shift keying (QPSK)
Figure : Constellation diagram for QPSK with Gray coding. Each adjacent symbol
only differs by one bit.
Digital information travels on analog carrier
 Quadrature Phase-Shift Keying (QPSK) is effectively two independent
BPSK systems (I-In phase and Q-Out of phase) and therefore exhibits the
same performance but twice the bandwidth efficiency.
 Sometimes this is known as quaternary PSK, quadriphase PSK, 4-PSK, or 4-
QAM (although the root concepts of QPSK and QAM are different, the
resulting modulated radio wave are exactly the same.)
 QPSK uses four points on the constellation diagram, equispaced around a
circle.
 With 4 phases, QPSK can encode two bits per symbol to minimize the BER –
sometimes misperceived as twice the BER of BPSK.
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10. 3.0 BLOCK DIAGRAM OF DIGITALLY IMPLEMNTED
QPSK MDULATOR
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11. 3.1 LVDS DATA WITH LINE RECEIVER
LVDS is the abbreviation of Low Voltage Differential Signaling. It is an electrically
digital signaling standard that can run at very high speed over inexpensive twisted
pair copper cables. It specifies the electrical level in detail. Here, differential signaling
means , it transmits information as the difference between the voltages on a pair of
wires, two wire voltages are compared at line receiver. It is a dual wire system which
can running at 180°of each other. so noise to travel at the same level, which in turn
can get filtered more easily and effectively. In our project we use DS90C032 3V
LVDS Quad CMOS Differential Line receiver.
3.2 FPGA
This block is heart of QPSK modulator. In this approach all the main operations to
develop QPSK signal are perform by FPGA. Here our motive is to provide complete
digital system and miniaturization of circuit so this can be done using FPGA. Here we
provide only two Inputs, one is our information and second is the sample clock. We
get the Digital QPSK signal from the FPGA. The internal functions of FPGA is Data
scrambling, Differential coding, Convolution encoding, Carrier generation, mixing the
data with carriers and finally generate complete QPSK signal. In this project we
concentrate to use the ProASIC3E FPGA devices part no:A3PE600.
This FPGA is satisfy the criteria of our application. All the features of FPGA is
suitable to space requirements.
3.3 DAC(DIGITAL TO ANALOG CONVERTER)
As Block diagram, the output of FPGA is Digital QPSK signal. It means we get the
samples of QPSK signal. To construct analog signal from this we must use Digital to
analog converter. Here we use 10-bit current type DAC. In our project we use 10-bit,
170 MSPS, AD9731 DAC.
3.4 SMOOTHING FILTER
Digitally modulated QPSK samples out from DAC is a stair case type. There need to
be smoothened by a smoothing filter to have a analog look of the modulated signal.
The center frequency is 1.024 MHz with symbol rate 512 K bits/s, in order to preserve
the main lobe while smoothing. The cutoff frequency of the filter has to be taken care
of so that the main lobe is not affected but a smoothing do take place This filter is
design using AADE filter design V4.5 tool.
For our application we develop fifth order Butterworth low pass filter.
3.5 BIPOLAR CONVERTER
The DAC output is current type with an offset in the -ve direction because the DAC
output is ECL type. We know that PSK or QPSK is suppressed carrier modulated
system. Carrier suppression is possible only if there is no DC in the data, this requires
11

12. conversion of QPSK samples to be converted into bipolar type so that there is no
overall DC so bipolar converter circuit serve this purpose.
3.6 SUB CARRIER GENERATION USING FPGA
As per our main aim summation, orthogonal subcarrier generation and mixing of
subcarrier with data are all digitally implemented inside the FPGA. Here, LVDS data
is used and this data are given to he scrambler and than ½ rate FEC coder is used. All
this blocks are present inside the FPGA. For this blocks, the modules are develop in
very log language using Xilinx tool. The main part is generation of carriers means
sine and cosine signals. These signals are generated at 1.024 MHz. These signals are
generated inside the FPGA using the quantized value of samples of both signals.
There are several techniques to generate sine and cosine wave digitally. Its called
NCO (Numerically Controlled Oscillator). There are several techniques to implement
NCO
1. LUT Based NCO
2. CORDIC Based NCO
3. Xilinx ROM Based NCO
Among all these we implement LUT based NCO for our application. In this technique
a NCO consists of a lookup table made up of quantized sinusoidal sample
values(usually implemented as a read only memory, ROM), a binary counter for
addressing the ROM, and a clock signal to drive the counter as shown in below
figure.
Successive address locations in the ROM contain the successive quantized sample
values of the desired sinusoid signals. As the counter is clocked, each new count
addresses the next ROM location causing the appropriate digital number to appear at
the ROM output. The rate at which the counter is clocked is the sample rate of the
system. The number of bits in the ROM's output word determines the resolution of the
desired digital sinusoid. In our application we need 9 bit output from NCO then using
twos-complement representation would yield a numeric range of -361 to +361 for the
amplitude values of our quantized sampled sinusoid signals. Many variations on this
theme can be found in the literature. The main point is that a NCO serves as a means
for generating a digital sinusoid at a specific sample rate but with programmable
frequency. The frequency is restricted, however, to an integer multiple of the sample
rate divided by the ROM word length up to a maximum of ½ of the sample rate (the
Nyquist constraint). The larger the ROM length (address range), the finer the
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13. frequency resolution. The more bits in the ROM output word,the finer the amplitude
resolution.
4.0 SIMULATION RESULTS
4.1 SPECIFICATION
Modulation : QPSK
Carrier Frequency : 70 MHz
Data Rate : 512 Kbps
Symbol Rate : 256 Kbps
Sub carrier frequency : 1.024 MHz
Sub carrier quantization : 10 bits
Amplitude imbalance : 0.4 dB(max)
Phase imbalance : within 3°
Scrambler : CCITT V.35
Input signal Interface : LVDS
Phase Ambiguity Removal : By differential coding
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14. 4.2 FLOW DIAGRAM OF MATLAB SIMULATION
The flow diagram gives the steps to perform the simulation of digitally implemented
QPSK modulator in MATLAB.
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15. 4.3 MATLAB SIMULATION RESULTS
As per flow diagram COSINE and SINE carriers for I and Q data respectively are
generated. Here the sub carriers with frequency 1.024 MHz and 24 samples per cycle
are generated. There are 4 cycles per symbols are necessary to modulate incoming
data. These carriers are first multiplex with the I and Q data and than added together
in single FPGA. In following simulation results the subcarriers per symbol, the final
QPSK modulated signal and its frequency spectrum are given The subcarrier
generation per symbol is given in below figure:.
fig: Subcarrier generation of carrier per symbol
Now, This carrier is ready to modulate. The data 1100' is given for modulation. This
data is first converted into parallel form and individual data is multiply with either
cosine or sine carrier like BPSK. After that these individual modulated data is added
together and QPSK modulated signal is generated The simulation result for time
domain representation of QPSK signal is given in below figure:
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16. Frequency Domain Representation for QPSK signal is:
fig: Frequency domain representation of QPSK signal
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17. 5.0 HARDWARE REALIZATION
In hardware realization we use Actel kit with ProASIC3000 FPGA. In this kit we load
our program which is written in verilog. The Actel Kit is shown below:
Figure:7 Actel ProASIC 3000 kit
The output of kit is shown in logic analyzer. Here in Actel kit Scrambler, Differential
encoder,Convolutional coder and subcarrier generator are implemented. The setup of
this implementation withresults are shown below. And as per output which is shown
in figure there is no phase and amplitude imbalance between sin and cosine
subcarriers.
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18. Figure:8 Set up of digitally implemented QPSK modulator
6.0 ACKNOWLEDGEMENT
The work presented here is carried out at Space Application Center(SAC),ISRO,
Ahmadabad. I am highly indebted to my guide Mr. Kishorilal Sah, SCI/ENGR of
OSPD, SAC, Ahmadabad for assigning me this project, for timely guidance. I would
like to express my gratitude towards the Head of the Department Mr.T.V.S.Ram,
SCI/ENGR, SG, Head of OSPD, SAC, Ahmadabad for his kind encouragement and
cooperation and for his moral Support. My thanks and appreciations also go to the
people of my Division OSPD at SAC who have willingly helped me out with their
abilities.
7.0 CONCLUSION
Here, we design digitally QPSK modulator. In this modulator , analog components
like local oscillator and mixer are completely eliminated which are frequency and
temperature sensitive. Here all the functions are performed by single FPGA. So the
limitations of modulator are completely removed for satellite communication. For the
satellite communication PCB size is also important parameter and using this new
approach number of component count is less and ultimately size of PCB is become
small.
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19. 8.0 REFRENCES
1. Asif Iqbal Ahmed,Sayed Hafizur Rahman and Otmane Ait Mohamed, FPGA
Implementation and Performance Evaluation of a Digital Carrier Synchronizer
using Different Numerically Controlled Oscillators, IEEE,2007.
2. Di Xie,Shulin Tian,Ke Liu,Design and implementation of DDS based Digital
Amplitude Modulation,IEEE,2009.
3. Teena Sakla,Divya Jain,Sandhya Gautam, IMPLEMENTATION OF DIGITAL
QPSK MODULATOR BY USING VHDL /MATLAB.International Journal of
Engineering Science and Technology,Vol. 2(9), 2010.
4. Ken Gentile, Fundamentals of Digital Quadrature Modulation,
www.rfdesign.com, 2003.
5. Xilinx logicore, Sine/Cosine Look-Up Table v5.0,Product specification,
DS275 April 28, 2005.
6. IP Data Sheet of Block Convolutional Encoder, September 2004.
7. Data Sheet of DS26F32MQML Quad Differential Line Receivers ,March 2006.
8. Data Sheet of AD9731 10-Bit, 170 MSPS, DAC.
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20. 9. Data Sheet of ProASIC3E Flash Family FPGAs with Optional Soft ARM
Support, Actel v1.0.
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