This document provides instructions for using Quartus II software to compile and download a design file onto an Altera FPGA device. It outlines the steps to create a project, add the design file, select a target device, compile the design, assign pins, and program the FPGA with the compiled design. The steps are: 1) create a project directory and add the design file; 2) select the target FPGA device; 3) compile the design; 4) assign pins; and 5) program the FPGA.

1. Quartus II Introduction
➢ Create a Project
➢ Compile your Design
➢ Down Load your Design

2. Create a Project
Create working director for Qurtus
●
Copy your logic_block.v to the directory
●
Create a project using the New Project
●
Wizard
Name the project
●
Add design files
●
Pick a device
●

3. Start Quartus II 6.1 WebEdition

4. File > New Project Wizard

5. working directory for
Project
this project
Name of this Project
Top level design
Entity

6. Add file
Select logic_block.v
> Add
> Next

7. Select Device
Select MAX II as the Family.
set Package to TQFP,
Pin count to 144
Speed grade to 5.
Select the EPM1270T144C5
Click Next.

8. EDA Setting

9. Project Summary
The summary screen
Finish.
完成新增專案

10. Open Your Design File
Project Navigator
File
(OR
FILE > OPEN)
Double click

11. Pin Assign: Assignments > Pins
Enter 22, 21,
16, 1

12. Unused Pins:
Assignment > Device >
Device & Pins Options > Unused Pins >
All input tri-stated

13. Compile:
Processing > Start Compiliation

14. Assignments > Pins

15. Programmer Setup
• Tools > programmer, (Add File > logic_block.pof
• Hardware Setup > Add Hardware > ByteBlaster(LPT1)

16. Programm and Verify
> Start
LAB