The attached narrated power point presentation reviews the construction, working and timing diagrams of ring and johnson counters as well as asynchronous and synchronous up, down, up/down and decade counters using popular flipflop ICs. The material will be useful for KTU B Tech second year students who prepare for the subject CSL 202, Digital Laboratory.

1. 1
CSL 202, Counters Using
Flipflops
MEC

2. 2
Contents
• Counters using Flipflop ICs.
• Ring and Johnson Counters.
• Asynchronous Counters.
• Synchronous Counters.
• UP/Down Counters.
• Decade Counters.
• Timing Diagrams.
• Counter Applications.

3. 3
Counters using Flipflops
• Use of D flipflops or JK flipflops in T flipflop
configuration.
• Each flipflop divides input frequency by
two – frequency divider.
• Counters can be binary or biquinary.
• Binary Counters – straight sequence.
• Biquinary Counters – skip interim states.
• Counters can be synchronous (clock
driven) or asynchronous (ripple counter).

4. 4
T Flipflops

5. 5
Asynchronous Counters
• Also called ripple counters.
• Clock trigger to toggle LSB.
• Output of one flipflop to serve as clock for
succeeding flipflop.
• Number of flipflops depend on maximum
count and the total number of states of the
counter.
• Maximum number of states = 2N, N –
number of flipflops.

6. 6
Synchronous Counter
• All flipflops clocked from a single source.
• Clock common to all flipflops.
• Flipflops change states in synchronism
with the clock.
• Number of flipflops depend on the
maximum count and total number of states
of the counter.
• Maximum number of states = 2N, N –
number of flipflops.

7. 7
Ring Counter

8. 8
Johnson Counter
(Twisted Ring Counter)

9. 9
Mode Controlled Ring/Johnson
Counter

10. 10
4 bit Asynchronous Up Counter

11. 11

12. 12
4 bit Asynchronous Down Counter
FF0 FF1 FF2 FF3

13. 13
4 bit Asynchronous Down Counter

14. 14
3 bit Asynchronous Up/Down
Counter

15. 15
Asynchronous Decade Counter

16. 16
Asynchronous Decade Counter

17. 17
4 bit Synchronous Up Counter
FF0 FF1 FF2 FF3

18. 18
4 bit Synchronous Up Counter

19. 19
4 bit Synchronous Down Counter
FF0 FF1 FF2 FF3

20. 20
4 bit Synchronous Down Counter

21. 21
3 bit Synchronous Up/Down
Counter

22. 22

23. 23

24. 24

25. 25
Object Counter

26. 26
Object Counter

27. 27
Procedure
• Assemble the circuits on the breadboard
provided along with the trainer kit.
• Initial reset/clear and LSB preset for the
ring counter.
• Clock input to be applied from the clock
source provided in the trainer kit.
• Outputs to be observed using LEDs
provided in the trainer kit.
• Verify the state tables and draw timing
diagrams.

28. 28
Youtube Resources
• https://www.youtube.com/watch?v=KAPdy
K1LxHg
• https://www.youtube.com/watch?v=UHkR1
0Tvz5w
• https://www.youtube.com/watch?v=uUVj5j
CQMdc
• https://www.youtube.com/watch?v=Kk78Z
PskzTw
• https://www.youtube.com/watch?v=-
SFU5voStlw

29. 29
Youtube Resources
• https://www.youtube.com/watch?v=4PoFz
srA834
• https://www.youtube.com/watch?v=Qp2C-
3kw_xk
• https://www.youtube.com/watch?v=Qp2C-
3kw_xk
• https://www.youtube.com/watch?v=4PoFz
srA834

30. 30
Thank You