2. 01234567890@ABC@DEFG@95HInd
Ed.) Homework Solutions: 9/21/2002 2
Problem 3.1-3
In Table 3.1-2, why is γP greater than γN for a n-well, CMOS technology?
The expression for γ is:
γ =
2εsi q NSUB
Cox
Because γ is a function of substrate doping, a higher doping results in a larger value for γ.
In general, for an nwell process, the well has a greater doping concentration than the
substrate and therefore devices in the well will have a larger γ.
Problem 3.1-4
A large-signal model for the MOSFET which features symmetry for the drain and source
is given as
iD = K'
W
L !
#
$
%
[(vGS − VTS)2 u(vGS − VTS)] − [(vGD − VTD)2 u(vGD − VTD)]
where u(x) is 1 if x is greater than or equal to zero and 0 if x is less than zero (step
function) and VTX is the threshold voltage evaluated from the gate to X where X is either S
(Source) or D (Drain). Sketch this model in the form of iD versus vDS for a constant value
of vGS (vGS VTS) and identify the saturated and nonsaturated regions. Be sure to extend
this sketch for both positive and negative values of vDS. Repeat the sketch of iD versus
vDS for a constant value of vGD (vGD VTD). Assume that both VTS and VTD are positive.
vGS
constant
vGD
constant vGD-VTD0
vGS-VTS0vGS-VTS0
vGD-VTD0
K'(W/L)(vGS-VTS)2
-K'(W/L)(vGD-VTD)2
3. 01234567890@ABC@DEFG@95HInd
Ed.) Homework Solutions: 9/21/2002 2
Problem 3.1-3
In Table 3.1-2, why is γP greater than γN for a n-well, CMOS technology?
The expression for γ is:
γ =
2εsi q NSUB
Cox
Because γ is a function of substrate doping, a higher doping results in a larger value for γ.
In general, for an nwell process, the well has a greater doping concentration than the
substrate and therefore devices in the well will have a larger γ.
Problem 3.1-4
A large-signal model for the MOSFET which features symmetry for the drain and source
is given as
iD = K'
W
L !
#
$
%
[(vGS − VTS)2 u(vGS − VTS)] − [(vGD − VTD)2 u(vGD − VTD)]
where u(x) is 1 if x is greater than or equal to zero and 0 if x is less than zero (step
function) and VTX is the threshold voltage evaluated from the gate to X where X is either S
(Source) or D (Drain). Sketch this model in the form of iD versus vDS for a constant value
of vGS (vGS VTS) and identify the saturated and nonsaturated regions. Be sure to extend
this sketch for both positive and negative values of vDS. Repeat the sketch of iD versus
vDS for a constant value of vGD (vGD VTD). Assume that both VTS and VTD are positive.
vGS
constant
vGD
constant vGD-VTD0
vGS-VTS0vGS-VTS0
vGD-VTD0
K'(W/L)(vGS-VTS)2
-K'(W/L)(vGD-VTD)2
4. qrstuvwxyq‚ƒ„…‚†‡ˆ‰‚v‘nd
Ed.) Homework Solutions: 9/21/2002 4
iD = K'
W
2L (vGS − VT)2
'
)
*
,1 + λ (vDS − vDS(sat)) , 0 (vGS − VT) ≤ vDS
When vDS = vDS(sat) , this expression agrees with the non-saturation equation at the
point of transition into saturation. Beyond saturation, channel-length modulation is
applied to the difference in vDS and vDS(sat) .
Problem 3.2-1
Using the values of Tables 3.1-1 and 3.2-1, calculate the values of CGB, CGS, and CGD
for a MOS device which has a W of 5 µm and an L of 1 µm for all three regions of
operation.
We will need LD in these calculations. LD can be approximated from the value given for
CGSO in Table 3.2-1.
LD =
220 × 10-12
24.7 × 10-4 ≅ 89 × 10-9
Off
CGB = C2 + 2C5 = Cox(Weff)(Leff) + 2CGBO(Leff)
Weff = 5 µm
Leff = 1 µm - 2×89 nm = 822 × 10-9
CGB = 24.7 × 10-4 × (5× 10-6)( 822 × 10-9) + 2×700 × 10-12×822 × 10-9
CGB = 11.3 × 10-15 F
CGS = C1 ≅ Cox(LD)(Weff) = CGSO(Weff)
CGS = ( 220 × 10-12) ( 5 × 10-6) = 1.1 × 10-15
CGD = C2 ≅ Cox(LD)(Weff) = CGDO(Weff)
CGD = ( 220 × 10-12) ( 5 × 10-6)= 1.1 × 10-15
Saturation
CGB = 2C5 = CGBO (Leff)
5. ’“”•–—˜™de’fghifjklmfe—nond
Ed.) Homework Solutions: 9/21/2002 5
CGB = 700 × 10-12 (822 × 10-9) = 575 × 10-18
CGS = CGSO(Weff) + 0.67Cox(Weff)(Leff)
CGS = 220 × 10-12 × 5 × 10-6 + 0.67 × 24.7 × 10-4 × 822 × 10-9 × 5 × 10-6
CGS = 7.868 × 10-15
CGD = C3 ≅ Cox(LD)(Weff) = CGDO(Weff)
CGD = CGDO(Weff) = 220 × 10-12 × 5 × 10-6 = 1.1 × 10-15
Nonsaturated
CGB = 2C5 = CGBO (Leff)
CGB = CGBO (Leff) = 700 × 10-12 × 822 × 10-9 = 574 × 10-18
CGS = (CGSO + 0.5CoxLeff)Weff
CGS = (220 × 10-12 + 0.5 × 24.7 × 10-4 × 822 × 10-9) × 5 × 10-6 = 6.18 × 10-15
CGD = (CGDO + 0.5CoxLeff)Weff
CGD = (220 × 10-12 + 0.5 × 24.7 × 10-4 × 822 × 10-9) × 5 × 10-6 = 6.18 × 10-15
Problem 3.2-2
Find CBX at VBX = 0 V and 0.75 V of Fig. P3.7 assuming the values of Table 3.2-1 apply
to the MOS device where FC = 0.5 and PB = 1 V. Assume the device is n-channel and
repeat for a p-channel device.
Change problem to read: “|VBX |==== 0 V and 0.75 V (with the junction always reverse
biased)…”
pqrµm
Figure P3.2-2
2.0µm
Polysilicon
Metal
Active Area
sqtµm
7. ‰Š‹ŒŽ‘’‰“”•–“—˜™š“’Ž›œnd
Ed.) Homework Solutions: 9/21/2002 7
Problem 3.2-3
Calculate the value of CGB, CGS, and CGD for an n-channel device with a length of 1 µm
and a width of 5 µm. Assume VD = 2 V, VG = 2.4 V, and VS = 0.5 V and let VB = 0 V.
Use model parameters from Tables 3.1-1, 3.1-2, and 3.2-1.
LD =
220 × 10-12
24.7 × 10-4 ≅ 89 × 10-9
Leff = L - 2 × LD = 1 × 10-6 − 2 × 89 × 10-9 = 822 × 10-9
VT = VT0 + γ [ ]2|φF| + vSB − 2|φF|
VT = 0.7 + 0.4 [ ]0.7 + 0.5 − 0.7 = 0.803
vGS − vT =2.4 − 0.5 − 0.803 = 1.096 vDS thus saturation region
CGB = CGBO x Leff = 700 × 10-12 × 822 × 10-9 = 0.575 fF
CGS = CGSO(Weff) + 0.67Cox(Weff)(Leff)
CGS = 220 × 10-12 × 5 × 10-6 + 0.67 × 24.7 × 10-4 × 822 × 10-9 × 5 × 10-6
CGS = 7.868 × 10-15
CGD = C3 ≅ Cox(LD)(Weff) = CGDO(Weff)
CGD = CGDO(Weff) = 220 × 10-12 × 5 × 10-6 = 1.1 × 10-15
Problem 3.3-1
Calculate the transfer function vout(s)/vin(s) for the circuit shown in Fig. P3.3-1. The
W/L of M1 is 2µm/0.8µm and the W/L of M2 is 4µm/4µm. Note that this is a small-
signal analysis and the input voltage has a dc value of 2 volts.
9. ¾¿ÀÁÂÃÄÅÆǾÈÉÊËÈÌÍÎÏÈÇÃÐÑnd
Ed.) Homework Solutions: 9/21/2002 9
RM1 = 1.837 kΩ
CM2 =
1
2π ×1.837× 103×1 × 105 = 866.4 pF
Choose W = L
CM2 = WM2 × LM2 × Cox = W
2
M2 × 24.7 × 10-4 = 866.4 × 10-12
W
2
M2 = 350.8 × 10-9
WM2 = 592 × 10-6
Problem 3.3-3
Repeat Examples 3.3-1 and 3.3-2 if the W/L ratio is 100 µm/10 µm.
Problem correction: Assume λλλλ = 0.01.
Repeat of Example 3.3-1
N-Channel Device
gm = (2K'W/L)|ID|
gm = 2×110 × 10-6 ×10 × 50 × 10-6 = 332 × 10-6
gmbs = gm
γ
2(2|φF| + VSB)1/2
gmbs = 332 × 10-6 0.4
2(0.7+2.0)1/2 = 40.4 × 10-6
gds = ID λ
gds = 50 × 10-6 × 0.01 = 500 × 10-9
P-Channel Device
gm = (2K'W/L)|ID|
10. PQRSTUVWXYP`abc`defh`YUipnd
Ed.) Homework Solutions: 9/21/2002 3
Problem 3.1-5
Equation (3.1-12) and Eq. (3.1-18) describe the MOS model in nonsaturation and
saturation region, respectively. These equations do not agree at the point of transition
between saturation and nonsaturation regions. For hand calculations, this is not an issue,
but for computer analysis, it is. How would you change Eq. (3.1-18) so that it would
agree with Eq. (3.1-12) at vDS = vDS (sat)?
iD = K'
W
L '
(
)
*
+
,
(vGS − VT) −
vDS
2
vDS (3.1-12)
iD = K'
W
2L
(vGS − VT)2
(1 + λvDS), 0 (vGS − VT) ≤ vDS (3.1-18)
What happens to Eq. 3.1-12 at the point where saturation occurs?
iD = K'
W
L '
(
)
*
+
,
(vGS − VT) −
vDS (sat)
2 vDS(sat)
vDS (sat)= vGS − VT
then
iD = K'
W
L '
(
(
)
*
+
+
,
(vGS − VT) vDS(sat) −
v
2
DS
(sat)
2
iD = K'
W
L '
(
)
*
+
,
(vGS − VT) (vGS − VT) −
(vGS − VT)2
2
iD = K'
W
L '
(
)
*
+
,
( vGS − VT) 2 −
(vGS − VT)2
2
= K'
W
L '
(
)
*
+
,(vGS − VT)2
2
iD = K'
W
L '
(
)
*
+
,(vGS − VT)2
2
which is not equal to Eq.(3.1-18) because of the channel-length modulation term.
Since Eq. (3.1-18) is valid only during saturation when vDS vDS(sat) we can subtract
vDS(sat) from the vDS in the channel-length modulation term. Doing this results in the
following modification of Eq. (3.1-18).
13. ! #$%#' ()0# 12
nd
Ed.) Homework Solutions: 9/21/2002 13
Figure P3.3-6
M1
M2
Mn
Assume that all devices are in the non-saturation region.
Consider the case for two transistors in series as illustrated below.
M1
M2
v1
v2
vG
w3
v2
vG
„45 6789@ AB775@C 9@ DE 9F
i1 =
K'W
L '
(
(
)
*
+
+
,
(vGS − VT) vDS −
v
2
DS
2
i1 = β1 '
(
(
)
*
+
+
,
(vGS − VT) v1 −
v
2
1
2 = β1 '
(
(
)
*
+
+
,
(vG − VT) v1 −
v
2
1
2
i1 = β1 '
(
(
)
*
+
+
,
Von v1 −
v
2
1
2
where
14. GHIP QRSTUV GWXY`Wa bcdWVR ef
nd
Ed.) Homework Solutions: 9/21/2002 14
Von = vG − VT
v1 = Von − V
2
on
−
2i1
β1
v
2
1 = 2Von − 2Von V
2
on
−
2i1
β1
−
2i1
β1
The drain current in M2 is
i2 = β2 '
(
)
*
+
,
(vG − v1 − VT)( v2 − v1) −
( v2 − v1)
2
2
i2 = β2 '
(
)
*
+
,
( Von − v1)( v2 − v1) −
( v2 − v1)
2
2
i2 = β2 '
(
(
)
*
+
+
,
Von v2 − Vonv1 +
v
2
1
2 −
v
2
2
2
Substitue the earlier expression for v1 and equate the drain currents (drain currents must
be equal)
i2 =
β1 β2
β1 + β2 '
(
(
)
*
+
+
,
Von v2 −
v
2
2
2
The expression for the current in M3 is
i3 = β3 '
(
(
)
*
+
+
,
(vGS − VT) v2 −
v
2
2
2
= β3 '
(
(
)
*
+
+
,
Von v2 −
v
2
2
2
The drain current in M3 must be equivalent to the drain current in M1 and M2, thus
β3 =
β1 β2
β1 + β2
=
-
.
/
0
1
21
β1
+
1
β2
-1
=
-
.
/
0
1
2L1
K'W1
+
L2
K'W2
-1
15. qrstuvwxyq‚ƒ„…‚†‡ˆ‰‚v‘nd
Ed.) Homework Solutions: 9/21/2002 4
iD = K'
W
2L (vGS − VT)2
'
)
*
,1 + λ (vDS − vDS(sat)) , 0 (vGS − VT) ≤ vDS
When vDS = vDS(sat) , this expression agrees with the non-saturation equation at the
point of transition into saturation. Beyond saturation, channel-length modulation is
applied to the difference in vDS and vDS(sat) .
Problem 3.2-1
Using the values of Tables 3.1-1 and 3.2-1, calculate the values of CGB, CGS, and CGD
for a MOS device which has a W of 5 µm and an L of 1 µm for all three regions of
operation.
We will need LD in these calculations. LD can be approximated from the value given for
CGSO in Table 3.2-1.
LD =
220 × 10-12
24.7 × 10-4 ≅ 89 × 10-9
Off
CGB = C2 + 2C5 = Cox(Weff)(Leff) + 2CGBO(Leff)
Weff = 5 µm
Leff = 1 µm - 2×89 nm = 822 × 10-9
CGB = 24.7 × 10-4 × (5× 10-6)( 822 × 10-9) + 2×700 × 10-12×822 × 10-9
CGB = 11.3 × 10-15 F
CGS = C1 ≅ Cox(LD)(Weff) = CGSO(Weff)
CGS = ( 220 × 10-12) ( 5 × 10-6) = 1.1 × 10-15
CGD = C2 ≅ Cox(LD)(Weff) = CGDO(Weff)
CGD = ( 220 × 10-12) ( 5 × 10-6)= 1.1 × 10-15
Saturation
CGB = 2C5 = CGBO (Leff)
16. ‘’“ ”•–—˜™ defgdh ijkd™• lm
nd
Ed.) Homework Solutions: 9/21/2002 16
fast = 0.0259 (1 + .453 + 0.739) = 56.77 × 10-3
von = VT + fast =0.0259 + 56.77 × 10-3 = 82.67 × 10-3
Problem 3.5-2
Develop an expression for the small signal transconductance of a MOS device operating
in weak inversion using the large signal expression of Eq. (3.5-5).
iD ≅
W
L IDO exp
-
.
/
0
1
2vGS
n(kT/q)
gm =
∂ID
∂VGS
=
W
L -
.
/
0
1
21
n(kT/q) IDO exp
-
.
/
0
1
2vGS
n(kT/q) =
ID
n(kT/q)
Problem 3.5-3
Another way to approximate the transition from strong inversion to weak inversion is to
find the current at which the weak-inversion transconductance and the strong-inversion
transconductance are equal. Using this method and the approximation for drain current in
weak inversion (Eq. (3.5-5)), derive an expression for drain current at the transition
between strong and weak inversion.
gm =
W
L -
.
/
0
1
21
n(kT/q)
IDO exp
-
.
/
0
1
2vGS
n(kT/q) = (2K'W/L)ID
-
.
/
0
1
2W
L
2
-
.
/
0
1
21
n(kT/q)
2
I
2
DO
exp
-
.
/
0
1
22vGS
n(kT/q) = (2K'W/L)ID
ID =
-
.
/
0
1
21
2K' -
.
/
0
1
2W
L -
.
/
0
1
2IDO
n(kT/q)
2
exp
-
.
/
0
1
22vGS
n(kT/q)
ID =
-
.
/
0
1
21
2K' IDO -
.
/
0
1
21
n(kT/q)
2
exp
-
.
/
0
1
2vGS
n(kT/q)
×
-
.
/
0
1
2W
L IDO exp
-
.
/
0
1
2vGS
n(kT/q)
ID =
-
.
/
0
1
21
2K' IDO -
.
/
0
1
21
n(kT/q)
2
exp
-
.
/
0
1
2vGS
n(kT/q) × ID
2K' [n(kT/q)]
2
= IDO exp
-
.
/
0
1
2vGS
n(kT/q) =
ID
W/L
17. nopq rstuvw nxyz{x| }~xws €
nd
Ed.) Homework Solutions: 9/21/2002 17
ID = 2K'
W
L [n(kT/q)]
2
Problem 3.6-1
Consider the circuit illustrated in Fig. P3.6-1. (a) Write a SPICE netlist that describes
this circuit. (b) Repeat part (a) with M2 being 2µm/1µm and it is intended that M3 and
M2 are ratio matched, 1:2.
Part (a)
Problem 3.6-1 (a)
M1 2 1 0 0 nch W=1u L=1u
M2 2 3 4 4 pch w=1u L=1u
M3 3 3 4 4 pch w=1u L=1u
R1 3 0 50k
Vin 1 0 dc 1
Vdd 4 0 dc 5
.MODEL nch NMOS VTO=0.7 KP=110U GAMMA=0.4 LAMBDA=0.04 PHI=0.7
.MODEL pch PMOS VTO=-0.7 KP=50U GAMMA=0.57 LAMBDA=0.05 PHI=0.8
.op
.end
Part (b)
Problem 3.6-1 (b)
M1 2 1 0 0 nch W=1u L=1u
M2 2 3 4 4 pch w=1u L=1u M=2
M3 3 3 4 4 pch w=1u L=1u
R1 3 0 50k
Vin 1 0 dc 1
Vdd 4 0 dc 5
.MODEL nch NMOS VTO=0.7 KP=110U GAMMA=0.4 LAMBDA=0.04 PHI=0.7
.MODEL pch PMOS VTO=-0.7 KP=50U GAMMA=0.57 LAMBDA=0.05 PHI=0.8
.op
.end
Problem 3.6-2
Use SPICE to perform the following analyses on the circuit shown in Fig. P3.6-1: (a) Plot
vOUT versus vIN for the nominal parameter set shown. (b) Separately, vary K' and VT by
+10% and repeat part (a)—four simulations.
Parameter N-Channel P-Channel Units
VT 0.7 -0.7 V
K' 110 50 µA/V2
l 0.04 0.05 V-1