This document discusses the implementation of digital filters in fixed-point arithmetic on embedded systems. It presents the need for methodology and tools to design fixed-point embedded filter systems. The key steps are: 1) choosing a filter algorithm, 2) rounding coefficients to fixed-point, and 3) implementing the algorithm. Optimal implementations minimize degradation from quantization errors while meeting resource constraints. The document outlines a global flow from filter design to code generation and optimization.
This document discusses formatting bits to better implement signal processing algorithms with integer arithmetic. It begins by introducing the context and objectives, which is to develop a methodology and tools to implement embedded filter algorithms using only integer arithmetic while controlling errors. It then discusses fixed-point arithmetic and how filters can be implemented using sum-of-products operations. The objective is given a bound on the final error, to find an implementation that reduces bit usage while controlling output error. The document proposes a two-step bit formatting method that first formats the most significant bits using Jackson's rule, then determines the minimum number of least significant bits that need to be kept to ensure faithful rounding of the final result.
This document provides an overview of various algorithms and data structures including recursive functions, graph representations, depth-first search (DFS), breadth-first search (BFS), all-pairs shortest paths algorithms like Floyd-Warshall, single-source shortest paths algorithms like Dijkstra's, trees, binary search trees (BST), min-max heaps, greedy algorithms, backtracking, and hashing/hash tables. It includes pseudocode and source code examples for many of these algorithms.
Designing Architecture-aware Library using Boost.ProtoJoel Falcou
This document discusses designing architecture-aware libraries using Boost.Proto. It describes how the NT2 scientific computing library was redesigned using Boost.Proto to make it more extensible and able to better support new hardware architectures. The redesign segmented the evaluation of expressions into phases. Boost.Proto transforms are used in each phase to advance code generation. Hardware specifications influence function overloads through generalized tag dispatching, allowing the best function implementation to be selected for a given hardware architecture. This makes it possible to more easily add support for new optimization schemes and hardware targets to the library.
20101017 program analysis_for_security_livshits_lecture02_compilersComputer Science Club
This document provides an introduction and overview of compiler optimization techniques, including:
1) Flow graphs, constant folding, global common subexpressions, induction variables, and reduction in strength.
2) Data-flow analysis basics like reaching definitions, gen/kill frameworks, and solving data-flow equations iteratively.
3) Pointer analysis using Andersen's formulation to model references between local variables and heap objects. Rules are provided to represent points-to relationships.
The document discusses code generation techniques in compiler construction. It describes generating executable code from source code by using intermediate representations like three-address code and P-code. It covers generating code from syntax trees, implementing intermediate codes using data structures, and translating between different intermediate representations and target machine code.
I am Blake H. I am a Software Construction Assignment Expert at programminghomeworkhelp.com. I hold a PhD. in Programming, Curtin University, Australia. I have been helping students with their homework for the past 10 years. I solve assignments related to Software Construction.
Visit programminghomeworkhelp.com or email support@programminghomeworkhelp.com. You can also call on +1 678 648 4277 for any assistance with Software Construction Assignments.
I am Christopher Hemmingway. I am a Computer Science Assignment Expert at programminghomeworkhelp.com. I hold a Master's in Computer Science, Princeton University, Princeton. I have been helping students with their homework for the past 10 years. I solve assignments related to Computer Science.
Visit programminghomeworkhelp.com or email support@programminghomeworkhelp.com.You can also call on +1 678 648 4277 for any assistance with Computer Science assignments.
The document is a sample paper for a Computer Science class test. It contains 7 questions covering various topics in C++ programming. Some key points:
- Question 1 covers output of code snippets, syntax errors, and pretty printing.
- Question 2 asks about programming methodology, documentation, and characteristics of good programs.
- Question 3 tests knowledge of header files, errors in code, and evaluating expressions.
- Question 4 includes topics like type casting, loop conversions, and output of a code fragment.
- Question 5 defines terms like tokens and variables and asks short questions on comparisons, arrays, and data types.
- Question 6 gives programming problems on matrices, structures, and finding diagonal sums.
-
This document discusses formatting bits to better implement signal processing algorithms with integer arithmetic. It begins by introducing the context and objectives, which is to develop a methodology and tools to implement embedded filter algorithms using only integer arithmetic while controlling errors. It then discusses fixed-point arithmetic and how filters can be implemented using sum-of-products operations. The objective is given a bound on the final error, to find an implementation that reduces bit usage while controlling output error. The document proposes a two-step bit formatting method that first formats the most significant bits using Jackson's rule, then determines the minimum number of least significant bits that need to be kept to ensure faithful rounding of the final result.
This document provides an overview of various algorithms and data structures including recursive functions, graph representations, depth-first search (DFS), breadth-first search (BFS), all-pairs shortest paths algorithms like Floyd-Warshall, single-source shortest paths algorithms like Dijkstra's, trees, binary search trees (BST), min-max heaps, greedy algorithms, backtracking, and hashing/hash tables. It includes pseudocode and source code examples for many of these algorithms.
Designing Architecture-aware Library using Boost.ProtoJoel Falcou
This document discusses designing architecture-aware libraries using Boost.Proto. It describes how the NT2 scientific computing library was redesigned using Boost.Proto to make it more extensible and able to better support new hardware architectures. The redesign segmented the evaluation of expressions into phases. Boost.Proto transforms are used in each phase to advance code generation. Hardware specifications influence function overloads through generalized tag dispatching, allowing the best function implementation to be selected for a given hardware architecture. This makes it possible to more easily add support for new optimization schemes and hardware targets to the library.
20101017 program analysis_for_security_livshits_lecture02_compilersComputer Science Club
This document provides an introduction and overview of compiler optimization techniques, including:
1) Flow graphs, constant folding, global common subexpressions, induction variables, and reduction in strength.
2) Data-flow analysis basics like reaching definitions, gen/kill frameworks, and solving data-flow equations iteratively.
3) Pointer analysis using Andersen's formulation to model references between local variables and heap objects. Rules are provided to represent points-to relationships.
The document discusses code generation techniques in compiler construction. It describes generating executable code from source code by using intermediate representations like three-address code and P-code. It covers generating code from syntax trees, implementing intermediate codes using data structures, and translating between different intermediate representations and target machine code.
I am Blake H. I am a Software Construction Assignment Expert at programminghomeworkhelp.com. I hold a PhD. in Programming, Curtin University, Australia. I have been helping students with their homework for the past 10 years. I solve assignments related to Software Construction.
Visit programminghomeworkhelp.com or email support@programminghomeworkhelp.com. You can also call on +1 678 648 4277 for any assistance with Software Construction Assignments.
I am Christopher Hemmingway. I am a Computer Science Assignment Expert at programminghomeworkhelp.com. I hold a Master's in Computer Science, Princeton University, Princeton. I have been helping students with their homework for the past 10 years. I solve assignments related to Computer Science.
Visit programminghomeworkhelp.com or email support@programminghomeworkhelp.com.You can also call on +1 678 648 4277 for any assistance with Computer Science assignments.
The document is a sample paper for a Computer Science class test. It contains 7 questions covering various topics in C++ programming. Some key points:
- Question 1 covers output of code snippets, syntax errors, and pretty printing.
- Question 2 asks about programming methodology, documentation, and characteristics of good programs.
- Question 3 tests knowledge of header files, errors in code, and evaluating expressions.
- Question 4 includes topics like type casting, loop conversions, and output of a code fragment.
- Question 5 defines terms like tokens and variables and asks short questions on comparisons, arrays, and data types.
- Question 6 gives programming problems on matrices, structures, and finding diagonal sums.
-
This document contains questions related to management and entrepreneurship. It begins with questions about planning functions, strategic and tactical planning, and types of decisions. It then covers questions about organization structure, communication, control systems, and motivation theories. The second part includes questions about entrepreneurs, their characteristics and role in economic development. It also discusses barriers to entrepreneurship, small scale industries, and government support programs. The last section focuses on project contents, feasibility studies, and project appraisal steps.
The document describes code generation for two commercial compilers:
1) The Borland C 3.0 compiler for the 80X86 generates assembly code using static simulation and frame pointers for function calls and local variable access.
2) The Sun 2.0 compiler for SPARCstations uses register-based calling conventions and generates efficient SPARC assembly code.
Both compilers handle code generation for arithmetic expressions, arrays, structures, pointers, control flow, and function calls.
This presentation is part of training session delivered during Train The Trainer (TOT) program on Embedded Software Engineer job role supported by ESSCI.
Detecting Bugs in Binaries Using Decompilation and Data Flow AnalysisSilvio Cesare
The document discusses using static analysis techniques like data flow analysis and decompilation to detect bugs in binary files. It describes decompiling binaries into an intermediate representation and then performing intraprocedural and interprocedural data flow analysis on the representation. This allows detecting bugs involving unsafe functions like getenv() and memory issues like use-after-free and double free errors. The approach involves lifting x86 into a RISC-like intermediate language, inferring stack pointers, and decompiling locals and arguments to perform analysis and optimization.
Rejuvenate Pointcut: A Tool for Pointcut Expression Recovery in Evolving Aspe...Raffi Khatchadourian
Invited tool demonstration at the 8th International Conference on Aspect-Oriented Software Development (AOSD '09), Charlottesville, VA, USA, March 2-6, 2009.
This presentation is part of training session delivered during Train The Trainer (TOT) program on Embedded Software Engineer job role supported by ESSCI.
This document provides explanations for 33 coding questions related to C programming. It includes sample code snippets and predicted outputs or errors for each question. Key points covered include pointers, arrays, structures, operators, macros, enums, scope of labels, and more. The goal is to help readers predict program behavior and understand C programming concepts.
The document contains 18 coding questions related to C programming. For each question, the expected output or error is provided along with an explanation of the logic and concepts tested in the question. The questions cover topics like pointers, arrays, structures, operators, typecasting and more.
This document contains questions for an examination in Information Theory and Coding. It has two parts, with multiple choice and long answer questions. Part A focuses on information theory concepts like entropy, mutual information, and channel capacity. Questions ask students to calculate entropy and capacity for given sources and channels. Part B covers error control coding techniques, including linear block codes, cyclic codes, and convolutional codes. Questions require encoding and decoding binary codes, finding generator polynomials, and describing different coding schemes.
This document provides information about a GATE CS mock exam from 1999, including sample questions from sections A and B. It advertises a test preparation series offered by GATE Forum, providing full practice exams designed by IISc alumni. The questions cover topics like probability, algorithms, automata, databases, operating systems, and computer architecture. It encourages readers to join online discussion forums to review exam papers with other students preparing for GATE CS.
The document describes several Adobe interview test papers that the author took. It provides examples of questions asked in sections on coding (C/Java), data structures, algorithms, quantitative aptitude, and logical reasoning. Some example questions include finding the fourth smallest element in a binary search tree, reversing a linked list, checking if all computers are connected in a network, and problems involving arithmetic, triangles, and pie charts. The tests focused on fundamental concepts in coding, data structures, algorithms, and math.
FPGA Implementation of A New Chien Search Block for Reed-Solomon Codes RS (25...IJERA Editor
The Reed-Solomon codes RS are widely used in communication systems, in particular forming part of the specification for the ETSI digital terrestrial television standard. In this paper a simple algorithm for error detection in the Chien Search block is proposed. This algorithm is based on a simple factorization of the error locator polynomial, which allows reducing the number of components required to implement the proposed algorithm on FPGA board. Consequently, it reduces the power consumption with a percentage which can reach 50 % compared to the basic RS decoder. First, we developed the design of Chien Search Block Second, we generated and simulated the hardware description language source code using Quartus software tools,finally we implemented the proposed algorithm of Chien search block for Reed-Solomon codesRS (255, 239) on FPGA board to show both the reduced hardware resources and low complexity compared to the basic algorithm.
Automatic Task-based Code Generation for High Performance DSELJoel Falcou
Providing high level tools for parallel programming while sustaining a high level of performance has been a challenge that techniques like Domain Specific Embedded Languages try to solve. In previous works, we investigated the design of such a DSEL – NT2 – providing a Matlab -like syntax for parallel numerical computations inside a C++ library.
Main issues addressed here is how liimtaions of classical DSEL generation and multithreaded code generation can be overcome.
The Goal and The Journey - Turning back on one year of C++14 MigrationJoel Falcou
C++14 has been announced as the next best thing since sliced bread in terms of simplicity, performance and overall elegance of c++ code. This talk is the story of why and how we decided to migrate one of our old 'modern C++' software library -- BSP++, a C++ implementation of the BSP parallel programming model -- to C++14.
More than just a recollection of 'use this' or 'do that' mottos, this talk will try to ponder on :
why one should consider migrating to C++14 now
which features actually helped and which one did not
the traps and pitfalls compilers tried to pull on us
Random numo Galois Field
Polynomial Arithmetic
Example of Polynomial Arithmetic
bers, its types and usage.
TRNG, PRNG, CHPRNG
Review of BBS
Stream Ciphering
RC4 algorithm
Basic Number Theory
Extended Euclidean Algorithm
Relevance of Extended Euclidean Algorithm
This document contains a 25 question multiple choice quiz about computer science topics. The questions cover topics like Boolean algebra, graphs, probability, algorithms, automata theory, programming languages, operating systems, computer networks, databases and software engineering. For each question there are 4 possible answer choices, with one being marked as the correct answer. Explanations are provided for some of the questions.
The document contains 15 questions from previous year CBSE and other board exam papers related to C++ programming. Each question provides code snippets and asks to determine possible outputs, values of variables, minimum and maximum values etc. For each question, the correct answer is provided along with justification in 1-2 sentences where needed. The questions are testing concepts like random numbers, loops, arrays, functions etc. and ability to read code and analyze output.
1. Classes allow the creation of user-defined data types through the grouping of related data members and member functions.
2. Class members can be declared as private, public or protected and determine accessibility outside the class.
3. Methods are defined similarly to regular functions but can access any member of the class without passing them as parameters.
The document discusses intermediate code generation in compiler design. It introduces intermediate code, features like retargeting and optimization. It describes three address code statements like a = b op c and quadruples which consist of four fields - op, arg1, arg2, and result to represent instructions. The conclusion states that intermediate code acts as an interface between the front-end and back-end of a compiler.
This document presents the design and implementation of an FPGA-based BCH decoder. It discusses BCH codes, which are binary error-correcting codes used in wireless communications. The implemented decoder is for a (15, 5, 3) BCH code, meaning it can correct up to 3 errors in a block of 15 bits. The decoder uses a serial input/output architecture and is implemented using VHDL on a FPGA device. It performs BCH decoding through syndrome calculation, running the Berlekamp-Massey algorithm to solve the key equation, and using Chien search to find error locations. The simulation result verifies correct decoding operation.
This talk will shed some light into the intermediate language that is used inside the Hex-Rays Decompiler. The microcode is simple yet powerful to represent real world programs. We publish it and give programmatic access to it from C++.
The document summarizes the proposed design of a power efficient channelizer for software defined radio using VLSI. It discusses the basic architecture of the channelizer which uses a cascaded integrator-comb (CIC) filter block followed by an 8-point fast Fourier transform (FFT). The CIC filter block contains 5 stages of integrators and 5 stages of comb filters with 1 decimator, totaling 8 complete stages. Simulation results and synthesis results showing the internal blocks and 8-point FFT are also presented. The designed channelizer is concluded to have promising decreases in noise and be suitable for real-time software defined radio channels.
This document contains questions related to management and entrepreneurship. It begins with questions about planning functions, strategic and tactical planning, and types of decisions. It then covers questions about organization structure, communication, control systems, and motivation theories. The second part includes questions about entrepreneurs, their characteristics and role in economic development. It also discusses barriers to entrepreneurship, small scale industries, and government support programs. The last section focuses on project contents, feasibility studies, and project appraisal steps.
The document describes code generation for two commercial compilers:
1) The Borland C 3.0 compiler for the 80X86 generates assembly code using static simulation and frame pointers for function calls and local variable access.
2) The Sun 2.0 compiler for SPARCstations uses register-based calling conventions and generates efficient SPARC assembly code.
Both compilers handle code generation for arithmetic expressions, arrays, structures, pointers, control flow, and function calls.
This presentation is part of training session delivered during Train The Trainer (TOT) program on Embedded Software Engineer job role supported by ESSCI.
Detecting Bugs in Binaries Using Decompilation and Data Flow AnalysisSilvio Cesare
The document discusses using static analysis techniques like data flow analysis and decompilation to detect bugs in binary files. It describes decompiling binaries into an intermediate representation and then performing intraprocedural and interprocedural data flow analysis on the representation. This allows detecting bugs involving unsafe functions like getenv() and memory issues like use-after-free and double free errors. The approach involves lifting x86 into a RISC-like intermediate language, inferring stack pointers, and decompiling locals and arguments to perform analysis and optimization.
Rejuvenate Pointcut: A Tool for Pointcut Expression Recovery in Evolving Aspe...Raffi Khatchadourian
Invited tool demonstration at the 8th International Conference on Aspect-Oriented Software Development (AOSD '09), Charlottesville, VA, USA, March 2-6, 2009.
This presentation is part of training session delivered during Train The Trainer (TOT) program on Embedded Software Engineer job role supported by ESSCI.
This document provides explanations for 33 coding questions related to C programming. It includes sample code snippets and predicted outputs or errors for each question. Key points covered include pointers, arrays, structures, operators, macros, enums, scope of labels, and more. The goal is to help readers predict program behavior and understand C programming concepts.
The document contains 18 coding questions related to C programming. For each question, the expected output or error is provided along with an explanation of the logic and concepts tested in the question. The questions cover topics like pointers, arrays, structures, operators, typecasting and more.
This document contains questions for an examination in Information Theory and Coding. It has two parts, with multiple choice and long answer questions. Part A focuses on information theory concepts like entropy, mutual information, and channel capacity. Questions ask students to calculate entropy and capacity for given sources and channels. Part B covers error control coding techniques, including linear block codes, cyclic codes, and convolutional codes. Questions require encoding and decoding binary codes, finding generator polynomials, and describing different coding schemes.
This document provides information about a GATE CS mock exam from 1999, including sample questions from sections A and B. It advertises a test preparation series offered by GATE Forum, providing full practice exams designed by IISc alumni. The questions cover topics like probability, algorithms, automata, databases, operating systems, and computer architecture. It encourages readers to join online discussion forums to review exam papers with other students preparing for GATE CS.
The document describes several Adobe interview test papers that the author took. It provides examples of questions asked in sections on coding (C/Java), data structures, algorithms, quantitative aptitude, and logical reasoning. Some example questions include finding the fourth smallest element in a binary search tree, reversing a linked list, checking if all computers are connected in a network, and problems involving arithmetic, triangles, and pie charts. The tests focused on fundamental concepts in coding, data structures, algorithms, and math.
FPGA Implementation of A New Chien Search Block for Reed-Solomon Codes RS (25...IJERA Editor
The Reed-Solomon codes RS are widely used in communication systems, in particular forming part of the specification for the ETSI digital terrestrial television standard. In this paper a simple algorithm for error detection in the Chien Search block is proposed. This algorithm is based on a simple factorization of the error locator polynomial, which allows reducing the number of components required to implement the proposed algorithm on FPGA board. Consequently, it reduces the power consumption with a percentage which can reach 50 % compared to the basic RS decoder. First, we developed the design of Chien Search Block Second, we generated and simulated the hardware description language source code using Quartus software tools,finally we implemented the proposed algorithm of Chien search block for Reed-Solomon codesRS (255, 239) on FPGA board to show both the reduced hardware resources and low complexity compared to the basic algorithm.
Automatic Task-based Code Generation for High Performance DSELJoel Falcou
Providing high level tools for parallel programming while sustaining a high level of performance has been a challenge that techniques like Domain Specific Embedded Languages try to solve. In previous works, we investigated the design of such a DSEL – NT2 – providing a Matlab -like syntax for parallel numerical computations inside a C++ library.
Main issues addressed here is how liimtaions of classical DSEL generation and multithreaded code generation can be overcome.
The Goal and The Journey - Turning back on one year of C++14 MigrationJoel Falcou
C++14 has been announced as the next best thing since sliced bread in terms of simplicity, performance and overall elegance of c++ code. This talk is the story of why and how we decided to migrate one of our old 'modern C++' software library -- BSP++, a C++ implementation of the BSP parallel programming model -- to C++14.
More than just a recollection of 'use this' or 'do that' mottos, this talk will try to ponder on :
why one should consider migrating to C++14 now
which features actually helped and which one did not
the traps and pitfalls compilers tried to pull on us
Random numo Galois Field
Polynomial Arithmetic
Example of Polynomial Arithmetic
bers, its types and usage.
TRNG, PRNG, CHPRNG
Review of BBS
Stream Ciphering
RC4 algorithm
Basic Number Theory
Extended Euclidean Algorithm
Relevance of Extended Euclidean Algorithm
This document contains a 25 question multiple choice quiz about computer science topics. The questions cover topics like Boolean algebra, graphs, probability, algorithms, automata theory, programming languages, operating systems, computer networks, databases and software engineering. For each question there are 4 possible answer choices, with one being marked as the correct answer. Explanations are provided for some of the questions.
The document contains 15 questions from previous year CBSE and other board exam papers related to C++ programming. Each question provides code snippets and asks to determine possible outputs, values of variables, minimum and maximum values etc. For each question, the correct answer is provided along with justification in 1-2 sentences where needed. The questions are testing concepts like random numbers, loops, arrays, functions etc. and ability to read code and analyze output.
1. Classes allow the creation of user-defined data types through the grouping of related data members and member functions.
2. Class members can be declared as private, public or protected and determine accessibility outside the class.
3. Methods are defined similarly to regular functions but can access any member of the class without passing them as parameters.
The document discusses intermediate code generation in compiler design. It introduces intermediate code, features like retargeting and optimization. It describes three address code statements like a = b op c and quadruples which consist of four fields - op, arg1, arg2, and result to represent instructions. The conclusion states that intermediate code acts as an interface between the front-end and back-end of a compiler.
This document presents the design and implementation of an FPGA-based BCH decoder. It discusses BCH codes, which are binary error-correcting codes used in wireless communications. The implemented decoder is for a (15, 5, 3) BCH code, meaning it can correct up to 3 errors in a block of 15 bits. The decoder uses a serial input/output architecture and is implemented using VHDL on a FPGA device. It performs BCH decoding through syndrome calculation, running the Berlekamp-Massey algorithm to solve the key equation, and using Chien search to find error locations. The simulation result verifies correct decoding operation.
This talk will shed some light into the intermediate language that is used inside the Hex-Rays Decompiler. The microcode is simple yet powerful to represent real world programs. We publish it and give programmatic access to it from C++.
The document summarizes the proposed design of a power efficient channelizer for software defined radio using VLSI. It discusses the basic architecture of the channelizer which uses a cascaded integrator-comb (CIC) filter block followed by an 8-point fast Fourier transform (FFT). The CIC filter block contains 5 stages of integrators and 5 stages of comb filters with 1 decimator, totaling 8 complete stages. Simulation results and synthesis results showing the internal blocks and 8-point FFT are also presented. The designed channelizer is concluded to have promising decreases in noise and be suitable for real-time software defined radio channels.
Sample Exam Questions on Python for revisionafsheenfaiq2
This document provides 30 sample exam questions for part 1 of the final exam for the course CPIT 110 (Problem Solving and Programming). The questions cover topics from chapters 1-6 related to functions, including defining and calling functions, parameters, return values, scope of variables, and default arguments. The questions are multiple choice with 4 possible answers each.
This document discusses parallelizing loops to compute pi through numerical integration. It begins by describing how pi can be computed by approximating the integral of 1/(1+x^2) from 0 to 1. It then shows C++ and Fortran code that performs this computation sequentially with increasing numbers of steps to improve the approximation of pi. The document discusses variable scopes in C++ and Fortran and how OpenMP parallelization works by dividing the loop workload across threads. It demonstrates parallelizing the loops in both languages using the reduction clause to correctly sum values across threads. Finally, it discusses considerations for parallelizing loops and challenges like data dependencies.
MuVM: Higher Order Mutation Analysis Virtual Machine for CSusumu Tokumoto
Mutation analysis is a method for evaluating the effectiveness of a test suite by seeding faults artificially and measuring the fraction of seeded faults detected by the test suite. The major limitation of mutation analysis is its lengthy execution time because it involves generating, compiling and running large numbers of mutated programs, called mutants. Our tool MuVM achieves a significant runtime improvement by performing higher order mutation analysis using four techniques, metamutation, mutation on virtual machine, higher order split-stream execution, and online adaptation technique. In order to obtain the same behavior as mutating the source code directly, metamutation preserves the mutation location information which may potentially be lost during bitcode compilation and optimization. Mutation on a virtual machine reduces the compilation and testing cost by compiling a program once and invoking a process once. Higher order split-stream execution also reduces the testing cost by executing common parts of the mutants together and splitting the execution at a seeded fault. Online adaptation technique reduces the number of generated mutants by omitting infeasible mutants. Our comparative experiments indicate that our tool is significantly superior to an existing tool, an existing technique (mutation schema generation), and no-split-stream execution in higher order mutation.
The document presents a system model and problem formulation for user scheduling in massive MIMO OFDMA systems with hybrid analog-digital beamforming. The system considers a base station with N antennas but only Na < N RF chains serving multiple single-antenna mobile stations. The objective is to maximize the overall data rate by scheduling Kt mobile stations across subcarriers, subject to a per-subcarrier power constraint. For a single subcarrier, the problem is formulated as maximizing the sum rate of K scheduled users under a total power constraint, assuming Na = K RF chains. Two approaches are discussed: directly constraining the analog beamforming matrix or exploiting the solution from a digital scheduler using a clever decomposition method.
Pragmatic Optimization in Modern Programming - Demystifying the CompilerMarina Kolpakova
This document discusses compiler optimizations. It begins with an outline of topics including compilation trajectory, intermediate languages, optimization levels, and optimization techniques. It then provides more details on each phase of compilation, how compilers use intermediate representations to perform optimizations, and specific optimizations like common subexpression elimination, constant propagation, and instruction scheduling.
The document discusses common digital logic circuits including decoders, encoders, demultiplexers and multiplexers. It provides an overview of how these circuits work at a block level and then goes into more detail on decoders, describing their functionality, truth tables, and implementations including how to build larger decoders from smaller ones. Standard MSI decoder chips are also presented.
This document discusses cyclic codes, which are a type of error correcting code used in digital communications. Cyclic codes have the property that any cyclic shift of a codeword is also a valid codeword. They are defined by a generator polynomial that is a factor of x^n + 1, where n is the codeword length. Cyclic codes allow for simple encoding and decoding circuits using shift registers. Examples of cyclic codes include repetition codes, Hamming codes, BCH codes, and Reed-Solomon codes.
1. AlphaZero uses self-play reinforcement learning to train a neural network to evaluate board positions and select moves. It trains offline by playing games against itself, using the results to iteratively improve its network.
2. During online play, AlphaZero uses Monte Carlo tree search with the neural network to select moves. It evaluates many random simulations of possible future games to a certain depth, using the network to approximate values beyond that depth.
3. The success of AlphaZero is due to skillfully combining known reinforcement learning techniques like self-play training, neural network function approximation, and Monte Carlo tree search with powerful computational resources.
new optimization algorithm for topology optimizationSeonho Park
authors devise new convex approximation called DQA which utilizes information of two consecutive points at iterates. Also, to guarantee global convergence, filter method is illustrated.
An optimal and progressive algorithm for skyline queries slideWooSung Choi
The document presents an optimal and progressive algorithm for processing skyline queries using an R-tree index. It discusses two strategies - recursive nearest neighbor queries and a branch and bound skyline algorithm. The recursive NN query approach requires additional processing to eliminate duplicate results for higher dimensions, while the branch and bound skyline algorithm prunes non-skyline points during traversal to directly generate the skyline without duplicates. The algorithm processes the R-tree in a best-first manner by maintaining a priority queue of tree nodes ordered by their minimum possible skyline size.
This document provides an overview of Adaptive Neural Fuzzy Inference Systems (ANFIS). It discusses how ANFIS aims to integrate the benefits of fuzzy systems and neural networks by using neural network learning methods to determine the parameters of fuzzy inference systems. The document outlines ANFIS architecture and computational complexity. It also describes how ANFIS uses a hybrid learning algorithm with a least squares estimate to identify linear parameters and backpropagation to adjust nonlinear parameters.
The document describes an algebraic attack on the KeeLoq block cipher. KeeLoq is used in car keyless entry systems and has 528 rounds with a 64-bit key. The attack sets up a system of equations modeling the encryption rounds using a SAT solver to recover the key from known plaintext-ciphertext pairs. It converts the algebraic normal form equations to conjunctive normal form required by the SAT solver to solve for the key.
This document discusses combinational logic design, specifically combinational logic functions and their implementation using decoders and multiplexers. It provides an overview of combinational logic and covers topics like rudimentary logic functions, decoding using decoders, encoding using encoders, and selecting using multiplexers. Examples are given for implementing combinational logic functions with decoders and multiplexers. Procedures for expanding decoders and multiplexers to handle more inputs and outputs are also described.
Metaheuristic Tuning of Type-II Fuzzy Inference System for Data MiningVarun Ojha
The document proposes using metaheuristic optimization techniques to tune the parameters of an interval type-2 fuzzy inference system (IT2FIS) for data mining applications. Specifically, it aims to 1) create diverse rules in the IT2FIS, 2) reduce the number of fuzzy rules, 3) determine appropriate shapes for type-2 fuzzy sets, and 4) analyze the performance of proposed IT2FIS optimization methods. The proposed framework uses genetic algorithms to tune the IT2FIS knowledge base and swarm intelligence methods to tune rule parameters. Experimental results on four datasets show that differential evolution generally provides the best performance, though no single algorithm works best on all datasets.
The document discusses encoders, decoders, multiplexers (MUX), and how they can be used to implement digital logic functions. It provides examples of using 4-to-1, 8-to-1 and 10-to-1 MUX to implement functions. It also gives examples of 4-to-2, 8-to-3 and 10-to-4 encoders. Decoder examples include a 2-to-4 and 3-to-8 binary decoder. The document explains how decoders can be used as logic building blocks to realize Boolean functions. It poses questions to be answered using terms like MUX, DEMUX, encoder, decoder.
inQuba Webinar Mastering Customer Journey Management with Dr Graham HillLizaNolte
HERE IS YOUR WEBINAR CONTENT! 'Mastering Customer Journey Management with Dr. Graham Hill'. We hope you find the webinar recording both insightful and enjoyable.
In this webinar, we explored essential aspects of Customer Journey Management and personalization. Here’s a summary of the key insights and topics discussed:
Key Takeaways:
Understanding the Customer Journey: Dr. Hill emphasized the importance of mapping and understanding the complete customer journey to identify touchpoints and opportunities for improvement.
Personalization Strategies: We discussed how to leverage data and insights to create personalized experiences that resonate with customers.
Technology Integration: Insights were shared on how inQuba’s advanced technology can streamline customer interactions and drive operational efficiency.
Main news related to the CCS TSI 2023 (2023/1695)Jakub Marek
An English 🇬🇧 translation of a presentation to the speech I gave about the main changes brought by CCS TSI 2023 at the biggest Czech conference on Communications and signalling systems on Railways, which was held in Clarion Hotel Olomouc from 7th to 9th November 2023 (konferenceszt.cz). Attended by around 500 participants and 200 on-line followers.
The original Czech 🇨🇿 version of the presentation can be found here: https://www.slideshare.net/slideshow/hlavni-novinky-souvisejici-s-ccs-tsi-2023-2023-1695/269688092 .
The videorecording (in Czech) from the presentation is available here: https://youtu.be/WzjJWm4IyPk?si=SImb06tuXGb30BEH .
This talk will cover ScyllaDB Architecture from the cluster-level view and zoom in on data distribution and internal node architecture. In the process, we will learn the secret sauce used to get ScyllaDB's high availability and superior performance. We will also touch on the upcoming changes to ScyllaDB architecture, moving to strongly consistent metadata and tablets.
Fueling AI with Great Data with Airbyte WebinarZilliz
This talk will focus on how to collect data from a variety of sources, leveraging this data for RAG and other GenAI use cases, and finally charting your course to productionalization.
"Frontline Battles with DDoS: Best practices and Lessons Learned", Igor IvaniukFwdays
At this talk we will discuss DDoS protection tools and best practices, discuss network architectures and what AWS has to offer. Also, we will look into one of the largest DDoS attacks on Ukrainian infrastructure that happened in February 2022. We'll see, what techniques helped to keep the web resources available for Ukrainians and how AWS improved DDoS protection for all customers based on Ukraine experience
[OReilly Superstream] Occupy the Space: A grassroots guide to engineering (an...Jason Yip
The typical problem in product engineering is not bad strategy, so much as “no strategy”. This leads to confusion, lack of motivation, and incoherent action. The next time you look for a strategy and find an empty space, instead of waiting for it to be filled, I will show you how to fill it in yourself. If you’re wrong, it forces a correction. If you’re right, it helps create focus. I’ll share how I’ve approached this in the past, both what works and lessons for what didn’t work so well.
Essentials of Automations: Exploring Attributes & Automation ParametersSafe Software
Building automations in FME Flow can save time, money, and help businesses scale by eliminating data silos and providing data to stakeholders in real-time. One essential component to orchestrating complex automations is the use of attributes & automation parameters (both formerly known as “keys”). In fact, it’s unlikely you’ll ever build an Automation without using these components, but what exactly are they?
Attributes & automation parameters enable the automation author to pass data values from one automation component to the next. During this webinar, our FME Flow Specialists will cover leveraging the three types of these output attributes & parameters in FME Flow: Event, Custom, and Automation. As a bonus, they’ll also be making use of the Split-Merge Block functionality.
You’ll leave this webinar with a better understanding of how to maximize the potential of automations by making use of attributes & automation parameters, with the ultimate goal of setting your enterprise integration workflows up on autopilot.
Freshworks Rethinks NoSQL for Rapid Scaling & Cost-EfficiencyScyllaDB
Freshworks creates AI-boosted business software that helps employees work more efficiently and effectively. Managing data across multiple RDBMS and NoSQL databases was already a challenge at their current scale. To prepare for 10X growth, they knew it was time to rethink their database strategy. Learn how they architected a solution that would simplify scaling while keeping costs under control.
Northern Engraving | Modern Metal Trim, Nameplates and Appliance PanelsNorthern Engraving
What began over 115 years ago as a supplier of precision gauges to the automotive industry has evolved into being an industry leader in the manufacture of product branding, automotive cockpit trim and decorative appliance trim. Value-added services include in-house Design, Engineering, Program Management, Test Lab and Tool Shops.
"Scaling RAG Applications to serve millions of users", Kevin GoedeckeFwdays
How we managed to grow and scale a RAG application from zero to thousands of users in 7 months. Lessons from technical challenges around managing high load for LLMs, RAGs and Vector databases.
For the full video of this presentation, please visit: https://www.edge-ai-vision.com/2024/06/temporal-event-neural-networks-a-more-efficient-alternative-to-the-transformer-a-presentation-from-brainchip/
Chris Jones, Director of Product Management at BrainChip , presents the “Temporal Event Neural Networks: A More Efficient Alternative to the Transformer” tutorial at the May 2024 Embedded Vision Summit.
The expansion of AI services necessitates enhanced computational capabilities on edge devices. Temporal Event Neural Networks (TENNs), developed by BrainChip, represent a novel and highly efficient state-space network. TENNs demonstrate exceptional proficiency in handling multi-dimensional streaming data, facilitating advancements in object detection, action recognition, speech enhancement and language model/sequence generation. Through the utilization of polynomial-based continuous convolutions, TENNs streamline models, expedite training processes and significantly diminish memory requirements, achieving notable reductions of up to 50x in parameters and 5,000x in energy consumption compared to prevailing methodologies like transformers.
Integration with BrainChip’s Akida neuromorphic hardware IP further enhances TENNs’ capabilities, enabling the realization of highly capable, portable and passively cooled edge devices. This presentation delves into the technical innovations underlying TENNs, presents real-world benchmarks, and elucidates how this cutting-edge approach is positioned to revolutionize edge AI across diverse applications.
The Department of Veteran Affairs (VA) invited Taylor Paschal, Knowledge & Information Management Consultant at Enterprise Knowledge, to speak at a Knowledge Management Lunch and Learn hosted on June 12, 2024. All Office of Administration staff were invited to attend and received professional development credit for participating in the voluntary event.
The objectives of the Lunch and Learn presentation were to:
- Review what KM ‘is’ and ‘isn’t’
- Understand the value of KM and the benefits of engaging
- Define and reflect on your “what’s in it for me?”
- Share actionable ways you can participate in Knowledge - - Capture & Transfer
Conversational agents, or chatbots, are increasingly used to access all sorts of services using natural language. While open-domain chatbots - like ChatGPT - can converse on any topic, task-oriented chatbots - the focus of this paper - are designed for specific tasks, like booking a flight, obtaining customer support, or setting an appointment. Like any other software, task-oriented chatbots need to be properly tested, usually by defining and executing test scenarios (i.e., sequences of user-chatbot interactions). However, there is currently a lack of methods to quantify the completeness and strength of such test scenarios, which can lead to low-quality tests, and hence to buggy chatbots.
To fill this gap, we propose adapting mutation testing (MuT) for task-oriented chatbots. To this end, we introduce a set of mutation operators that emulate faults in chatbot designs, an architecture that enables MuT on chatbots built using heterogeneous technologies, and a practical realisation as an Eclipse plugin. Moreover, we evaluate the applicability, effectiveness and efficiency of our approach on open-source chatbots, with promising results.
What is an RPA CoE? Session 1 – CoE VisionDianaGray10
In the first session, we will review the organization's vision and how this has an impact on the COE Structure.
Topics covered:
• The role of a steering committee
• How do the organization’s priorities determine CoE Structure?
Speaker:
Chris Bolin, Senior Intelligent Automation Architect Anika Systems
3. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
ANR DEFIS
Projet ANR-11-INSE-008
DEsign of FIxed-point embedded Systems (DEFIS)
3/41
4. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
ANR DEFIS
Projet ANR-11-INSE-008
DEsign of FIxed-point embedded Systems (DEFIS)
Various partners :
Research : IRISA, LIRMM (DALI), CEA, LIP6
3/41
5. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
ANR DEFIS
Projet ANR-11-INSE-008
DEsign of FIxed-point embedded Systems (DEFIS)
Various partners :
Research : IRISA, LIRMM (DALI), CEA, LIP6
Industrial : Thales, InPixal
3/41
6. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
On the first hand... A filter
x[n]
z
b0
+
+
z
+
+
1
h(z) =
z
Pn
1+
b1
i=0
Pn
bi z
1
y[n]
+
b1
a1
b2
z
a2
1
b3
x[n]
1
a1
1
b2
z
y[n]
+
z
b1
z
+
1
a2
z
1
z
1
z
1
i
i=1 ai z
i
z
1
b3
1
z
a3
1
a3
Signal Processing
LTI filters: FIR or IIR
Its transfer function
Algorithmic relationship used to compute output(s) from
input(s), for example:
y (k) =
n
X
i=0
bi u(k
i)
n
X
ai y (k
i)
i=1
4/41
7. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
On the other hand... A target
...
±2
2
...
2
0
2
s
Hardware target (FPGA, ASIC) or software target (DSP,µC)
Using fixed-point arithmetic for di↵erent reasons:
no FPU
cost
size
power consumption
etc.
5/41
11. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Fixed-Point Arithmetic
Fixed-Point number
2m 2m
Xm
1
20
2
1
2`
X0
X
1
X`
w
Representation : X .2` with X = Xm Xm
1 ...X0 ...X` .
Format : determined by wordlength and fixed-point position,
and noted for example (m, `).
7/41
14. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Fixed-Point Arithmetic
Fixed-Point number
2m 2m
Xm
1
20
2
1
2`
X0
X
1
X`
w
Representation : X .2` with X = Xm Xm
1 ...X0 ...X`
Format : determined by wordlength and fixed-point position,
and noted for example (m, `)
Only the mantissa X is stored, the scale 2` is implicit
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15. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Fixed-Point Arithmetic
Sum example
We want to compute 42 +
0
1
0
1
0
p
2 with an 8-bit operator :
1
0
0
1
0
84
0
1
1
0
1
0
90
s
10/41
16. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Fixed-Point Arithmetic
Sum example
We want to compute 42 +
0
1
0
0
1
1
0
2 with an 8-bit operator :
0
1
0
1
0
1
1
84
0
0
0
1
p
0
1
1
p
FxP8 (FxP8 (42) + FxP8 ( 2)) = FxP8 (84.2
0
1
2
0
86
1
+ 90.2
6)
=
10/41
17. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Fixed-Point Arithmetic
Sum example
We want to compute 42 +
0
1
0
0
1
1
0
2 with an 8-bit operator :
0
1
0
1
0
1
1
84
0
0
0
1
p
0
1
1
p
FxP8 (FxP8 (42) + FxP8 ( 2)) = FxP8 (84.2
84.2 1 + (90
5).2 1 = 86.2 1 = 43
p
FxP8 (42) + FxP8 ( 2) = 43.40625
0
1
2
0
86
1
+ 90.2
6)
=
10/41
18. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Fixed-Point Arithmetic
Sum example
We want to compute 42 +
0
1
0
0
1
1
0
2 with an 8-bit operator :
0
1
0
1
0
1
1
84
0
0
0
1
p
0
1
1
p
FxP8 (FxP8 (42) + FxP8 ( 2)) = FxP8 (84.2
84.2 1 + (90
5).2 1 = 86.2 1 = 43
p
FxP8 (42) + FxP8 ( 2) = 43.40625
0
1
2
0
86
1
+ 90.2
6)
=
10/41
19. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Fixed-Point Arithmetic
Fixed-Point number
2m 2m
Xm
1
20
2
1
2`
X0
X
1
X`
w
Representation : X .2` with X = Xm Xm 1 ...X0 ...X`
Format : determined by wordlength and fixed-point position,
and noted for example (m, `)
Only the mantissa X is stored, the scale 2` is implicit
Computation in finite precision implies errors.
Numerical degradations
quantization of the coe cients
round-o↵ errors in computations
11/41
20. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Filter
IIR Filter
Let H be the transfer function of a n
H(z) =
b0 + b1 z
1 + a1 z
1
th order IIR filter :
+ · · · + bn z
1 + ··· + a z
n
n
n
,
8z 2 C.
(1)
12/41
21. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Filter
IIR Filter
Let H be the transfer function of a n
H(z) =
b0 + b1 z
1 + a1 z
1
th order IIR filter :
+ · · · + bn z
1 + ··· + a z
n
n
n
,
8z 2 C.
(1)
There is a lot of di↵erent realizations for a filter :
Direct Form I, DF II, ⇢DF II transposed
State-Space realizations, -operator, LGS, LCW
parallel or cascade decompostion
...
Each realization needs its own parameters and therefore the impact
of FxP computation will depend on the realization.
12/41
22. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Filter
This filter is usually realized with the following algorithm
y (k) =
n
X
bi u(k
i)
i=0
n
X
ai y (k
i)
(2)
i=1
where u(k) is the input at step k and y (k) the output at step k.
We can see round-o↵ errors as the add of an error e(k) on the
output and only y † (k) can be computed.
y † (k) =
n
X
i=0
bi u(k
i)
n
X
ai y † (k
i) + e(k).
(3)
i=1
13/41
23. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Filter
u(k)
e(k)
H
He
y(k)
y(k)
+
y † (k)
y (k) , y † (k) y (k) can be seen as the result of the error
through the filter He :
He (z) =
1 + a1 z
1
1
+ · · · + an z
n
,
8z 2 C.
14/41
24. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Filter
u(k)
e(k)
H
He
y(k)
y(k)
+
y † (k)
y (k) , y † (k) y (k) can be seen as the result of the error
through the filter He :
He (z) =
1 + a1 z
1
1
+ · · · + an z
n
,
8z 2 C.
If the error e(k) is in [e; e], then we are able to compute
y such that y (k) is in [ y ; y ] :
y
=
y
=
y and
e +e
e e
|He |DC
kHe k`1
2
2
e +e
e e
|He |DC +
kHe k`1
2
2
14/41
25. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Objective
Objective:
Given an algorithm and a target, find the optimal implementation.
model the fixed-point algorithms
model the hardware resources (computational units, etc.)
evaluate the degradation
find one/some optimal implemented algorithm(s)
15/41
26. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Objective
From filter to code, global flow
algorithm
transformation
implementation
filter
set of equivalent
realisations
SIF
Realisation
choice
optimal realisation
Fixed-point
implementation
fixed-point
algorithm
language
Code
generation
code
sensibillity
mesures
multi-criteria
optimisation
16/41
27. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Objective
From filter to code, global flow
algorithm
transformation
implementation
filter
set of equivalent
realisations
SIF
Realisation
choice
optimal realisation
Fixed-point
implementation
fixed-point
algorithm
language
Code
generation
code
sensibillity
mesures
multi-criteria
optimisation
17/41
29. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
The only operations needed in filter algorithm computation are
sum-of-products:
n
X
S=
c i · xi
i=1
where ci are known constants and xi variables (inputs, state or
intermediate variables).
Question:
How to implement computation of S in fixed-point arithmetic?
What control on degradation errors?
19/41
30. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
The only operations needed in filter algorithm computation are
sum-of-products:
n
X
S=
c i · xi
i=1
where ci are known constants and xi variables (inputs, state or
intermediate variables).
Question:
How to implement computation of S in fixed-point arithmetic?
What control on degradation errors?
Answer:
A tool responding to the global flow in particular case of
sum-of-product (FiPoGen).
19/41
31. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Main example
Let H be the transfer function of a butterworth filter of 4th order:
H(z) =
0.00132801779278 + 0.00531207117112z 1 + 0.00796810675667z 2 + 0.00531207117112z 3 + 0.00132801779278z 4
1
2.87111622831650z 1 + 3.20825006629575z 2
1.63459488108445z 3 + 0.31870932778967z 4
Associated algorithm:
y (k)
=
0.0013279914856 u(k) + 0.00531196594238 u(k
+0.00531196594238 u(k
3.20825195312 y (k
1) + 0.00796794891357 u(k
3) + 0.0013279914856 u(k
2) + 1.63458251953 y (k
3)
2)
4) + 2.87109375 y (k
1)
0.318710327148 y (k
4)
Inputs datas :
wordlength of constants, u(k) and y (k) : 16 bits
u(k) 2 [ 13, 13] and y (k) 2 [ 17.123541; 17.123541]
Bits formatting example
20/41
32. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
From filter to code, global flow
algorithm
transformation
implementation
filter
set of equivalent
realisations
SIF
Realisation
choice
optimal realisation
Fixed-point
implementation
fixed-point
algorithm
language
Code
generation
code
sensibillity
mesures
multi-criteria
optimisation
21/41
33. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen - Fixed Point Generator
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
Conversion
The user gives in input to FiPoGen the wordlentgh of each
constants, and FiPoGen computes the complete format of each of
them, and specifies the format of each variables.
22/41
34. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
Order
In software, addition can be not associative, therefore all di↵erent
orders of additions must be considered.
23/41
35. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
Order
In software, addition can be not associative, therefore all di↵erent
orders of additions must be considered.
oSoP
An evaluation scheme for a given sum-of-products with a given
order will be called ordered-sum-of-products (oSoP).
23/41
37. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
fixed-point
algorithm
Fixed-Point
Conversion
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
best fixed-point
scheme
Optimization /
Best scheme
choice
Code
generation
new scheme
code
Number of oSoP
For a given sum-of-products of N th order, there are
oSoP to consider.
QN
1
i=1 (2i
1)
23/41
39. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
fixed-point
algorithm
Fixed-Point
Conversion
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
best fixed-point
scheme
Optimization /
Best scheme
choice
Code
generation
new scheme
code
Number of oSoP
For a given sum-of-products of N th order, there are
oSoP to consider.
QN
1
i=1 (2i
1)
Generation
At this step, FiPoGen generates all the oSoP one by one.
23/41
40. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
Formats propagation
From an oSoP parametrized with inputs FPF and wordlength, and
using some propagation rules on adders and multipliers, we obtain
a fully-parametrized oSoP.
24/41
42. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
Propagation =) right-shifts
By propagating formats, some additions yield a right-shift on its
operands (for aligning them onto the result format). This
right-shift implies error onto the final result.
24/41
43. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
Fixed-Point
Conversion
fullyparametrized
scheme
one evaluation
scheme
fixed-point
algorithm
Evaluation
scheme
Formats
propagation /
Noise
evaluation
best fixed-point
scheme
Optimization /
Best scheme
choice
Code
generation
new scheme
code
Right-shift =) error interval
The right shifting of d bits of a variable x (with (m, `) as FPF) is
equivalent to add an interval error [e] = [e; e] with
[e, e]
Truncation
[ 2`+d + 2` ; 0]
Round to the nearest
[ 2`+d 1 + 2` ; 2`+d 1 ]
(4)
Cumulated error is therefore computed for a given evaluation
scheme.
24/41
44. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
Optimization criteria
errors
(noise : couple mean/variance)
error interval
25/41
45. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
Optimization criteria
errors
latency (infinite parallelism)
height of the syntax tree
25/41
46. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
Optimization criteria
errors
latency (infinite parallelism)
adequacy with hardware target
number of operators
wordlength of operators
etc.
25/41
47. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
Optimization criteria
errors
latency (infinite parallelism)
adequacy with hardware target
etc.
25/41
48. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
FiPoGen
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
Once we have the best evaluation scheme, we choose a language
and we generate the associated fixed-point code.
26/41
50. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
s
s
s
s
s
s
s
s
s
sf
Context
A sum of N terms (pi )1iN with di↵erent formats, and the known
FPF of final result (sf ), less than total wordlength (s).
28/41
51. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
s
s
s
s
s
s
s
s
s
sf
Context
A sum of N terms (pi )1iN with di↵erent formats, and the known
FPF of final result (sf ), less than total wordlength (s).
Question:
Can we remove some useless bits ?
28/41
52. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
s
s
s
s
s
s
s
s
s
sf
Two-step formatting
1
most significant bits
2
least significant bits
28/41
53. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
MSB formatting
Jacskon’s Rule (1979)
This Rule states that in consecutive additions and/or subtractions
in two’s complement arithmetic, some intermediate results and
operands may overflow. As long as the final result representation
can handle the final result without overflow, then the result is valid.
29/41
54. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
MSB formatting
Jacskon’s Rule (1979)
This Rule states that in consecutive additions and/or subtractions
in two’s complement arithmetic, some intermediate results and
operands may overflow. As long as the final result representation
can handle the final result without overflow, then the result is valid.
Example :
We want to compute 104 + 82
94 with 8 bits :
29/41
55. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
MSB formatting
Jacskon’s Rule (1979)
This Rule states that in consecutive additions and/or subtractions
in two’s complement arithmetic, some intermediate results and
operands may overflow. As long as the final result representation
can handle the final result without overflow, then the result is valid.
Example :
We want to compute 104 + 82
104 + 82 = 70 overflow !
94 with 8 bits :
29/41
56. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
MSB formatting
Jacskon’s Rule (1979)
This Rule states that in consecutive additions and/or subtractions
in two’s complement arithmetic, some intermediate results and
operands may overflow. As long as the final result representation
can handle the final result without overflow, then the result is valid.
Example :
We want to compute 104 + 82 94 with 8 bits :
104 + 82 = 70 overflow !
but 70 94 = 92 overflow !
This second overflow cancels the first one and we obtain the
expected result.
29/41
57. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
MSB formatting
Fixed-Point Jacskon’s Rule
Let s be a sum of n fixed-point number pi s, in format (M, L). If s
is known to have a final MSB equals to mf with mf < M, then:
1
0
mf +1
mf
M X
@
s=
2j pi,j A
1in
j=L
s
s
s
s
s
s
s
M
s
mf
L
s
sf
30/41
58. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
MSB formatting
Fixed-Point Jacskon’s Rule
Let s be a sum of n fixed-point number pi s, in format (M, L). If s
is known to have a final MSB equals to mf with mf < M, then:
1
0
mf +1
mf
M X
@
s=
2j pi,j A
1in
j=L
s
s
s
s
s
s
s s s
s
M
mf
L
s
sf
30/41
59. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
LSB formatting
LSB Formatting main idea (from Florent de Dinechin)
s
s
s
s
s
s
s
s
s
sf
31/41
60. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
LSB formatting
LSB Formatting main idea (from Florent de Dinechin)
s
s
s
s
s
s
s
s
s0
sf
31/41
61. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
LSB formatting
LSB Formatting main idea (from Florent de Dinechin)
s
s
s
s
s
s
s
s
s0
sf0
31/41
62. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
LSB formatting
LSB Formatting main idea (from Florent de Dinechin)
s
s
s
s
s
s
s
s
s0
sf0
sf0 6= sf BUT sf0 is a faithful round-o↵ of sf .
31/41
63. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
LSB formatting
LSB Formatting main idea (from Florent de Dinechin)
s
s
s
s
s
s
s
s
s
sf0
Can we determine a minimal
round-o↵ of sf ?
such that sf0 is always a faithful
31/41
64. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
LSB formatting
evaluation
For both rounding mode (round-to-nearest or truncation), the
smallest integer that provides sf0 = ?lf (sf ) is given by:
= dlog2 (n)e
32/41
65. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
LSB formatting
evaluation
For both rounding mode (round-to-nearest or truncation), the
smallest integer that provides sf0 = ?lf (sf ) is given by:
= dlog2 (n)e
More precisely
Some pi s may have LSB (`i ) greater than the final LSB `f , so we
don’t need to consider them in computation :
= dlog2 (nf )e
with nf = Card(If ) and If , {i | `i < `f }.
32/41
67. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Formatting method
s
s
s
s
s
s
s
s
1
2
3
4
we
we
we
we
s
sf0
compute
format all pi s into FPF (mf , lf
compute s
obtain sf0 from s
)
33/41
69. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Back to our main example
Main example
s
s
s
s
s
s
s
s
s
s
s
= dlog2 (n)e
All the di↵erent oSoP have the same errors
=) Here, error is not a criteria to choose the best oSoP
34/41
70. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
oSoP
S
(5,-10)
>> 4
(5,-14)
+
(5,-14)
+
(5,-14)
+
4)
(5,-1
+
)
14
(5,-
(5,-
F
9
23520
⇥
F
(5,-10)
y [n
1]
(2,-13)
-26282
(5,-10)
y [n
2]
(5,-
19
(4,-11) (-7,-22)
u[n]
22280
⇥
4)
12
(-2,-14)
(-1,-16)
-20887
⇥
+
)
14
(5,(5,-10)
y [n
4]
(5,-
F
3]
(-9,-24)
22280
⇥
(4,-11)
u[n
4]
(1,-14)
26781
4)
F
4)
F
(-1,-14)
(-7,-22)
18
F
21
(5,-1
(5,-1
14)
(-4,-14)
(4,-11)
u[n
+
(5,-1
14)
F
(-4,-14)
21
⇥
(8,-14)
(-9,-24)
9
22280
⇥
+
4)
(5,-1
+
14)
(5,-
4)
F
(8,-14)
(2,-13)
(5,-1
14)
(5,-14)
(5,-14)
22280
⇥
(7,-14)
(-6,-21)
(4,-11)
10
16710
u[n 2]
⇥
(-2,-14)
19
⇥
(4,-11)
u[n
1]
(5,-10)
y [n
3]
35/41
71. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Comparison
s
s
s
s
s
s
s
s
s
s
s
2
=0
3
= dlog2 (nf )e
1
= min(`i )
i
36/41
72. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Comparison
y(k)
F ix2
F ix3
F ix1
k
y 2 [ y;
y ] = [ 8.52445240 ⇥ 10
2
; 1.26555189 ⇥ 10
2
]
36/41
73. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Formatting
This new task can be inserted in FiPoGen process.
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
37/41
74. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Formatting
This new task can be inserted in FiPoGen process.
sum-of-product
realisation
Fixed-Point
Conversion
fixed-point
algorithm
Formatting
"lighter"
fixed-point
algorithm
Evaluation
scheme
one evaluation
scheme
Formats
propagation /
Noise
evaluation
fullyparametrized
scheme
Optimization /
Best scheme
choice
best fixed-point
scheme
Code
generation
new scheme
code
37/41
75. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Word-length optimization
It is a main current problem in fixed-point arithmetic. It consists of
minimizing the word-length of each parameter under constraints.
38/41
76. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Word-length optimization
It is a main current problem in fixed-point arithmetic. It consists of
minimizing the word-length of each parameter under constraints.
P
The idea, for a sum-of-products s = i ci ⇥ vi , is to :
define the cost function to minimize
min (ws +
P
i
w ci +
P
i
wvi )
38/41
77. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Word-length optimization
It is a main current problem in fixed-point arithmetic. It consists of
minimizing the word-length of each parameter under constraints.
P
The idea, for a sum-of-products s = i ci ⇥ vi , is to :
define the cost function to minimize
define the constraints on the error by considering formatting
`s
` ci + ` v i
38/41
78. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Word-length optimization
It is a main current problem in fixed-point arithmetic. It consists of
minimizing the word-length of each parameter under constraints.
P
The idea, for a sum-of-products s = i ci ⇥ vi , is to :
define the cost function to minimize
define the constraints on the error by considering formatting
ws
w ci
`s
wv i
ms
` ci + ` v i
m ci m v i
1
38/41
79. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Word-length optimization
It is a main current problem in fixed-point arithmetic. It consists of
minimizing the word-length of each parameter under constraints.
P
The idea, for a sum-of-products s = i ci ⇥ vi , is to :
define the cost function to minimize
define the constraints on the error by considering formatting
y (k) 2 [ y ;
y]
38/41
80. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Word-length optimization
It is a main current problem in fixed-point arithmetic. It consists of
minimizing the word-length of each parameter under constraints.
P
The idea, for a sum-of-products s = i ci ⇥ vi , is to :
define the cost function to minimize
define the constraints on the error by considering formatting
y (k) 2 [ y ;
y]
y and y are functions of e and e which are functions of ws , wci
and wvi .
38/41
81. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Formatting
Word-length optimization
It is a main current problem in fixed-point arithmetic. It consists of
minimizing the word-length of each parameter under constraints.
P
The idea, for a sum-of-products s = i ci ⇥ vi , is to :
define the cost function to minimize
define the constraints on the error by considering formatting
solve the problem using known solvers or find a new solution
38/41
82. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Conclusion
This PhD thesis answers the problem of optimal filter
implementation in fixed-point arithmetic.
For this, some works have been realized:
Formalisms : for conversion and basic operations in
fixed-point arithmetic
FiPoGen : a tool generating fixed-point code for a
well-fashioned algorithm
Bits formatting : a first step towards word-length optimization
39/41
83. Context and Objectives
FiPoGen
Bits Formatting
Conclusion
Second part of the PhD thesis
A lot of works still to be done:
Wordlength optimization considering bits formatting
Make FiPoGen realizes the complete flow defined before
Do the link with Silviu’s works
40/41