Back to Analog, but only for implementation issue. It is shown a channel decoding block can be realized by a complete analog topology.

1. Analog Approaches
in Digital Receivers
‫ذهابی‬ ‫محمدرضا‬
‫فناوری‬ ‫و‬ ‫پژوهش‬ ‫هفته‬
18 ‫آذر‬1387

2. Target of the work
Why Analog Realization?
Set of
Equations
Circuit
topology
?

3. Channel
Encoder
Demodulation
Digital
Source
Modulation
Channel
FilteringDecoder
Target of the work
General Communication System

4. Outline
• Introduction
– Coding
– Convolutional Codes
• Codes on Graphs
• Analog Implementation
• Simulation Results
Decoding on Analog Graph

5. Introduction
Maximum Likelihood Decoding
Invalid Codeword
Valid Codeword
Observation
ML Principle
Ĉ = argmax P(Y|C)
c
Ĉ = argmin ||Y-C||²
c
Exhaustive search
2k
comparisons
Decoding Algorithm
~ k
k : information length

6. Introduction
Encoding and Decoding of CC.
Decoding
Encoding
yn
2
un
yn
1
un
yn
2
yn
1
Recursive Systematic Encoder Feed Forward Encoder
n-1 n n+1 n+2
Trellis of the code
2mstates

7. Outline
• Introduction
• Codes on Graphs
– Principles of Graph
– Log-Likelihood Ratio (LLR)
– Operations on LLRs
– convolutional code example
• Analog Implementation
• Simulation Results
Decoding on Analog Graph

8. b1
Principles of Graph
b o1 o2
Two obs. for a bit
b2
xor
Decodingformulas
1 2 1 2 1 2( 0 | ) (1 )(1 )P b o o P P P P= = + − −b o1 o2
P(b = 0|o1)
P(b1 = 0|o1)
Codes on Graphs

9. Log-Likelihood Ratio (LLR)
Codes on Graphs
P(b = 0|o)
P(b = 1|o)
L(b|o) = ln
P(b = 0|o) =
1
1+exp(−L(b|o))
P(b = 1|o) =
exp(−L(b|o))
1+exp(−L(b|o))

10. Operations on LLRs
Codes on Graphs
L(b|o1o2) = L(b|o1) + L(b|o2)
tanh (L(b|o1o2)/2) = tanh (L(b1|o1)/2) tanh (L(b2|o2)/2)
b o1 o2
b1
b2
xor
b o1 o2

11. Messages in graphs
Check
node
Codes on Graphs
Symbol
node
L(b|o1o2) = L(b|o1) + L(b|o2)
tanh (L(b|o1o2)/2) =
tanh (L(b1|o1)/2) tanh (L(b2|o2)/2)

12. (7,5) convolutional code example
yn
un
Codes on Graphs
IN 0 GD
0 IN GN
U
Y = 0
X

13. Outline
• Introduction
• Codes on Graphs
• Analog Implementation
– Probability to LLR
– LLR to Probability
– Generic Variable Node
– Generic Function Node
– Schematic Diagram of Decoder
• Simulation Results
Decoding on Analog Graph

14. Analog Implementation
Probability to LLR
vo i1
=ln
VT i2
P(b = 0|o)
P(b = 1|o)
L(b|o) = ln
vo
⇔ L(b|o)
VT
i1
⇔ P(b = 0|o)
i1+i2
i2
⇔ P(b = 1|o)
i1+i2

15. Analog Implementation
LLR to Probability
vo
⇔ L(b|o)
VT
i1
⇔ P(b = 0|o)
i1+i2
i2
⇔ P(b = 1|o)
i1+i2
i1
=
i1+i2
1
1+exp(−v/VT)
i2
=
i1+i2
exp(−v/VT)
1+exp(−v/VT)
P(b = 0|o) =
1
1+exp(−L(b|o))
P(b = 1|o) =
exp(−L(b|o))
1+exp(−L(b|o))

16. Analog Implementation
Generic Symbol node
Tail current
L(b|o1o2) = L(b|o1) + L(b|o2)
vz=vx+vy

17. Analog Implementation
Generic check node
Tail current
tanh (L(b|o1o2)/2) = tanh (L(b1|o1)/2) tanh (L(b2|o2)/2)
tanh (vz /2) = tanh (vx /2) tanh (vy /2)

18. Analog Implementation
(7,5) RSC schematic diagram

19. Outline
• Introduction
• Codes on Graphs
• Analog Implementation
• Simulation Results
– Overview and setting up
– Time Response
– Speed and Performance versus a design parameter
– Overall Performance (BER)
Decoding on Analog Graph

20. Overview and setting up
Simulation Results
Decoder
16
8
8
Channel output
Decoded bits
CMOS model : AMS0.35µm (Sub-threshold)
Power supply : 5 V
Power Consumption : 0.3 mW
Decoder : (7,5)oct RSC or non-RSC Codes
Codeword Length : 16 Code Rate : 0.5

21. Time response
Simulation Results

22. Effect of tail current
Simulation Results
0 20 40 60
10
-3
10
-2
10
-1
10
0
10 nA
100 nA
1000 nA
Time (µS)
BER

23. Tail current:
10 nA
Simulation Results
Bit-Error-Rate and benchmark

24. Conclusions and Perspective
Decoding on Analog Graph
• No need for input ADC
• No clock input
• Parallel structure
• Soft input (gain +3dB gain)
• Soft and hard outputs
• Very small transistor count

25. Conclusions and Perspective
• Using current to represent the LLR may reduce the
complexity of the summation blocks used in variable nodes.
• Designing competitive analog topologies for realization of
graph’s nodes that cope with low consumption requirements.
• Finding other applications suitable for analog implementation.
For example the issue of synchronization in MIMO receivers is
under investigation.
• Systematic modeling of analog decoders that incorporates
transient, mismatching and other secondary effects.
• Extending the idea to non-binary cases such as joint channel
equalization and decoding problem.
Decoding on Analog Graph

26. ‫تشکر‬ ‫با‬
‫سوال؟‬
Analog Approaches
in Digital Receivers