2 GHz Patch Antenna/Array Design
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Designed and measured a patch antenna and patch array system at an operating frequency of 2GHz with minimal return loss S11 < -20dB within ANSYS HFSS.
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![ELEC 4503 - RF LINES & ANTENNAS - FALL 2018 1
Patch Antenna/Array Design
Rashad Alsaffar (101006781), Celina Chan (101027792)
Abstract—The dimensions of a patch antenna are directly
affiliated with its performance. Operating frequency was assigned
individually to students to aim for minimum S11 return loss (¡
−20dB) for each patch antenna. A feed line supplied a 50Ω
impedance, ensuring maximum power transfer throughout the
device. The design would become amplified with the addition of
two antenna patches to develop an antenna array, increasing
overall gain and performance as opposed to a single patch
antenna. Dimensions of the array were tuned to match the
specifications of the individual patch antenna.
I. OBJECTIVE
The objective of this lab was to learn and understand the
design of a patch antenna within HFSS. An operating
frequency of 2GHz was assigned; the patch antenna must
try to simulate minimum return loss (S11 < −20dB) at the
mentioned operating frequency. To insure this, an online
calculator [1] was used to determine the dimensions of
the patch antenna. Dimensions were tweaked to meet the
specifications of the device. The feed line dimensions was
altered as well, to ensure a 50Ω impedance into the patch
antenna.
The design would be copied and pasted twice within
the patch array schematic; simulations would be ran to test
the performance of the patch array, where it would try to
meet the specifications for the individual patch antenna, i.e.
minimum return loss at operating frequency.
II. PATCH ANTENNA
The patch antenna model was made through HFSS. Its di-
mensions were tweaked to allow for an operating frequency
of 2GHz and minimum S11 return loss.
Fig. 1. Patch Antenna Model w/ Dimensions
The S11 response was derived through HFSS simulations. The
plot below details the recorded S11 response from the patch
antenna simulation:
Fig. 2. Patch Antenna S11 Response (dB)
The co-polarized and cross-polarized gains (dB) were plotted
within each principal cut within the plots below:
Fig. 3. Patch Antenna Co/Cross-Polarized Gain (dB) @ 2GHz in
E-Plane](https://image.slidesharecdn.com/2ghzpatchantenna-arraydesignreport-181227054957/85/2-GHz-Patch-Antenna-Array-Design-1-320.jpg)
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Microwave engineers have been known to designedly created defects in the shape of carved out patterns on the ground plane of microstrip circuits and transmission lines for a long time, although their implementations to the antennas are comparatively new. The term Defected Ground Structure (DGS), precisely means a single or finite number of defects. At the beginning, DGS was employed underneath printed feed lines to suppress higher harmonics. Then DGS was directly integrated with antennas to improve the radiation characteristics, gain and to suppress mutual coupling between adjacent elements. Since then, the DGS techniques have been explored extensively and have led to many possible applications in the communication industry. The objective of this paper is to design and investigate microstrip patch antenna that operates at 2.4 GHz for Wireless Local Area Network WLAN IEEE 802.11b/g/n, ,Zigbee, Wireless HART, Bluetooth and several proprietary technologies that operate in the 2.4 GHz band. The design of the proposed antenna involves using partially Defected Ground Structure and circular/cross slots and compare it to the traditional microstrip patch antenna. The results show improvement in both the gain of 3.45 dB and the S11 response of -22.3 dB along with reduction in the overall dimensions of the antenna. As a conclusion, the performance of the antenna has been improved through the incorporation with the DGS and slots structures regarding the S11 response and the gain. The proposed antenna become more compact. Finally, the radiation pattern of proposed antenna has remained directional in spite of adding slots on the ground plane.
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Design of rectangular patch antenna array using advanced design methodology
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2 GHz Patch Antenna/Array Design
- 1. ELEC 4503 - RF LINES & ANTENNAS - FALL 2018 1 Patch Antenna/Array Design Rashad Alsaffar (101006781), Celina Chan (101027792) Abstract—The dimensions of a patch antenna are directly affiliated with its performance. Operating frequency was assigned individually to students to aim for minimum S11 return loss (¡ −20dB) for each patch antenna. A feed line supplied a 50Ω impedance, ensuring maximum power transfer throughout the device. The design would become amplified with the addition of two antenna patches to develop an antenna array, increasing overall gain and performance as opposed to a single patch antenna. Dimensions of the array were tuned to match the specifications of the individual patch antenna. I. OBJECTIVE The objective of this lab was to learn and understand the design of a patch antenna within HFSS. An operating frequency of 2GHz was assigned; the patch antenna must try to simulate minimum return loss (S11 < −20dB) at the mentioned operating frequency. To insure this, an online calculator [1] was used to determine the dimensions of the patch antenna. Dimensions were tweaked to meet the specifications of the device. The feed line dimensions was altered as well, to ensure a 50Ω impedance into the patch antenna. The design would be copied and pasted twice within the patch array schematic; simulations would be ran to test the performance of the patch array, where it would try to meet the specifications for the individual patch antenna, i.e. minimum return loss at operating frequency. II. PATCH ANTENNA The patch antenna model was made through HFSS. Its di- mensions were tweaked to allow for an operating frequency of 2GHz and minimum S11 return loss. Fig. 1. Patch Antenna Model w/ Dimensions The S11 response was derived through HFSS simulations. The plot below details the recorded S11 response from the patch antenna simulation: Fig. 2. Patch Antenna S11 Response (dB) The co-polarized and cross-polarized gains (dB) were plotted within each principal cut within the plots below: Fig. 3. Patch Antenna Co/Cross-Polarized Gain (dB) @ 2GHz in E-Plane
- 2. ELEC 4503 - RF LINES & ANTENNAS - FALL 2018 2 Fig. 4. Patch Antenna Co/Cross-Polarized Gain (dB) @ 2GHz in H-Plane III. PATCH ARRAY The patch antenna model was copied within the established patch array model within HFSS. The design was once again configured for resonance at 2GHz experiencing a minimum S11 return loss. Fig. 5. Patch Array Model The figure below displays the modified dimensions made to the power divider attachment for the overall patch array: Fig. 6. Patch Array Model Dimensions The S11 response for the patch array is described in the plot below. A minimal return loss of ≈ −16.5dB was achieved at resonance frequency of 2.01GHz. The results are compared to given device parameters across multiple frequencies: Fig. 7. Patch Array S11 Response (dB) w/ Received S11 Data The co-polarized and cross-polarized gains (dB) were plotted within each principal cut within the plots below: Fig. 8. Patch Array Co/Cross-Polarized Gain (dB) @ 2GHz in E- Plane
- 3. ELEC 4503 - RF LINES & ANTENNAS - FALL 2018 3 Fig. 9. Patch Array Co/Cross-Polarized Gain (dB) @ 2GHz in H- Plane REFERENCES [1] S. Gupta, ”Patch Antenna”, Lab 5, 2018