2. Operating Systems I PT / FF 14
Computer Systems Today
2
Users
Application Programs
System Programs
Operating System
Firmware
Hardware
Controlexecution
ofprograms
Abstractfrom
hardware
3. Operating Systems I PT / FF 14
Classes of Operating Systems
• Desktop / Server Operating Systems
• Distributed Operating Systems
• Implements a single operating system instance spanning multiple machines
• Applications have single memory space view
• No significant real-world adoption, mainly research topic
• Real-Time Operating System (RTOS)
• Deterministic timing behavior of operating system services
• Support for real-time application scheduling and resource management
• Wide adoption for industry applications
• Examples: LynxOS, OSE, QNX, RTLinux, VxWorks
• Embedded Operating System
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4. Operating Systems I PT / FF 14
Main Concepts
• Processes
• Process table, core image, fork, command interpreter,
shell, child processes, scheduling, signals, user
authorization, group identification, process tree, ...
• Memory
• Swapping, paging, segmentation, virtual address,
security, device access, ...
• I/O
• Files, directories, root directory, working directory,
path, protection, rwx bits, file descriptor, handle,
special files, I/O devices, block I/O, character I/O,
standard input/output/error, pipes, mailslots,
sockets, ...
• ... all abstracting hardware concepts to some extend
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Main Concepts:Main Concepts: pprorocecessessess
ProProccesseessess, process table, core image, process table, core image
Command interpreter, shellCommand interpreter, shell
Child processesChild processes
A
B C
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Scheduling, signalsScheduling, signals
User identification, group identificationUser identification, group identification
ready running
blocked
finishednew
B C
FED
Process tree
Main Concepts:Main Concepts: pprorocece
ProProccesseessess, process table, core, process table, core
Command interpreter, shellCommand interpreter, shell
Child processesChild processes
Scheduling, signalsScheduling, signals
User identification, group identifUser identification, group identif
ready running
blocked
finishednew
Main Concepts:Main Concepts: FilesFiles
Files, directories, rootFiles, directories, root
Path, working directoryPath, working directory
Protection, rwx bitsProtection, rwx bits
File descriptor, handleFile descriptor, handle
Root directory
tmp usretc
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File descriptor, handleFile descriptor, handle
Special files, I/O devicesSpecial files, I/O devices
Block I/O, character I/OBlock I/O, character I/O
Standard input/output/errorStandard input/output/error
pipespipes
pitmia
6. Operating Systems I PT / FF 14
Hardware Basics
• Central Processing Units (CPUs) + volatile
memory + I/O devices
• Fetch instruction and execute it - typically
memory access, computation, and / or I/O
6
(C) Stallings
• I/O devices and memory controller may
interrupt the instruction processing
• Improve processor utilization by
asynchronous operations
7. Operating Systems I PT / FF 14
Hardware Basics
• Symmetric Multi-Processing (SMP)
• Two or more processors in
one system, can perform the
same operations (symmetric)
• Processors share the same
main memory and all devices
• Increased performance and
scalability for multi-tasking
• No master, any processor can cause another to reschedule
• Multi-Core / many-core processor combines computational cores
on one chip with shared caches
• Challenges for an SMP operating system:
• Reentrant kernel, scheduling policies, synchronization, memory re-use, ...
7
(C) Stallings
8. Operating Systems I PT / FF 14
Hardware Basics
• Multi-Programming vs. multi-processing
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9. Operating Systems I PT / FF 14
Hardware Basics
• Hyperthreading
• Make a single processor appear
to be two virtual processors by
maintaining separate CPU
states, while execution engine
and caches are still shared
• Also called Simultaneous
multithreading (SMT)
• Operating systems must
consider them separately in
scheduling
(in Windows since XP)
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(C) Intel
11. Operating Systems I PT / FF 14
Hardware Basics
11
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12. Operating Systems I PT / FF 14
Hardware Basics
• NUMA (non uniform memory architecture) systems
• Groups of physical processors (called “nodes”) that have local memory
• Connected to the larger system through a cache-coherent interconnect bus
• Still an SMP system (e.g. any processor can access all of memory),
but node-local memory is faster
• Operating system tries to schedule close activities on the same node
• Became the default model in all recent architectures
12
Processor A Processor B
Cache Cache
Memory
Processor C Processor D
Cache Cache
Memory
High-Speed
Interconnect
13. Operating Systems I PT / FF 14
Hardware Basics
13
Core Core
Core Core
Q
P
I
Core Core
Core Core
Q
P
I
Core Core
Core Core
Q
P
I
Core Core
Core Core
Q
P
I
L3CacheL3Cache
L3Cache
MemoryController
MemoryControllerMemoryController
L3Cache
MemoryController
I/O I/O
I/OI/O
MemoryMemory
MemoryMemory
Intel Nehalem
14. Operating Systems I PT / FF 14
Hardware Basics
• Major constraints in memory as a resource are amount, speed, and costs
• Faster access time results in greater costs per bit
• Greater capacity results in smaller costs per bit
• Greater capacity results in slower access
• Idea: Going down a memory hierarchy
• Decreasing costs per bit
• Increasing capacity for fixed costs
• Increasing access time
14
http://tjliu.myweb.hinet.net/
15. Operating Systems I PT / FF 14
(C) Stallings
Hardware Basics
• Principle of Locality
• Memory referenced by a processor (program and data) tends to cluster
• Iterative loops and subroutines, small set of instructions inside
• Operations on tables and arrays involve access to
clustered data sets
• Data should be organized so that the percentage of
accesses to lower levels is substantially less than to
the level above
• Typically implemented by caching concept
• I/O devices provide non-volatile memory
on lower levels, which is an additional advantage
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16. Operating Systems I PT / FF 14
Hardware Basics
• Caching
• Offer a portion of lower level memory
as copy in the faster smaller memory
• Leverages the principle of locality
• Processor caches work in hardware,
but must be considered by an
operating system
16
(C) Stallings
17. Operating Systems I PT / FF 14
Hardware Basics
• Conflicting caching design goals
• Cache size per level
• Number of cache levels
• Block size exchanged with
lower level memory
• Replacement algorithm
• Mapping function
• Write policy for modified
cache lines
• All decisions made by hardware
vendor, considerable by software
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(C) Stallings
18. Operating Systems I PT / FF 14
Hardware Basics
• All computers have mechanisms to let I/O and memory modules interrupt the current
processor work
• Consider the speed aspect of I/O devices in the memory hierarchy
• Different classes of interrupt
• Program interrupt: Condition from program execution leads to exceptional
situation, such as arithmetic overflow, division by zero, illegal instruction
• Timer interrupt: Programmed hardware time signals the time event,
e.g. for regular operating system activities
• I/O interrupt: Generated by any kind of hardware unit to signal I/O completion or
an error condition
• Hardware failure interrupt: Hardware module signals permanent issue
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19. Operating Systems I PT / FF 14
Hardware Basics
19
• I/O program prepares an I/O
operation, waits for
finalization and prepares the
result for further processing
• Usage of interrupts reduces
the application I/O wait time
to the pre- and post phases
of I/O processing
• Interrupt can occur at any
point in the execution of the
user program, must be
managed by the operating
system
21. Operating Systems I PT / FF 14
Hardware Basics
• Summary
• Modern operating systems have to deal with many execution units (cores) and
processors (SMP) in the same box
• Memory is organized in a deep hierarchy
• Differences in speed and amount at the order of magnitudes
• Devices and other sources can interrupt the current processing at any point
• All of this is permanently changing
• New processors, memory technology, hardware devices, ...
• Operating system must allow applications to use old and new hardware
• Example: Windows Vista supports approx. 4200 printers out of the box
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22. Any problem in computer science can be solved
with another layer of indirection.
But that usually will create another problem.
David Wheeler