Evolution of INTEL Microprocessor

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3. Suprio Barua EEE00605339
Md. Sha Ole Ullah EEE00605340
Touhidul Islam Tipu EEE00605364
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5. Year of introduction 1971
4-bit microprocessor
4 KB main memory
45 instructions
PMOS technology
was first programmable
device which was used in
calculators
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6. Year of introduction 1972
8-bit version of 4004
16 KB main memory
48 instructions
PMOS technology
Slow
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7. Year of introduction 1973
8-bit microprocessor
64 KB main memory
2 microseconds clock
500,000 instructions/sec
10X faster than 8008
NMOS technology
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8. Introduced in 1976.
It was also 8-bit μP.
Its clock speed was 3
MHz.
It had 6,500
transistors.
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9. Year of introduction 1978 for
8086
16-bit microprocessors
1 MB main memory
400 nanoseconds clock cycle
time
6 byte instruction cache for
8086 and 4 byte for 8088
In 1981 IBM decided to use 8088
in its personal computer
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10. Introduced in 1986.
It was first 32-bit μP.
It could address 4 GB of
memory.
It had 2,75,000
transistors.
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11.  Introduced in 1989.
 It was also 32-bit μP.
 It had 1.2 million
transistors.
 Its clock speed varied
from 16 MHz to 100
MHz depending upon
the various versions.
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12.  Introduced in 1993.
 32-bit μP.
 Originally named
80586.
 Clock speed 66 MHz.
 Address memory 4GB.
 Could execute 110
million
instructions per second.
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13.  Introduced in 1995.
 It was also 32-bit μP.
 It had 21 million
transistors.
 It was primarily used in
server systems.
 Cache memory:
 8 KB for instructions.
 8 KB for data.
 It had L2 cache of 256
KB.
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14.  Introduced in 1997.
 It was also 32-bit μP.
 Its clock speed was
233MHz to 500 MHz.
 Could execute 333
million
instructions per second.
 L2 cache & processor
were on one circuit.
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15.  Introduced in 1999.
 32-bit μP.
 clock speed varied
from 500 MHz to 1.4
GHz.
 It had 9.5 million
transistors
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16.  Introduced in 2000.
 It was also 32-bit μP.
 Its clock speed was
from 1.3 GHz to 3.8
GHz.
 L1 cache was of 32 KB
& L2 cache of 256 KB.
 It had 42 million
transistors.
 All internal connections
were made from
aluminium to copper.
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17.  Introduced in 2006.
 It is 32-bit & 64-bit μP.
 It has two cores.
 Both the cores have
there own internal bus
and L1 cache, but share
the external bus and L2
cache.
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18.  Introduced in 2006.
 It is a 64-bit μP.
 Its clock speed is from 1.2
GHz to 3 GHz.
 It has 291 million
transistors.
 It has 64 KB of L1 cache
per core and 4 MB of L2
cache.
 It is launched in three
different versions:
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19.  Introduced in 2008.
 It is a 64-bit μP.
 It has 4 physical cores.
 Its clock speed is from
2.66 GHz to 3.33 GHz.
 It has 781 million
transistors.
 It has 64 KB of L1
cache per core, 256 KB
of L2 cache and 8 MB of
L3 cache.
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20.  Introduced in 2010.
 It is a 64-bit μP.
 It has 2 physical cores.
 Its clock speed is from
2.93 GHz to 3.33 GHz.
 It has 781 million
transistors.
 It has 64 KB of L1
cache per core, 512 KB
of L2 cache and 4 MB of
L3 cache.
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