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Evolution of
Microprocessors
Intel 4004
•First commercially
available
microprocessor
produced in 1971.
•A 4 bit
microprocessor with
45 instructions and a
speed of 50K
instructions per
second (< ENIAC)
•Contained 2300
PMOS transistors.
•It was a 4 bit device
used with some other
devices to use it as a
calculator.
Intel 8008
•In 1972, Intel
designed 8008
microprocessor
working with 8 bit
words and
Motorola 6800.
•This required 20 or
more additional
devices to form a
functional CPU.
Intel 8080
•Designed in
1973, 8080 had a
larger instruction
set and required
only 2 additional
devices to form a
functional CPU.
•NMOS transistors
were used in this
for faster
operations.
Intel 8085
•In 1977, Intel
developed 8085
microprocessor
with internal clock
generator having
higher frequency
at reduced cost
and integration.
•It was a single
NMOS device
implemented with
6200 transistors
Intel 8086
•.
•This is the first
actual processor
designed in 1978
•Object code
programs created for
these processors still
can be executed on
the latest members of
Intel Architecture (IA)
family.
•8086 has 16 bit
registers and 16 bit
external data bus
with 20-bit
addressing giving
1MB address space.
Intel 8088
•8088 was identical to
8086, except for a smaller
external data bus of 8-bits.
•These processors
introduced IA
segmentation, but only in
real mode.
•16-bit registers could be
used as pointers to address
into segments of up to
64Kbytes in size
Intel 80186
•Was never used
Intel 80286
•In this processor,
Protected Mode was
introduced, in which
segment register
contents are selectors or
pointers to descriptor
tables.
•The descriptor provides
24 bit base addresses,
allowing a maximum
physical memory size of
up to 16 Mbytes,
support for virtual
memory management
on a segment swapping
basis, and various
protection mechanisms.
Intel 80386
•This introduced 32 bit registers (
for operands) into the architecture,
for both calculation & addressing
•The lower half of each 32 bit
register retained the properties of
one of the 16 bit registers of the
earlier two generations, to provide
complete upward compatibility.
•A new Virtual 8086 mode was
provided to yield greater efficiency
when executing programs created
for the 8086 and 8088 processors
on the new 32 bit machine.
•The 32 bit addressing was
supported with an external 32 bit
address bus giving a 4GBytes
address space and also allowed
each segment to be as large as 4
Gbytes
Intel 80486
•8 KB unified level 1 cache for code and data
was added to the CPU.
• In later versions of the 80486 the size of
level 1 cache was increased to 16 KB.
•Intel 486 featured much faster bus transfers -
1 CPU cycle as opposed to two or more CPU
cycles for the 80386 bus.
•Floating-point unit was integrated into
80486DX CPUs.
•This eliminated delay in communications
between the CPU and FPU.
•Clock-doubling and clock-tripling technology
was introduced in faster versions of Intel
80486 CPU.
•80486SX2 and 80486DX2 were clock-doubled
version, and 80486DX4 was a clock-tripled
version.
•Power management features and System
Management Mode (SMM) became a
standard feature of the processor.
Intel Pentium
•Introduced in Mar 1993( First
gen) and Mar 1994 .
•Maximum rated speeds :
60/66 MHz ( First gen)
;75/90/100/120/133/150/166
/200 MHz ( Second gen.)
•CPU Clock multiplier : 1x(1st
gen);1.5x -3x(2nd gen)
•Register size : 32 bit
•External Data bus : 64 bit
•Memory address bus : 32 bit
•Maximum memory : 4 GB
Intel Pentium II
•Bus speeds : 66 MHz; 100 MHz
•CPU clock multiplier: 3.5x, 4x,
4.5x, 5x
•CPU Speeds : 233 MHz, 266
MHz,300 MHz,333 MHz, 350 MHz,
400 MHz, 450 MHz
•Cache memory : 16K x 2( 32KB)
L1,512KB – ½ speed L2
•Internal registers: 32 bit
•External data bus: 64 bit system
bus
•Memory address bus : 36 bit
•Addressable memory : 64 GB
•Virtual memory : 64 TB
Intel Pentium III
•The first Pentium III core,
featured SSE instruction set,
which allowed SSE-enabled
applications to process up to
four single-precision floating
point numbers at once.
•Other Pentium 3 cores added
other features, like 256 and 512
KB on-die L2 cache memory and
smaller package size.
•During its lifetime, the core of
Pentium III microprocessors was
shrunk twice - from 0.25 micron
to 0.18 micron, and then to 0.13
micron.
Intel Pentium IV
•Speeds range from 1.3
GHz – 3.8 GHz
•FSB speed : 400 MHz,
533 MHz, 800 MHZ, 1066
MHz
•Hyper pipelined/ hyper
threading technology
•L2 cache can handle upto
4GB RAM
•Bus width is 64 bits
Microprocessor Generations
• First generation: 1971-78
– Behind the power curve
(16-bit, <50k transistors)
• Second Generation: 1979-85
– Becoming “real” computers
(32-bit , >50k transistors)
• Third Generation: 1985-89
– Challenging the “establishment”
(Reduced Instruction Set Computer/RISC,
>100k transistors)
• Fourth Generation: 1990-
– Architectural and performance leadership
(64-bit, > 1M transistors,
Intel/AMD translate into RISC internally)
In the beginning (8-bit) Intel 4004
• First general-purpose,
single-chip microprocessor
• Shipped in 1971
• 8-bit architecture, 4-bit
implementation
• 2,300 transistors
• Performance < 0.1 MIPS
(Million Instructions Per
Sec)
• 8008: 8-bit implementation
in 1972
– 3,500 transistors
– First microprocessor-based
computer (Micral)
• Targeted at laboratory
instrumentation
• Mostly sold in Europe
1st Generation (16-bit) Intel 8086
• Introduced in 1978
– Performance < 0.5 MIPS
• New 16-bit architecture
– “Assembly language”
compatible with 8080
– 29,000 transistors
– Includes memory
protection, support for
Floating Point
coprocessor
• In 1981, IBM
introduces PC
– Based on 8088--8-bit
bus version of 8086
2nd Generation (32-bit) Motorola 68000
• Major architectural step in
microprocessors:
– First 32-bit architecture
• initial 16-bit implementation
– First flat 32-bit address
• Support for paging
– General-purpose register architecture
• Loosely based on PDP-11
minicomputer
• First implementation in 1979
– 68,000 transistors
– < 1 MIPS (Million Instructions Per
Second)
• Used in
– Apple Mac
– Sun , Silicon Graphics, & Apollo
workstations
3rd Generation: MIPS R2000
• Several firsts:
– First (commercial) RISC
microprocessor
– First microprocessor to
provide integrated
support for instruction &
data cache
– First pipelined
microprocessor (sustains
1 instruction/clock)
• Implemented in 1985
– 125,000 transistors
– 5-8 MIPS (Million
Instructions per Second)
4th Generation (64 bit) MIPS R4000
• First 64-bit architecture
• Integrated caches
– On-chip
– Support for off-chip,
secondary cache
• Integrated floating point
• Implemented in 1991:
– Deep pipeline
– 1.4M transistors
– Initially 100MHz
– > 50 MIPS
• Intel translates 80x86/ Pentium
X instructions into RISC
internally

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Evolution of microprocessors

  • 2. Intel 4004 •First commercially available microprocessor produced in 1971. •A 4 bit microprocessor with 45 instructions and a speed of 50K instructions per second (< ENIAC) •Contained 2300 PMOS transistors. •It was a 4 bit device used with some other devices to use it as a calculator.
  • 3. Intel 8008 •In 1972, Intel designed 8008 microprocessor working with 8 bit words and Motorola 6800. •This required 20 or more additional devices to form a functional CPU.
  • 4. Intel 8080 •Designed in 1973, 8080 had a larger instruction set and required only 2 additional devices to form a functional CPU. •NMOS transistors were used in this for faster operations.
  • 5. Intel 8085 •In 1977, Intel developed 8085 microprocessor with internal clock generator having higher frequency at reduced cost and integration. •It was a single NMOS device implemented with 6200 transistors
  • 6. Intel 8086 •. •This is the first actual processor designed in 1978 •Object code programs created for these processors still can be executed on the latest members of Intel Architecture (IA) family. •8086 has 16 bit registers and 16 bit external data bus with 20-bit addressing giving 1MB address space.
  • 7. Intel 8088 •8088 was identical to 8086, except for a smaller external data bus of 8-bits. •These processors introduced IA segmentation, but only in real mode. •16-bit registers could be used as pointers to address into segments of up to 64Kbytes in size
  • 9. Intel 80286 •In this processor, Protected Mode was introduced, in which segment register contents are selectors or pointers to descriptor tables. •The descriptor provides 24 bit base addresses, allowing a maximum physical memory size of up to 16 Mbytes, support for virtual memory management on a segment swapping basis, and various protection mechanisms.
  • 10. Intel 80386 •This introduced 32 bit registers ( for operands) into the architecture, for both calculation & addressing •The lower half of each 32 bit register retained the properties of one of the 16 bit registers of the earlier two generations, to provide complete upward compatibility. •A new Virtual 8086 mode was provided to yield greater efficiency when executing programs created for the 8086 and 8088 processors on the new 32 bit machine. •The 32 bit addressing was supported with an external 32 bit address bus giving a 4GBytes address space and also allowed each segment to be as large as 4 Gbytes
  • 11. Intel 80486 •8 KB unified level 1 cache for code and data was added to the CPU. • In later versions of the 80486 the size of level 1 cache was increased to 16 KB. •Intel 486 featured much faster bus transfers - 1 CPU cycle as opposed to two or more CPU cycles for the 80386 bus. •Floating-point unit was integrated into 80486DX CPUs. •This eliminated delay in communications between the CPU and FPU. •Clock-doubling and clock-tripling technology was introduced in faster versions of Intel 80486 CPU. •80486SX2 and 80486DX2 were clock-doubled version, and 80486DX4 was a clock-tripled version. •Power management features and System Management Mode (SMM) became a standard feature of the processor.
  • 12. Intel Pentium •Introduced in Mar 1993( First gen) and Mar 1994 . •Maximum rated speeds : 60/66 MHz ( First gen) ;75/90/100/120/133/150/166 /200 MHz ( Second gen.) •CPU Clock multiplier : 1x(1st gen);1.5x -3x(2nd gen) •Register size : 32 bit •External Data bus : 64 bit •Memory address bus : 32 bit •Maximum memory : 4 GB
  • 13. Intel Pentium II •Bus speeds : 66 MHz; 100 MHz •CPU clock multiplier: 3.5x, 4x, 4.5x, 5x •CPU Speeds : 233 MHz, 266 MHz,300 MHz,333 MHz, 350 MHz, 400 MHz, 450 MHz •Cache memory : 16K x 2( 32KB) L1,512KB – ½ speed L2 •Internal registers: 32 bit •External data bus: 64 bit system bus •Memory address bus : 36 bit •Addressable memory : 64 GB •Virtual memory : 64 TB
  • 14. Intel Pentium III •The first Pentium III core, featured SSE instruction set, which allowed SSE-enabled applications to process up to four single-precision floating point numbers at once. •Other Pentium 3 cores added other features, like 256 and 512 KB on-die L2 cache memory and smaller package size. •During its lifetime, the core of Pentium III microprocessors was shrunk twice - from 0.25 micron to 0.18 micron, and then to 0.13 micron.
  • 15. Intel Pentium IV •Speeds range from 1.3 GHz – 3.8 GHz •FSB speed : 400 MHz, 533 MHz, 800 MHZ, 1066 MHz •Hyper pipelined/ hyper threading technology •L2 cache can handle upto 4GB RAM •Bus width is 64 bits
  • 16. Microprocessor Generations • First generation: 1971-78 – Behind the power curve (16-bit, <50k transistors) • Second Generation: 1979-85 – Becoming “real” computers (32-bit , >50k transistors) • Third Generation: 1985-89 – Challenging the “establishment” (Reduced Instruction Set Computer/RISC, >100k transistors) • Fourth Generation: 1990- – Architectural and performance leadership (64-bit, > 1M transistors, Intel/AMD translate into RISC internally)
  • 17. In the beginning (8-bit) Intel 4004 • First general-purpose, single-chip microprocessor • Shipped in 1971 • 8-bit architecture, 4-bit implementation • 2,300 transistors • Performance < 0.1 MIPS (Million Instructions Per Sec) • 8008: 8-bit implementation in 1972 – 3,500 transistors – First microprocessor-based computer (Micral) • Targeted at laboratory instrumentation • Mostly sold in Europe
  • 18. 1st Generation (16-bit) Intel 8086 • Introduced in 1978 – Performance < 0.5 MIPS • New 16-bit architecture – “Assembly language” compatible with 8080 – 29,000 transistors – Includes memory protection, support for Floating Point coprocessor • In 1981, IBM introduces PC – Based on 8088--8-bit bus version of 8086
  • 19. 2nd Generation (32-bit) Motorola 68000 • Major architectural step in microprocessors: – First 32-bit architecture • initial 16-bit implementation – First flat 32-bit address • Support for paging – General-purpose register architecture • Loosely based on PDP-11 minicomputer • First implementation in 1979 – 68,000 transistors – < 1 MIPS (Million Instructions Per Second) • Used in – Apple Mac – Sun , Silicon Graphics, & Apollo workstations
  • 20. 3rd Generation: MIPS R2000 • Several firsts: – First (commercial) RISC microprocessor – First microprocessor to provide integrated support for instruction & data cache – First pipelined microprocessor (sustains 1 instruction/clock) • Implemented in 1985 – 125,000 transistors – 5-8 MIPS (Million Instructions per Second)
  • 21. 4th Generation (64 bit) MIPS R4000 • First 64-bit architecture • Integrated caches – On-chip – Support for off-chip, secondary cache • Integrated floating point • Implemented in 1991: – Deep pipeline – 1.4M transistors – Initially 100MHz – > 50 MIPS • Intel translates 80x86/ Pentium X instructions into RISC internally